Abstract: A semiconductor package includes a package substrate; semiconductor devices disposed on the package substrate; a package ring disposed on a perimeter of the package substrate surrounding the semiconductor devices; a cover including silicon bonded to the package ring and covering the semiconductor devices; and a thermal interface structure (TIS) thermally connecting the semiconductor devices to the cover.

Abstract: An approach for creating a buried local interconnect around a DDB (double diffusion break) to reduce parasitic capacitance on a semiconductor device is disclosed. The approach utilizes a metal, as the local interconnect, buried in a cavity around the DDB region of a semiconductor substrate. The metal is disposed by two dielectric layers and the substrate. The two dielectric layers are recessed beneath two gate spacers. The buried local interconnect is recessed into the cavity where the top surface of the interconnect is situated below the top surface of the surrounding S/D (source/drain) epi (epitaxy). The metal of the local interconnect can be made from W, Ru or Co.

Abstract: The present disclosure is directed to systems and methods for performing reading comprehension with machine learning. More specifically, the present disclosure is directed to a Neural Symbolic Reader (example implementations of which may be referred to as NeRd), which includes a reader to encode the passage and question, and a programmer to generate a program for multi-step reasoning. By using operators like span selection, the program can be executed over a natural language text passage to generate an answer to a natural language text question. NeRd is domain-agnostic such that the same neural architecture works for different domains. Further, NeRd is compositional such that complex programs can be generated by compositionally applying the symbolic operators.

Abstract: An electronic device including a body and a receptacle connector is provided. The body has a side wall surface, a receptacle slot located at the side wall surface, a waterproof protrusion protruding from the side wall surface, and two gutters located at the side wall surface, where the waterproof protrusion is located above the receptacle slot, and the two gutters are respectively located at two opposite sides of the receptacle slot. The receptacle connector is disposed in the receptacle slot.

Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a first movable assembly and a first driving assembly. The first movable assembly is configured to connect a first optical element, and the first movable assembly is movable relative to the fixed assembly. The first driving assembly is configured to drive the first movable assembly to move relative to the fixed assembly in a first dimension.

Abstract: A fish identification method is provided. The fish identification method includes capturing an image through a processor, wherein the image includes a fish image. The fish identification method includes identifying a plurality of feature points of the fish image through a coordinate detection model and obtaining a plurality of sets of feature-point coordinates. Each of the plurality of sets of feature-point coordinates corresponds to each of the plurality of feature points. The fish identification method further includes calculating a body length or an overall length of the fish image according to the plurality of sets of feature-point coordinates of the image.

Abstract: Techniques are disclosed for systems and methods associated with a powertrain for a micro-mobility fleet vehicle. The fleet vehicle may include at least one drive wheel to provide tractive contact between the flee vehicle and a road surface, an electric motor mechanically coupled to the drive wheel and configured to provide motive force for the fleet vehicle, a brake resistor configured to provide dynamic braking of the motor, and a motor controller electronically coupling the brake resistor to the motor. The motor controller may be configured to control the motive force provided by the motor using the brake resistor. The motor controller may be configured to limit a speed, power, and/or acceleration of the motor using the brake resistor based on an operational environment of, and/or on a directive received by, the fleet vehicle. The brake resistor may provide a relatively wide range of traction control for the fleet vehicle.

Abstract: A resin composition includes 100 parts by weight of a fluorine-containing compound, which includes tetrafluoroethylene homopolymer, perfluoroalkoxy alkane polymer or a combination thereof; 2 parts by weight to 6 parts by weight of a butyral copolymer, which includes a unit of Formula (I), a unit of Formula (II) and a unit of Formula (III), wherein 1 is an integer of 40 to 250, m is an integer of 5 to 380, n is an integer of 55 to 2500, and wherein the butyral copolymer has a content of hydroxyl group of 21 mol % to 80 mol %; and 20 parts by weight to 150 parts by weight of an inorganic filler. The resin composition may achieve improvements in at least one of the following properties of the article made therefrom including dielectric constant, dissipation factor, X-axis coefficient of thermal expansion, weight loss percentage, tensile strength and comparative tracking index.

Abstract: A package structure includes a first RDL, an adhesive layer and a first electronic component. Upper bumps and conductive pads are provided on a first upper surface and a first lower surface of the first RDL, respectively. The adhesive layer is located on the first upper surface of the first RDL and surrounds the upper bumps. The first electronic component is mounted on the adhesive layer and includes conductors which are visible from an active surface of the first electronic component and joined to the upper bumps, the active surface of the first electronic component faces toward the first upper surface of the first RDL. Two adhesive surfaces of the adhesive layer are adhered to the first upper surface of the first RDL and the active surface of the first electronic component, respectively.

Abstract: A display device is provided, including a housing, a panel, two outer circulation assemblies, an inner circulation assembly, and an optical device. The housing includes a closed inner space and a first side surface and a second side surface opposite to each other. The panel is adjacent to the first side surface and the second side surface. The two outer circulation assemblies are respectively arranged on the first side surface and the second side surface, and includes an air duct element to guides an air and a fan assembly. The air duct element guides an air. The inner circulation assembly is arranged in the inner space and includes a first fan element and a second fan element. The first fan element and the second fan element are arranged on two opposite ends. The optical device is arranged in the inner space and located on an end opposite to the panel.

Abstract: Provided is an oral Pt(IV) anticancer prodrug containing a 3-bromopyruvate as an axial ligand, with a molecular formula of cis,trans,cis-[Pt(1R,2R-diaminocyclohexane)(OH)(3-bromopyruvate)(C2O4)]. It is a prodrug of oxaliplatin and 3-bromopyruvic acid is a small molecular glycolysis inhibitor. The prodrug is able to simultaneously act on DNA replication and glycolytic pathways of cancer cells, giving full play to the advantage of double-acting targets. The oral Pt(IV) anticancer prodrug is synthesized by using oxaliplatin as a starting material, performing axial oxidation with H2O2 and neutralizing the oxidized product with 3-bromopyruvic acid.

Abstract: A method includes etching a semiconductor substrate to form a trench, with the semiconductor substrate having a sidewall facing the trench, and depositing a first semiconductor layer extending into the trench. The first semiconductor layer includes a first bottom portion at a bottom of the trench, and a first sidewall portion on the sidewall of the semiconductor substrate. The first sidewall portion is removed to reveal the sidewall of the semiconductor substrate. The method further includes depositing a second semiconductor layer extending into the trench, with the second semiconductor layer having a second bottom portion over the first bottom portion, and a second sidewall portion contacting the sidewall of the semiconductor substrate. The second sidewall portion is removed to reveal the sidewall of the semiconductor substrate.

Abstract: A circuit board structure includes a circuit substrate having opposing first and second sides, a redistribution structure disposed at the first side, and a dielectric structure disposed at the second side. The circuit substrate includes a first circuit layer disposed at the first side and a second circuit layer disposed at the second side. The redistribution structure is electrically coupled to the circuit substrate and includes a first leveling dielectric layer covering the first circuit layer, a first thin-film dielectric layer disposed on the first leveling dielectric layer and having a material different from the first leveling dielectric layer, and a first redistributive layer disposed on the first thin-film dielectric layer and penetrating through the first thin-film dielectric layer and the first leveling dielectric layer to be in contact with the first circuit layer. The dielectric structure includes a second leveling dielectric layer disposed below the second circuit layer.

Abstract: In an embodiment, a method includes: aligning a first package component with a second package component, the first package component having a first region and a second region, the first region including a first conductive connector, the second region including a second conductive connector; performing a first laser shot on a first portion of a top surface of the first package component, the first laser shot reflowing the first conductive connector of the first region, the first portion of the top surface of the first package component completely overlapping the first region; and after performing the first laser shot, performing a second laser shot on a second portion of the top surface of the first package component, the second laser shot reflowing the second conductive connector of the second region, the second portion of the top surface of the first package component completely overlapping the second region.

Abstract: Disclosed is a method for estimating dense multipath parameters by means of multipolarized broadband extended array responses, which includes: first transmitting multiple different transmitted signal sequences via a multipolarized antenna array, and processing received data in multiple snapshots according to the known transmitted signals, to obtain channel responses of multipolarized antenna components at all frequency points in a frequency band; extending the obtained channel response matrixes of multiple frequency points in multiple snapshots into a large two-dimensional channel response matrix; then, acquiring a delay parameter regarding multipath propagation by using a reference array element, and estimating two-dimensional departure and arrival angles by using a channel matrix subjected to frequency domain smoothing and dimensionality reduction; and afterwards, pairing the estimated departure and arrival angles, and estimating parameters such as the cross-polarization ratios, the initial phases, and the

Abstract: A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.

Abstract: Features relating to a vaporizer body are provided. The vaporizer body may include an outer shell that includes an inner region defined by an outer shell sidewall. A support structure is configured to fit within the inner region of the outer shell. The support structure includes a storage region defined by a top support structure, a bottom support structure, a bottom cap, and a gasket. An integrated board assembly is configured to fit within the storage region of the support structure. The integrated board assembly may include a printed circuit board assembly formed of multiple layers that form a rigid structure and that include an inner, flexible layer. A first antenna is integrated at a proximal end of the flexible layer, and a second antenna is integrated at a distal end of the flexible layer.

Abstract: A light emitting module includes a carrier, a light emitting element, a reflection layer, and a fluorescent layer. The light emitting element is disposed on the carrier. The reflection layer is disposed on the carrier and surrounds the light emitting element. The fluorescent layer covers at least part of the light emitting element. The disadvantages of over broad light emitting angle and low illuminance may be solved. Comparing with the related art, the present disclosure achieves an object of increasing the illuminance by at least 10%.

Abstract: The present invention relates to the field of bio-pharmaceuticals and provides an anti-CLDN18.2 antibody. Related preparation methods and related uses are described. The antibody of the present invention or related an antigen-binding fragment can specifically bind to CLDN18.2 with a strong binding capacity. After humanization, the antibody or the antigen-binding fragment has a strong ADCC effect and CDC activity and has good pharmaceutical prospects.

Abstract: Epitaxial source/drain structures for enhancing performance of multigate devices, such as fin-like field-effect transistors (FETs) or gate-all-around (GAA) FETs, and methods of fabricating the epitaxial source/drain structures, are disclosed herein. An exemplary device includes a dielectric substrate. The device further includes a channel layer, a gate disposed over the channel layer, and an epitaxial source/drain structure disposed adjacent to the channel layer. The channel layer, the gate, and the epitaxial source/drain structure are disposed over the dielectric substrate. The epitaxial source/drain structure includes an inner portion having a first dopant concentration and an outer portion having a second dopant concentration that is less than the first dopant concentration. The inner portion physically contacts the dielectric substrate, and the outer portion is disposed between the inner portion and the channel layer. In some embodiments, the outer portion physically contacts the dielectric substrate.