Abstract: In an example, a speaker device may include a first transducer and a second transducer. The first transducer may include a first diaphragm, a first magnetic circuit, and a first voice coil disposed in a magnetic gap of the first magnetic circuit to cause vibration of the first diaphragm. The second transducer may include a second diaphragm, a second magnet circuit, and a second voice coil disposed in a magnetic gap of the second magnetic circuit to cause vibration of the second diaphragm. Further, the speaker device may include a magnetic plate having a first surface coupled to the first transducer and a second surface coupled to the second transducer. The first surface is opposite to the second surface.

Abstract: A storage caddy (12) for storing food processor assembly components includes an upper platform (14) that defines an upper aperture (16), and a lower platform (18) that defines a lower aperture (20). A side interior receiving space (26) in communication with the upper and lower apertures (16, 20). The side wall (22) further includes an exterior surface (28) opposite the interior surface (24). A retention feature (38) is coupled to the exterior surface (28) of the side wall (22). A guide post (208) extends upward from the upper platform (14).

Abstract: The use of an anti-OX40 antibody or an antigen-binding fragment in the treatment of a tumor or cancer, is described. Also described is a treatment method of a tumor or cancer and includes administering to a patient in need an effective amount of an anti-OX40 antibody or an antigen-binding fragment. Kits including an anti-OX40 antibody or an antigen-binding fragment are also described.

Abstract: A resin composition includes a polyphenylene ether resin of Formula (1) and an additive. The additive may include maleimide resin, unsaturated C?C double bond-containing crosslinking agent, polyolefin, flame retardant, filler, curing accelerator, or a combination thereof. An article is made from the resin composition. The article includes a prepreg, a resin film, a laminate or a printed circuit board and achieves improvements in one or more properties including comparative tracking index, breakdown voltage, dissipation factor and copper foil peeling strength.

Abstract: Methods and systems for meta-learning are described for automating learning of child tasks with a single neural network. The order in which tasks are learned by the neural network can affect performance of the network, and the meta-learning approach can use a task-level curriculum for multi-task training. The task-level curriculum can be learned by monitoring a trajectory of loss functions during training. The meta-learning approach can learn to adapt task loss balancing weights in the course of training to get improved performance on multiple tasks on real world datasets. Advantageously, learning to dynamically balance weights among different task losses can lead to superior performance over the use of static weights determined by expensive random searches or heuristics. Embodiments of the meta-learning approach can be used for computer vision tasks or natural language processing tasks, and the trained neural networks can be used by augmented or virtual reality devices.

Abstract: A semiconductor device includes a circuit board, a bottom plate, landing pads, a stack, support pillars, and memory pillars. The circuit board includes circuit structures and wires and has a peripheral area, an array area and a staircase area disposed between the peripheral area and the array area. The bottom plate is disposed on the circuit board, and the bottom plate includes a bottom conductive layer. The landing pads are embedded in at least a top portion of the bottom conductive layer and contact the bottom conductive layer in the staircase area. The stack is disposed on the bottom plate, and includes conductive layers and insulating layers alternately stacked along a first direction. The support pillars pass through the stack along the first direction and extend to the landing pads in the staircase area. The memory pillars pass through the stack along the first direction in the array area.

Abstract: A semiconductor structure including a first die, a second die stacked on the first die, a smoothing layer disposed on the first die and a filling material layer disposed on the smoothing layer. The second die has a dielectric portion and a semiconductor material portion disposed on the dielectric portion. The smoothing layer includes a first dielectric layer and a second dielectric layer, and the second dielectric layer is disposed on the first dielectric layer. The dielectric portion is surrounded by the smoothing layer, and the semiconductor material portion is surrounded by the filling material layer. A material of the first dielectric layer is different from a material of the second dielectric layer and a material of the filling material layer.

Abstract: The present disclosure provides an electrochemical system, including an electrode unit and a reactive unit electrically coupled to the electrode unit. The electrode unit includes a working electrode and a counter electrode, wherein a current density of the counter electrode is greater than a current density of the working electrode. An implantable biochemical test chip is also provided.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a substrate and an isolation structure disposed on the substrate and between two neighboring transistors. The isolation structure includes a dielectric feature, an insulating material disposed below the dielectric feature. The insulating material includes an upper portion comprising a first sidewall and a top surface in contact with the dielectric feature, and a bottom portion having a second sidewall, wherein the second sidewall is surrounded by and in contact with the substrate. The insulating material further includes a middle portion having a third sidewall disposed between the first sidewall and the second sidewall. The semiconductor device structure also includes a dielectric material in contact with the dielectric feature, the first sidewall, the third sidewall, and the substrate.

Abstract: The disclosure provides a forming method of a halogen-free flame-retardant material. The method includes the followings. A twin-screw extruder including a first zone and a second zone is used. A mixture in the first zone is mixed, melted and heated to form a molten mixture. The mixture includes a halogen-free flame retardant, a wear-resistant modifier, a thermoplastic elastomer, and an antioxidant. In addition, a silane-modified nano-silica aqueous suspension is introduced into the second zone to mix the silane-modified nano-silica aqueous suspension with the molten mixture from the first zone. The first zone and the second zone are continuously connected regions.

Abstract: A processing method for automatically generating machining features is provided. A workpiece CAD file is obtained to perform a CAD numerical analysis on a blank body. With the workpiece CAD file being used as a target, a workpiece CAD appearance is compared with the blank body to obtain a feature identification result of a first to-be-processed blank body, which includes identifying data of a to-be-removed blank body and a feature of a first processing surface. A geometric analysis is performed on the first processing surface feature and a tool selection range is determined. A virtual cutting simulation is performed on the first processing surface to generate a processed area data and an unprocessed area data. A spatial coordinate mapping comparison between the unprocessed area data and a surface data of the workpiece CAD file is performed to obtain a feature identification result of a second to-be-processed blank body.

Abstract: Systems and methods for estimating a layout of a room are disclosed. The room layout can comprise the location of a floor, one or more walls, and a ceiling. In one aspect, a neural network can analyze an image of a portion of a room to determine the room layout. The neural network can comprise a convolutional neural network having an encoder sub-network, a decoder sub-network, and a side sub-network. The neural network can determine a three-dimensional room layout using two-dimensional ordered keypoints associated with a room type. The room layout can be used in applications such as augmented or mixed reality, robotics, autonomous indoor navigation, etc.

Abstract: The present disclosure describes a structure that provides insulation in a semiconductor device and a method for forming the structure. The structure includes a first isolation structure including a first isolation layer disposed on a substrate, a second isolation layer disposed on the first isolation layer, and a first high-k dielectric layer having a first height and disposed on the second isolation layer. The structure further includes a second isolation structure including a third isolation layer disposed on the substrate, a fourth isolation layer disposed on the third isolation layer, and a second high-k dielectric layer having a second height and disposed on the fourth isolation layer, where the second height is less than the first height. The structure further includes a gate structure disposed on the first isolation structure, and an insulating structure disposed adjacent to the gate structure and on the second isolation structure.

Abstract: Disclosed are a room temperature curable quick-setting high-strength alkali-activated fly ash (AAFA) cementitious material and a preparation method thereof, belonging to the technical field of building materials. The raw materials include: in parts by mass, 30-50 parts of undisturbed fly ash, 50-70 parts of highly reactive ultra-fine fly ash, and 12-18 parts of sodium hydroxide. Specifically, the AAFA with fast setting and high strength for room temperature curing is prepared by pretreatment of fly ash with sodium hydroxide exciter, based on a premise that the raw material system and preparation process are simplified and feasible.

Abstract: A high-power edge-emitting semiconductor laser with asymmetric structure, comprising: a substrate layer; a lower cladding layer; a lower optical waveguide layer; a first lower barrier layer; a quantum well layer; a first upper barrier layer; an upper optical waveguide layer, and make the thickness of the upper optical waveguide layer be below 300 nm, the thickness of the upper optical waveguide layer is ?˜½ of the thickness of the lower optical waveguide layer; an upper cladding layer, and make the thickness of the upper cladding layer be below 900 nm, the thickness of the upper cladding layer is ?˜½ of the thickness of the lower cladding layer; and an ohmic contact layer formed on the upper cladding layer.

Abstract: The present application relates to the technical field of battery equipment and electric vehicles, disclosing a battery pack liquid-cooled plate and a battery pack. A battery pack liquid-cooled plate comprises: a liquid-cooled bottom plate for bottom cooling of a battery, wherein a first cooling channel is provided in the liquid-cooled bottom plate; multiple liquid-cooled side plates used for side cooling of the battery, wherein a second cooling channel is provided in each liquid-cooled side plate, each liquid-cooled side plate and the liquid-cooled bottom plate are arranged perpendicular to each other, and a flow channel of each liquid-cooled side plate interconnects with each other through a multi-pass device to form a flow-channel structure.

Abstract: A method includes forming a conductive pad over an interconnect structure of a wafer, forming a capping layer over the conductive pad, forming a dielectric layer covering the capping layer, and etching the dielectric layer to form an opening in the dielectric layer. The capping layer is exposed to the opening. A wet-cleaning process is then performed on the wafer. During the wet-cleaning process, a top surface of the capping layer is exposed to a chemical solution used for performing the wet-cleaning process. The method further includes depositing a conductive diffusion barrier extending into the opening, and depositing a conductive material over the conductive diffusion barrier.

Abstract: The present disclosure describes fabricating devices with tunable gate height and effective capacitance. A method includes forming a first metal gate stack in a dummy region of a semiconductor substrate and a second metal gate stack in an active device region of the semiconductor substrate, and performing a chemical mechanical polishing (CMP) process using a slurry including charged abrasive nanoparticles. The first and second metal gate stacks are different in composition. The charged abrasive nanoparticles include a first concentration in the active device region different from a second concentration in the dummy region.

Abstract: A polymer composition comprises a polymer having a main chain and pendant photobase generator (PBG) groups, pendant thermal base generator (TBG) groups, or a combination of pendant PBG and pendant TBG groups.

Abstract: An edge-emitting semiconductor laser with high thermal conductivity and low reflection front mirror surface, comprising: an edge-emitting semiconductor laser die having a rear mirror surface and a front mirror surface on the lateral side, and the electromagnetic radiation generated by the edge-emitting semiconductor laser die is in the wavelength range of 635 nm to 1550 nm; a rear mirror surface coating; and a front mirror surface e, and a passivation layer, an affinity layer, a high thermal conductivity layer and a protective layer. Whereby, providing an edge-emitting semiconductor laser with high thermal conductivity and low reflection front mirror surface, and the front mirror surface coating is made of high thermal conductivity insulating materials to form a multi-layer coating structure, so that the front mirror surface coating has the effect of high thermal conductivity and low reflection.