Abstract: An electronic device includes an outer casing and an antenna structure located in the outer casing. The antenna structure includes a circuit board and a first radiation structure including a first radiation ring and a plurality of stubs. The outer casing includes a metal ring housing extending in an axial direction, which is parallel to the axial direction of the first radiation ring. The plurality of stubs, including one feed stub and at least two first grounding stubs, are distributed in a circumferential direction of the first radiation ring and are connected between the first radiation ring and the circuit board. Two adjacent stubs and a first section of the first radiation ring that is located between the two adjacent stubs form an antenna substructure. The feed stub is configured to feed the first radiation ring that is configured to generate a first resonance.

Abstract: An apparatus for controlling a ply of a composite material includes a robotic arm and an end effector mounted to the robotic arm. The end effector includes a base fixed to the robotic arm, a platform supported by the base, a disk supported by the platform, an arcuate track supported by the disk, and a ply manipulator extending from the arcuate track. The base includes a base track extending along a first translational dimension. The platform is movable along the base track and includes a platform track extending along a second translational dimension. The disk is movable along the platform track and is rotatable about a first rotational dimension. The arcuate track extends along a second rotational dimension. The ply manipulator is movable along the arcuate track.

Abstract: Embodiments are disclosed for a semiconductor structure. The semiconductor structure includes a first nanosheet layer. The first nanosheet layer includes a first channel region, and a heavily doped epitaxial region of a first type. Further, the semiconductor structure includes a second nanosheet layer. The second nanosheet layer includes a second channel region, a heavily doped epitaxial region of a second type disposed above the first nanosheet layer, and a first gate surrounding the first channel region and the second channel region. Additionally, the semiconductor structure includes a protection diode. The protection diode includes a source, a drain, and a second gate. The drain is connected to the first gate, and the second gate is connected to the source.

Abstract: A vertically stacked transistor component having a top active region shifted with respect to a bottom active region is presented. A gate connector is used to connect a top gate to a bottom gate. A bottom source/drain contact via is etched through a gate connector partially, but the bottom source/drain contact itself is electronically isolated from the gate connector by a self-aligned isolation layer located within the bottom source/drain contact via.

Abstract: The present disclosure discloses a method and apparatus for controlling an electronic device, a device and a readable storage medium, and relates to the field of control technology. The electronic device comprises: a base, a rotating body, a first sensor, and a second sensor, wherein the rotating body is rotatably connected to the base, and a physical zero-initialization point is provided on the rotating body or the base; the first sensor is used to detect a rotation angle of the rotating body on a rotation plane; the second sensor is used to detect the physical zero-initialization point, and the physical zero-initialization point is such a position that after the rotation angle of the rotating body detected by the first sensor is zeroed on the rotation plane, the rotation angle of the rotating body on the rotation plane is re-detected by the first sensor.

Abstract: A semiconductor device is provided. The semiconductor device includes a buried power rail, a buried oxide (BOX) layer formed on the buried power rail, a plurality of channel fins formed on the BOX layer, a bottom epitaxial layer formed on the BOX layer and between the channel fins such that the BOX layer is between the buried power rail and the bottom epitaxial layer, a gate stack formed over the bottom epitaxial layer and contacting the channel fins, the gate stack including a work function metal (WFM) layer and a high-x layer, and a top epitaxial layer formed on the gate stack. In the semiconductor device, between two adjacent ones of the channel fins the BOX layer has an opening so that the bottom epitaxial layer is electrically connected to the buried power rail.

Abstract: Provided is a robot configured to generate a map of a workspace of the robot based at least in part on data sensed by at least one sensor in different positions and orientations within the workspace. The map of the workspace is saved to a memory of the robot or the cloud. The robot is paired with a software application executed on a smart phone configured to at least display the map of the workspace and receive at least one input designating a modification to the map of the workspace; a unique tag for a subarea within the map of the workspace; a schedule for cleaning by the robot; an area to avoid; and an instruction to start or stop vacuuming or mopping.

Abstract: A semiconductor device includes a first transistor including a first source/drain region and a second transistor, vertically stacked on the first transistor, including a second source/drain region. The semiconductor device includes an isolation layer positioned between the first transistor and the second transistor and an air gap positioned between the first source/drain region and the isolation layer.

Abstract: A computer includes a processor and a memory, and the memory stores instructions executable by the processor to track a sequence of steps of charging an electric vehicle (EV) by electric vehicle service equipment (EVSE), execute a large-language model (LLM) to generate handling operations for a user to handle components of the EVSE, and output the handling operations to an extended-reality (XR) device. The handling operations support the steps of charging the EV. The XR device displays the handling operations overlaid on the EVSE. The XR device highlights the components of the EVSE that are in the handling operations.

Abstract: A semiconductor device can include a passive device, having a top device including a top doped region, a top gate region, and a frontside contact, a bottom device including a bottom doped region, a bottom gate region, and a backside contact.

Abstract: Embodiments of the invention disclose structures and methods for making the structures. According to an embodiment, the structure may include a top transistor stacked on a bottom transistor, wherein top nanosheet stacks of the top transistor are vertically aligned to bottom nanosheet stacks of the bottom transistor, and wherein a top source/drain region of the top transistor is connected to backside interconnects by an extension region, a backside contact, and a backside via.

Abstract: A semiconductor device includes a lower device layer having a bottom transistor and an upper device layer having a transistor, positioned above and laterally offset from the bottom transistor. A backside power plane is below the lower device layer. A backside bottom gate contact penetrates through the backside power plane to contact a gate of the bottom transistor. A dielectric liner is between the backside power plane and the backside bottom gate contact.

Abstract: Embodiments of the invention include a method for fabricating a semiconductor device and the resulting structure. A p-channel field-effect transistor (pFET) having a source/drain region is formed, where: a bottom surface of the source/drain region is of a depth lower than a bottom surface of a gate region; and the source/drain region comprises a silicon germanium alloy doped with boron; An n-channel field-effect transistor (nFET) is formed. A via is formed, where the via has a top surface above a top surface of the nFET. The semiconductor structure is flipped. A substrate is selectively removed respective to the source/drain region. A backside interlayer dielectric (ILD) is formed, where the backside ILD is of a different material than a shallow trench isolation layer. A backside contact is formed, where the backside contact contacts the source/drain region and the via.

Abstract: The present disclosure provides a display device and an injection mold. The display device includes: a display substrate; a cover plate, provided on a side of the display substrate, a chamfer being provided at a corner position of the cover plate, the chamfer being on a side of the cover plate close to the display substrate, the chamfer having a height in a thickness direction of the cover plate, a ratio of the height of the chamfer to a maximum thickness of the cover plate being greater than or equal to 0.03 and less than or equal to 0.5, the chamfer having a bevel edge, and an included angle between the bevel edge and a plane where the display device is located being greater than or equal to 50 degrees and less than or equal to 80 degrees; and an injection molded edge sealing member second.

Abstract: A semiconductor device can include a passive device, having a passive device having a top device including a first top doped region and a second top doped region separated by a top gate region, and a first frontside contact and a second frontside contact over the first top doped region and the second top doped region, respectively, and a bottom device including a first bottom doped region and second bottom doped region separated by a bottom gate region, and a first backside contact and a second backside contact below the first bottom doped region and the second bottom doped region, respectively, a first well region and a second well region electrically connecting the top device to the bottom device.

Abstract: Disclosed are a tricyclic fused heterocyclic compound having a PDE3/4 dual inhibitory effect represented by formula (I), a stereoisomer, a solvate, or a pharmaceutically acceptable salt thereof, and the use thereof in the preparation of a drug for treating/preventing PDE3/4-mediated diseases. Each group in formula (I) is as defined in the description.

Abstract: A semiconductor structure including a plurality of stacked devices having different gate dielectrics is provided. The different gate dielectrics for the stacked devices are designed to improve the performance and the reliability for each of the stacked devices.

Abstract: A semiconductor structure includes a transistor device having a first nanosheet device disposed on a second nanosheet device in a stacked configuration. The first nanosheet device includes a plurality of first nanosheet channel layers, wherein each of the plurality of first nanosheet channel layers have a nanosheet channel portion on one end and a dielectric material portion on another end. The second nanosheet device includes a plurality of second nanosheet channel layers. The dielectric material portion of the plurality of first nanosheet channel layers is part of a non-active region.

Abstract: A semiconductor cell comprises a top FET that contains a first set of silicon nanosheets and a bottom FET that contains a second set of silicon nanosheets. The top FET and bottom FET are in a stacked profile. The semiconductor cell comprises a top FET cutout region lateral to the first set of nanosheets and above a portion of the second set of nanosheets. The semiconductor cell also comprises a dielectric fill within the top FET cutout region.

Abstract: The present invention discloses aggregation-induced emission fluorescent compounds with near-infrared (NIR) emission. This fluorescent compound is then encapsulated by polymer matrix to yield nanoaggregates which is confirmed to show an excellent photothermal conversion efficiency while maintaining a high fluorescence quantum yield. Consequently, the photothermal therapeutic efficacy can be improved by PTA-oriented accumulation of nanoaggregates, compared with the barely enhanced permeability and retention (EPR) effect. The in vitro and in vivo verification further confirmed that the nanoaggregates exhibit superior fluorescence-guided phototheranostics ability to eliminate tumors.