Patents by Inventor Chen Zhang

Chen Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260225033
    Abstract: The present disclosure relates to carbon molecular sieve membranes, methods of making carbon molecular sieve membranes through bundle pyrolysis, and uses thereof for separating a mixture of gases. The carbon molecular sieve membranes formed by bundle pyrolysis of the present invention can be readily scaled to dozens or hundreds of fibers per module, retain excellent gas selectivity properties, and are able to be selective towards separating gases, such as H2, from a mixture of gases, and are faster to produce compared to carbon molecular sieve membranes formed through individual pryolysis.
    Type: Application
    Filed: October 27, 2025
    Publication date: August 6, 2026
    Inventors: Chen Zhang, Ching-En Ku
  • Publication number: 20260225487
    Abstract: A location tagging and management system including a transceiver and a processor is disclosed. The transceiver may receive historical trip information and historical charging information associated with a vehicle. The processor may determine a primary location, from a plurality of locations, associated with the vehicle based on the historical trip information and the historical charging information. The plurality of locations may be historically visited by the vehicle. The processor may further determine a real-time utility power demand in a geographical area including the primary location, when the vehicle is located at the primary location. The processor may additionally compare the real-time utility power demand with a predefined demand threshold, and perform a predefined action when the real-time utility power demand is greater than the predefined demand threshold.
    Type: Application
    Filed: February 5, 2025
    Publication date: August 6, 2026
    Applicant: Ford Global Technologies, LLC
    Inventors: Syam Chand Kamarajugadda, Chen Zhang, Xiaowu Zhang, Albert Hu
  • Publication number: 20260229899
    Abstract: A transient voltage support method and apparatus for an energy storage converter, a device, and a storage medium are described. The transient voltage support method for the energy storage converter includes: obtaining preset reference value data and output electrical information of the energy storage converter; obtaining active power information, reactive power information, and voltage amplitude information of a grid connection point in response to the output electrical information; and obtaining grid connection control data of the energy storage converter in response to one or more of the preset reference value data, the active power information, the reactive power information, and the voltage amplitude information, and controlling the energy storage converter to perform transient voltage support control during grid connection conversion through the grid connection control data.
    Type: Application
    Filed: March 27, 2026
    Publication date: August 6, 2026
    Applicants: CONTEMPORARY AMPEREX TECHNOLOGY CO., LIMITED, SHANGHAI JIAO TONG UNIVERSITY
    Inventors: Xu CAI, Dongxu Yu, Chen Zhang, Yanhua Lu, Rui Li, Liliuyuan Liang, Yu Zhang
  • Publication number: 20260216157
    Abstract: A compound as represented by general formula (I) or a stereoisomer, deuterated compound, solvate, prodrug, metabolite, pharmaceutically acceptable salt or a cocrystal thereof, and an intermediate thereof, a preparation method therefor, and the use thereof in the preparation of a drug for treating pain.
    Type: Application
    Filed: January 5, 2024
    Publication date: July 30, 2026
    Inventors: Chen ZHANG, Ming LEI, Guanglin WENG, Tao MOU, Ziyu JIAO, Xiaoli GOU, Yan YU, Yao LI, Pangke YAN
  • Publication number: 20260217683
    Abstract: Disclosed in the present disclosure are a pyridazinone heterocyclic compound shown in formula (I), a stereoisomer, a deuterated substance, a solvate, a pharmaceutically acceptable salt or a eutectic crystal thereof, a pharmaceutical composition containing same, and a use thereof in the preparation of drugs for treating/preventing Myosin II-mediated diseases. Groups in the formula (I) are as defined in the description.
    Type: Application
    Filed: January 3, 2024
    Publication date: July 30, 2026
    Inventors: Yao LI, Haoliang ZHANG, Zongjun SHI, Long WANG, Jingzheng ZHAO, Chao FU, Naicheng GUI, Jiancheng WANG, Xin LIU, Chen ZHANG, Pangke YAN
  • Publication number: 20260219341
    Abstract: A signal transmission circuit of a magnetic resonance imaging system, an optical communication module, and a system are provided. The signal transmission circuit includes: a processing circuit, which receives electrical signals from a plurality of signal receiving coil elements of the magnetic resonance imaging system, and respectively modulates the electrical signals from the plurality of signal receiving coil elements to corresponding non-overlapping frequency bands; and a receiving circuit, which is connected to the processing circuit and extracts the electrical signal in each frequency band from an output signal of the processing circuit. According to the present application, the number of channels of a signal is reduced, the difficulty of signal transmission and processing is reduced, and the number of elements of a signal transmission circuit is reduced. As a result, the difficulty of aspects such as chip design, manufacturing, and thermal management can be reduced.
    Type: Application
    Filed: January 22, 2026
    Publication date: July 30, 2026
    Inventors: Yan Zhuang, Chen Zhang
  • Patent number: 12696484
    Abstract: A semiconductor structure including a bottom source drain region arranged above front-end-of-line circuitry, a gate region disposed above and insulated from the bottom source drain region, a top source drain region disposed above and insulated from the gate region, and a channel region adjacent to the gate region and extending vertically from a top surface of the bottom source drain region to a bottom surface of the top source drain region.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: July 28, 2026
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Heng Wu, Julien Frougier, Ruilong Xie, Chen Zhang
  • Patent number: 12696500
    Abstract: A semiconductor device includes a substrate; a first nanosheet transistor, which is located on the substrate, that has a first inter-channel spacing and that has a thin gate oxide layer; and a second nanosheet transistor, which is located on the substrate, that has a second inter-channel spacing that is greater than the first inter-channel spacing and that has a thick gate oxide layer that is thicker than the thin gate oxide layer of the first nanosheet transistor. The second nanosheet transistor comprises channel structures and a source/drain structure that wraps around the ends of the channel structures. In embodiments, there are inner spaces at ends of the gate stacks in the first transistor, but not at the ends of the gate stacks in the second transistor.
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: July 28, 2026
    Assignee: International Business Machines Corporation
    Inventors: Ruilong Xie, Tenko Yamashita, Teresa J. Wu, Chen Zhang
  • Publication number: 20260204792
    Abstract: An electronic device includes an outer casing and an antenna structure located in the outer casing. The antenna structure includes a circuit board and a first radiation structure including a first radiation ring and a plurality of stubs. The outer casing includes a metal ring housing extending in an axial direction, which is parallel to the axial direction of the first radiation ring. The plurality of stubs, including one feed stub and at least two first grounding stubs, are distributed in a circumferential direction of the first radiation ring and are connected between the first radiation ring and the circuit board. Two adjacent stubs and a first section of the first radiation ring that is located between the two adjacent stubs form an antenna substructure. The feed stub is configured to feed the first radiation ring that is configured to generate a first resonance.
    Type: Application
    Filed: March 11, 2026
    Publication date: July 16, 2026
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xiaolu Zhang, Mao Ye, Meng Wei, Chengcheng Nie, Chen Zhang, Yundi Yao, Ruiyang Li
  • Patent number: 12678976
    Abstract: An apparatus for controlling a ply of a composite material includes a robotic arm and an end effector mounted to the robotic arm. The end effector includes a base fixed to the robotic arm, a platform supported by the base, a disk supported by the platform, an arcuate track supported by the disk, and a ply manipulator extending from the arcuate track. The base includes a base track extending along a first translational dimension. The platform is movable along the base track and includes a platform track extending along a second translational dimension. The disk is movable along the platform track and is rotatable about a first rotational dimension. The arcuate track extends along a second rotational dimension. The ply manipulator is movable along the arcuate track.
    Type: Grant
    Filed: March 14, 2024
    Date of Patent: July 14, 2026
    Assignee: General Electric Company
    Inventors: Shatil Sinha, Younkoo Jeong, Chen Zhang, Matthew Hockemeyer, Anirban Sinha
  • Patent number: 12684876
    Abstract: Embodiments are disclosed for a semiconductor structure. The semiconductor structure includes a first nanosheet layer. The first nanosheet layer includes a first channel region, and a heavily doped epitaxial region of a first type. Further, the semiconductor structure includes a second nanosheet layer. The second nanosheet layer includes a second channel region, a heavily doped epitaxial region of a second type disposed above the first nanosheet layer, and a first gate surrounding the first channel region and the second channel region. Additionally, the semiconductor structure includes a protection diode. The protection diode includes a source, a drain, and a second gate. The drain is connected to the first gate, and the second gate is connected to the source.
    Type: Grant
    Filed: September 19, 2023
    Date of Patent: July 14, 2026
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Huimei Zhou, Terence B. Hook, Yoo-Mi Lee, Feng Liu, Chen Zhang
  • Publication number: 20260198086
    Abstract: A vertically stacked transistor component having a top active region shifted with respect to a bottom active region is presented. A gate connector is used to connect a top gate to a bottom gate. A bottom source/drain contact via is etched through a gate connector partially, but the bottom source/drain contact itself is electronically isolated from the gate connector by a self-aligned isolation layer located within the bottom source/drain contact via.
    Type: Application
    Filed: January 6, 2025
    Publication date: July 9, 2026
    Inventors: Eunsoo Cho, Ruilong Xie, Chen Zhang, Shay Reboh, Tenko Yamashita, Thanh Nguyen, Kamal Rudra
  • Patent number: 12674661
    Abstract: The present disclosure discloses a method and apparatus for controlling an electronic device, a device and a readable storage medium, and relates to the field of control technology. The electronic device comprises: a base, a rotating body, a first sensor, and a second sensor, wherein the rotating body is rotatably connected to the base, and a physical zero-initialization point is provided on the rotating body or the base; the first sensor is used to detect a rotation angle of the rotating body on a rotation plane; the second sensor is used to detect the physical zero-initialization point, and the physical zero-initialization point is such a position that after the rotation angle of the rotating body detected by the first sensor is zeroed on the rotation plane, the rotation angle of the rotating body on the rotation plane is re-detected by the first sensor.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: July 7, 2026
    Assignee: GOERTEK INC.
    Inventor: Chen Zhang
  • Patent number: 12677438
    Abstract: A semiconductor device is provided. The semiconductor device includes a buried power rail, a buried oxide (BOX) layer formed on the buried power rail, a plurality of channel fins formed on the BOX layer, a bottom epitaxial layer formed on the BOX layer and between the channel fins such that the BOX layer is between the buried power rail and the bottom epitaxial layer, a gate stack formed over the bottom epitaxial layer and contacting the channel fins, the gate stack including a work function metal (WFM) layer and a high-x layer, and a top epitaxial layer formed on the gate stack. In the semiconductor device, between two adjacent ones of the channel fins the BOX layer has an opening so that the bottom epitaxial layer is electrically connected to the buried power rail.
    Type: Grant
    Filed: August 10, 2023
    Date of Patent: July 7, 2026
    Assignee: International Business Machines Corporation
    Inventors: Chen Zhang, Ruilong Xie, Heng Wu, Junli Wang, Brent A. Anderson
  • Patent number: 12663271
    Abstract: Provided is a robot configured to generate a map of a workspace of the robot based at least in part on data sensed by at least one sensor in different positions and orientations within the workspace. The map of the workspace is saved to a memory of the robot or the cloud. The robot is paired with a software application executed on a smart phone configured to at least display the map of the workspace and receive at least one input designating a modification to the map of the workspace; a unique tag for a subarea within the map of the workspace; a schedule for cleaning by the robot; an area to avoid; and an instruction to start or stop vacuuming or mopping.
    Type: Grant
    Filed: December 21, 2022
    Date of Patent: June 23, 2026
    Assignee: Bobsweep USA
    Inventors: Ali Ebrahimi Afrouzi, Sebastian Schweigert, Lukas Robinson, Chen Zhang
  • Publication number: 20260173514
    Abstract: A semiconductor device includes a first transistor including a first source/drain region and a second transistor, vertically stacked on the first transistor, including a second source/drain region. The semiconductor device includes an isolation layer positioned between the first transistor and the second transistor and an air gap positioned between the first source/drain region and the isolation layer.
    Type: Application
    Filed: December 13, 2024
    Publication date: June 18, 2026
    Inventors: WuKang Kim, Chen Zhang, Abir Shadman, Utkarsh Bajpai, Junli Wang
  • Publication number: 20260164808
    Abstract: A semiconductor device can include a passive device, having a top device including a top doped region, a top gate region, and a frontside contact, a bottom device including a bottom doped region, a bottom gate region, and a backside contact.
    Type: Application
    Filed: December 9, 2024
    Publication date: June 11, 2026
    Inventors: Robert Gauthier, Anindya Nath, Masoud Zabihi, Brent Alan Anderson, Tenko Yamashita, Lijuan Zou, Chen Zhang
  • Publication number: 20260162073
    Abstract: A computer includes a processor and a memory, and the memory stores instructions executable by the processor to track a sequence of steps of charging an electric vehicle (EV) by electric vehicle service equipment (EVSE), execute a large-language model (LLM) to generate handling operations for a user to handle components of the EVSE, and output the handling operations to an extended-reality (XR) device. The handling operations support the steps of charging the EV. The XR device displays the handling operations overlaid on the EVSE. The XR device highlights the components of the EVSE that are in the handling operations.
    Type: Application
    Filed: December 5, 2024
    Publication date: June 11, 2026
    Applicant: Ford Global Technologies, LLC
    Inventors: Dominique Meroux, Kai Wu, Hyongju Park, Ruthwik Reddy Junuthula, Chen Zhang
  • Publication number: 20260164750
    Abstract: Embodiments of the invention disclose structures and methods for making the structures. According to an embodiment, the structure may include a top transistor stacked on a bottom transistor, wherein top nanosheet stacks of the top transistor are vertically aligned to bottom nanosheet stacks of the bottom transistor, and wherein a top source/drain region of the top transistor is connected to backside interconnects by an extension region, a backside contact, and a backside via.
    Type: Application
    Filed: December 10, 2024
    Publication date: June 11, 2026
    Inventors: Sarah Nahar Chowdhury, Ruilong Xie, HUIMEI ZHOU, Nicolas Jean Loubet, Shahrukh Khan, Chen Zhang
  • Publication number: 20260164715
    Abstract: Embodiments of the invention include a method for fabricating a semiconductor device and the resulting structure. A p-channel field-effect transistor (pFET) having a source/drain region is formed, where: a bottom surface of the source/drain region is of a depth lower than a bottom surface of a gate region; and the source/drain region comprises a silicon germanium alloy doped with boron; An n-channel field-effect transistor (nFET) is formed. A via is formed, where the via has a top surface above a top surface of the nFET. The semiconductor structure is flipped. A substrate is selectively removed respective to the source/drain region. A backside interlayer dielectric (ILD) is formed, where the backside ILD is of a different material than a shallow trench isolation layer. A backside contact is formed, where the backside contact contacts the source/drain region and the via.
    Type: Application
    Filed: December 10, 2024
    Publication date: June 11, 2026
    Inventors: Sarah Nahar Chowdhury, Ruilong Xie, Shay Reboh, Chen Zhang, Tenko Yamashita, Kisik Choi, Junli Wang