Patents by Inventor Cheng Chou

Cheng Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10325368
    Abstract: An optical measuring apparatus and an operating method thereof are disclosed. The optical measuring apparatus includes a light source, a carrier chip, a light sensor, an analyzing chip and a display. Samples are uniformly distributed on the carrier chip. The light source emits sensing lights toward the carrier chip. The light sensor receives the sensing lights passing through the carrier chip at a plurality of times to obtain a plurality of images corresponding to the plurality of times respectively. The analyzing chip is coupled to the light sensor. The analyzing chip analyzes the object number and distribution variation with time in the sample according to the plurality of images corresponding to the plurality of times and estimates intrinsic characteristics of the object in the sample accordingly. The display is coupled to the analyzing chip. The display displays the intrinsic characteristics of the object in the sample.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: June 18, 2019
    Assignee: Crystalvue Medical Corporation
    Inventors: Long Hsu, William Wang, Cheng-Hsien Liu, Po-Chen Shih, Ting-Sheng Shih, Cheng-En Liu, Chung-Yu Chou, Chung-Cheng Chou
  • Patent number: 10312107
    Abstract: A method includes forming a metal hard mask over a low-k dielectric layer. The step of forming the metal hard mask includes depositing a sub-layer of the metal hard mask, and performing a plasma treatment on the sub-layer of the metal hard mask. The metal hard mask is patterned to form an opening. The low-k dielectric layer is etched to form a trench, wherein the step of etching is performed using the metal hard mask as an etching mask.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: June 4, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Chi Ko, Chia-Cheng Chou, Shing-Chyang Pan, Keng-Chu Lin, Shwang-Ming Jeng
  • Publication number: 20190164606
    Abstract: A memory architecture includes: a plurality of cell arrays each of which comprises a plurality of bit cells, wherein each of bit cells of the plurality of cell arrays uses a respective variable resistance dielectric layer to transition between first and second logic states; and a control logic circuit, coupled to the plurality of cell arrays, and configured to cause a first information bit to be written into respective bit cells of a pair of cell arrays as an original logic state of the first information bit and a logically complementary logic state of the first information bit, wherein the respective variable resistance dielectric layers are formed by using a same recipe of deposition equipment and have different diameters.
    Type: Application
    Filed: October 12, 2018
    Publication date: May 30, 2019
    Inventors: Yu-Der CHIH, Chung-Cheng Chou, Wen-Ting Chu
  • Publication number: 20190164748
    Abstract: Embodiments described herein relate generally to methods for forming low-k dielectrics and the structures formed thereby. In some embodiments, a dielectric is formed over a semiconductor substrate. The dielectric has a k-value equal to or less than 3.9. Forming the dielectric includes using a plasma enhanced chemical vapor deposition (PECVD). The PECVD includes flowing a diethoxymethylsilane (mDEOS, C5H14O2Si) precursor gas, flowing an oxygen (O2) precursor gas; and flowing a carrier gas. A ratio of a flow rate of the mDEOS precursor gas to a flow rate of the carrier gas is less than or equal to 0.2.
    Type: Application
    Filed: April 3, 2018
    Publication date: May 30, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia Cheng CHOU, Li Chun TE, Po-Cheng SHIH, Tien-I BAO
  • Patent number: 10300243
    Abstract: A catheter apparatus includes a replaceable module, a main body portion and a sensing module. The main body portion includes a tube, a urine guide opening and an elastic unit. The replaceable module includes a control unit. A first terminal of the tube is coupled to the replaceable module and a second terminal of the tube is inserted into the bladder. The urine guide opening is disposed at the second terminal of the tube and used to guide urine into the tube when the second terminal of the tube is inserted into the bladder. The elastic unit is disposed at the second terminal of the tube and coupled to the control unit. The sensing module is coupled to the control unit and used to sense whether the second terminal of the tube is inserted to the correct position in the bladder and transmit sensing result to the control unit.
    Type: Grant
    Filed: October 6, 2016
    Date of Patent: May 28, 2019
    Assignee: CRYSTALVUE MEDICAL CORPORATION
    Inventors: William Wang, Meng-Shin Yen, Chung-Cheng Chou, Chung-Ping Chuang
  • Publication number: 20190154250
    Abstract: A fan structure includes a fan impeller, a fan seat and a hollow shaft rod. The fan impeller has a circumferential section and a top section. The circumferential section has multiple fan blades. The fan seat has a bearing cup. A light-emitting unit and a photoconductive component are received in the bearing cup. The hollow shaft rod has a first end, a second end and a through hole. The through hole axially passes through the hollow shaft rod between the first and second ends. A first end of the hollow shaft rod is inserted in the top section of the fan impeller. A second end of the hollow shaft rod is inserted in the bearing cup of the fan seat and assembled with the photoconductive component. The fan structure improves the shortcoming of the conventional light-emitting fan that the light can be hardly fully projected.
    Type: Application
    Filed: November 22, 2017
    Publication date: May 23, 2019
    Inventors: Shih-Cheng Chou, Chang-Yen Ho, Chung-Chien Su
  • Publication number: 20190148625
    Abstract: A semiconductor device includes a magnetic random access memory (MRAM). The MRAM comprises a plurality of MRAM cells including a first type MRAM cell and a second type MRAM cell. Each of the plurality of MRAM cells includes a magnetic tunneling junction (MTJ) layer including a pinned magnetic layer, a tunneling barrier layer and a free magnetic layer. A size of the MTJ film stack of the first type MRAM cell is different from a size of the MTJ film stack of the second type MRAM cell. In one or more of the foregoing and following embodiments, a width of the MTJ film stack of the first type MRAM cell is different from a width of the MTJ film stack of the second type MRAM cell.
    Type: Application
    Filed: March 29, 2018
    Publication date: May 16, 2019
    Inventors: Huang-Wen TSENG, Cheng-Chou WU, Che-Jui CHANG
  • Patent number: 10288494
    Abstract: A thermometer circuit configured to estimate a monitored temperature is disclosed. The circuit includes an adjustable resistor presenting a first resistance value that is temperature-independent and a second resistance value that is temperature-dependent, wherein a first current signal is conducted across the resistor when it presents the first resistance value and a second current signal is conducted across the resistor when it presents the second resistance value; a plurality of gated conductors coupled to the resistor; and a control circuit, coupled to the resistor and the plurality of gated conductors, and configured to selectively deactivate at least one of the plurality of gated conductors to compare the first and second current signals to estimate the monitored temperature.
    Type: Grant
    Filed: May 10, 2017
    Date of Patent: May 14, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Lien Linus Lu, Chia-Fu Lee, Yi-Chun Shih, Chung-Cheng Chou, Yu-Der Chih
  • Patent number: 10288504
    Abstract: The present invention provides an axial rotary type torque sensor comprising a planetary gear set disposed along a central axis between an input shaft and an output shaft. The input shaft drives the sun gear which meshes with planetary gears, and the planetary gears mesh with the ring gear of the planetary gear set to rotate along the circumference of the central axis. The ring gear is connected with a plurality of strip-like beams. At least one strain gauge is attached to the beams. One ending portion of the beam is fixed and the other ending portion is used for bearing a tangential force applied on the ring gear to generate a deformation at a rotation direction of a circumference. A strain gauge which senses the strain of the deformation used as a torque sensing value between the input shaft and the output shaft, thereby improving the poor sensing accuracy and sensitivity of the conventional torque sensors and solving the problem that the radial volume cannot be effectively reduced.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: May 14, 2019
    Assignee: PRODRIVES & MOTIONS CO., LTD.
    Inventors: Yueh-Yang Hu, Chih-Cheng Chou, Meng-Jen Chiu
  • Publication number: 20190131421
    Abstract: Structures and formation methods of a semiconductor device structure are provided. The method includes forming a fin structure over a substrate. The method also includes forming a gate structure over the fin structure. The method further includes forming fin spacers over sidewalls of the fin structure and gate spacers over sidewalls of the gate structure. In addition, the method includes forming a source/drain structure over the fin structure and depositing a dummy material layer to cover the source/drain structure. The dummy material layer is removed faster than the gate spacers during the removal of the dummy material layer. The method further includes forming a salicide layer over the source/drain structure and the fin spacers, and forming a contact over the salicide layer. The dummy material layer includes Ge, amorphous silicon or spin-on carbon.
    Type: Application
    Filed: October 30, 2017
    Publication date: May 2, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsiang-Ku SHEN, Jin-Mu YIN, Tsung-Chieh HSIAO, Chia-Lin CHUANG, Li-Zhen YU, Dian-Hau CHEN, Shih-Wei WANG, De-Wei YU, Chien-Hao CHEN, Bo-Cyuan LU, Jr-Hung LI, Chi-On CHUI, Min-Hsiu HUNG, Huang-Yi HUANG, Chun-Cheng CHOU, Ying-Liang CHUANG, Yen-Chun HUANG, Chih-Tang PENG, Cheng-Po CHAU, Yen-Ming CHEN
  • Patent number: 10269627
    Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for surrounding dielectric layers. The insert layer may be applied between two dielectric layers. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Cheng Chou, Chih-Chien Chi, Chung-Chi Ko, Yao-Jen Chang, Chen-Yuan Kao, Kai-Shiang Kuo, Po-Cheng Shih, Tze-Liang Lee, Jun-Yi Ruan
  • Publication number: 20190048442
    Abstract: The present teaching is generally directed to soft magnetic alloys. In particular, the present teaching is directed to soft magnetic alloys including Samarium (“Sm”). In a non-limiting embodiment, an Sm-containing magnetic alloy is described including 15 wt % to 55 wt % of Cobalt (“Co”), less than 2.5 wt % of Sm, and 35 wt % to 75 wt % of Iron (“Fe”). The Sm-containing magnetic alloy may further include at least one element X, selected from a group including Vanadium (“V”), Boron (“B”), Carbon (“C”), Chromium (“Cr”), Manganese (“Mn”), Molybdenum (“Mo”), Niobium (“Nb”), Nickel (“Ni”), Titanium (“Ti”), Tungsten (“W”), and Silicon (“Si”). The Sm-containing magnetic alloy may further have a magnetic flux density of at least 2.5 Tesla.
    Type: Application
    Filed: July 26, 2018
    Publication date: February 14, 2019
    Inventors: Kuen-Shyang HWANG, Guo-Jiun SHU, Fang-Cheng CHOU
  • Publication number: 20190035458
    Abstract: A circuit includes a memory array having a plurality of memory cells; a control logic circuit, coupled to the memory array, and configured to use a first voltage signal to cause a first memory cell of the plurality of memory cells to transition from a first resistance state to a second resistance state, and a second voltage signal to cause the first memory cell to transition from the second resistance state to a third resistance state; and a counter circuit, coupled to the control logic circuit, and configured to increment a count by one in response to the first memory cell's transition from the first to the second resistance state, and again increment the count by one in response to the first memory cell's transition from the second to the third resistance state.
    Type: Application
    Filed: February 15, 2018
    Publication date: January 31, 2019
    Inventors: Shih-Lien Linus LU, Yu-Der CHIH, Chung-Cheng CHOU, Tong-Chern ONG
  • Publication number: 20190026564
    Abstract: A video surveillance method and a video surveillance system applied the method are provided. The method includes capturing an image of at least a part of a monitored area to obtain a plurality of video streams; sensing the monitored area to obtain a plurality of sensing data; if an image of an object of a video stream is determined as a target object, determining whether the target object triggers a target event according to one of the sensing data corresponding to the video stream; if the target object is determined as triggering the target event, outputting a feature value corresponding to the target object according to a preset analysis condition, the video stream including the target object and the target event; and generating a notification event corresponding to the target object according to the feature value and a model weight value corresponding to the target object.
    Type: Application
    Filed: May 22, 2018
    Publication date: January 24, 2019
    Applicant: PEGATRON CORPORATION
    Inventors: Tze-Yee Lau, Chin-Yu Ko, Cheng-Chou Chen
  • Patent number: 10170435
    Abstract: A method for forming a seal ring structure provides a semiconductor substrate having a first doping region formed over a top portion thereof. The method forms a plurality of patterned photoresist layers over the semiconductor substrate, encircling the semiconductor substrate, wherein each of the patterned photoresist layers has a plurality of parallel strip portions extending along a first direction and a plurality of bridge portions formed between the parallel strip portions, and then performs an etching process to a first doping region of the substrate. The method then removes the first doping region not covered by the patterned photoresist layers and forms a plurality of patterned first doping regions. The method then removes the patterned photoresist layers and forms an isolation region between and adjacent to the patterned first doping regions. Finally, the method forms a plurality of interconnect elements over the semiconductor substrate.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: January 1, 2019
    Assignee: MEDIATEK SINGAPORE PTE. LTD.
    Inventors: Chiyuan Lu, Chien-Chih Lin, Cheng-Chou Hung, Yu-Hua Huang
  • Patent number: 10163691
    Abstract: A method of fabricating a semiconductor device includes forming a low-k dielectric layer over a substrate and depositing a cap layer over the low-k dielectric layer. A treatment process is performed to the cap layer. After the treatment process to the cap layer is performed, the low-k dielectric layer is etched to form a plurality of trenches using the cap layer as an etching mask.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: December 25, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Cheng Shih, Chia Cheng Chou, Chung-Chi Ko
  • Publication number: 20180358091
    Abstract: A device is disclosed that includes a driver and a plurality of resistive memory cells each being electrically connected to the driver through a first line. The driver has a variable resistance corresponding to various locations of a conducted resistive memory cell, relative to the driver, in the plurality of resistive memory cells.
    Type: Application
    Filed: August 20, 2018
    Publication date: December 13, 2018
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Chung-Cheng CHOU
  • Publication number: 20180350877
    Abstract: Methods for forming a magneto-resistive memory device and a capacitor in an interconnect structure are disclosed herein. An exemplary method includes forming a first level interconnect metal layer and a second level interconnect metal layer of an interconnect structure. The method further includes simultaneously forming a first plurality of layers in a first region of the interconnect structure and a second plurality of layers in a second region of the interconnect structure, wherein the first plurality of layers and the second plurality of layers are disposed between the first level interconnect metal layer and the second level interconnect metal layer. The first plurality of layers is configured as a magneto-resistive memory device. The second plurality of layers is configured as the capacitor. The magneto-resistive memory device and the capacitor are each coupled to the first level interconnect metal layer and the second level interconnect metal layer.
    Type: Application
    Filed: July 25, 2018
    Publication date: December 6, 2018
    Inventors: Chung-Cheng Chou, Ya-Chen Kao, Tien-Wei Chiang
  • Patent number: 10138300
    Abstract: The present invention relates to an antibody or antigen-binding fragment thereof that bind human vascular endothelial growth factor receptor 2 (VEGFR-2). The present invention also relates to a method for inhibiting VEGFR-2-mediated signaling in a subject in need, a method for treating diseases and/or disorders caused by or related to VEGFR-2 activity and/or signaling in a subject afflicted with the diseases and disorders, a method for treating tumor in a subject afflicted with the tumor, a method for inhibiting cell proliferation of endothelial cells in a subject in need, and a method for detecting human vascular endothelial growth factor receptor in a sample.
    Type: Grant
    Filed: July 3, 2017
    Date of Patent: November 27, 2018
    Assignee: DEVELOPMENT CENTER FOR BIOTECHNOLOGY
    Inventors: Jiann-Shiun Lai, Li-Shuang Ai, Yan-Da Lai, Yen-Yu Wu, Yi-San Tsai, Yi-Jiue Tsai, Juo-Yu Huang, Cheng-Chou Yu, Chuan-Lung Hsu, Chien-Tsun Kuan, Szu-Liang Lai, Li-Ya Wang
  • Patent number: D840998
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: February 19, 2019
    Inventors: Wei Cheng Chou, Jo Chieh Wang, Yen Hsi Chang