Patents by Inventor Cheng Han

Cheng Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12224786
    Abstract: Dynamic tuning method for a specific absorption rate (SAR) is provided. The dynamic tuning method is applied to user equipment (UE). The dynamic tuning method may include the following steps: the UE may determine the back-off value corresponding to the current antenna state; and the UE may tune the conducted power of the radio frequency (RF) circuit of the UE based on the back-off value.
    Type: Grant
    Filed: September 8, 2022
    Date of Patent: February 11, 2025
    Assignee: MEDIATEK INC.
    Inventors: Chun-Yen Wu, Cheng-Han Lee
  • Patent number: 12222246
    Abstract: A wearable device includes a case and a temperature sensing device. The case has a first opening. The temperature sensing device is disposed inside the case of the wearable device. The temperature sensing device includes a first substrate, a sensor chip, and a metal shielding structure. The sensor chip is disposed on the first substrate. The metal shielding structure surrounds the sensor chip, and has a second opening. The sensor chip faces towards the first opening and the second opening.
    Type: Grant
    Filed: June 7, 2023
    Date of Patent: February 11, 2025
    Assignee: PIXART IMAGING INC.
    Inventors: Chih-Ming Sun, Ming-Han Tsai, Cheng-Nan Tsai
  • Patent number: 12222654
    Abstract: A method includes illuminating radiation to a resist layer over a substrate to pattern the resist layer. The patterned resist layer is developed by using a positive tone developer. The patterned resist layer is rinsed using a basic aqueous rinse solution. A pH value of the basic aqueous rinse solution is lower than a pH value of the developer, and a rinse temperature of rinsing the patterned resist layer is in a range of about 20° C. to about 40° C.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: February 11, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ming-Hui Weng, Chen-Yu Liu, Cheng-Han Wu, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 12221461
    Abstract: The present disclosure is related to the six isomer structures (OBI-821-1990-V1A, OBI-821-1990-V1B, OBI-821-1990-V2A, OBI-821-1990-V2B, OBI-821-1858-A, and OBI-821-1858-B) of isolated OBI-821 adjuvant and the method for evaluating the quality thereof. The method of the present disclosure adopts hydrophilic interaction liquid chromatography (HILIC) and reverse phase high performance liquid chromatography (RP-HPLC) either alone or in tandem and is able to separate the isomers of OBI-821 adjuvant in the consequent chromatography. Accordingly, the quality of OBI-821 adjuvant can be further evaluated.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: February 11, 2025
    Assignee: OBI PHARMA, INC.
    Inventors: Cheng-Der Tony Yu, Yih-Huang Hsieh, Wei Han Lee, Yu Chen Lin, Nan Hsuan Wang
  • Publication number: 20250048703
    Abstract: Semiconductor devices and methods of manufacture are presented. In embodiments a method of manufacturing the semiconductor device includes forming a fin from a plurality of semiconductor materials, depositing a dummy gate over the fin, depositing a plurality of spacers adjacent to the dummy gate, removing the dummy gate to form an opening adjacent to the plurality of spacers, widening the opening adjacent to a top surface of the plurality of spacers, after the widening, removing one of the plurality of semiconductor materials to form nanowires, and depositing a gate electrode around the nanowires.
    Type: Application
    Filed: October 19, 2023
    Publication date: February 6, 2025
    Inventors: Cheng-Yu Wei, Hao-Ming Tang, Cheng-I Lin, Shu-Han Chen, Chi On Chui
  • Publication number: 20250048725
    Abstract: A semiconductor device structure and methods of forming the same are described. The structure includes a first semiconductor layer disposed over a substrate, the first semiconductor layer has an edge portion and a center portion, and a height of the center portion is substantially greater than a height of the edge portion. The structure further includes a dielectric spacer disposed below and in contact with the edge portion of the first semiconductor layer, a gate dielectric layer surrounding the center portion of the first semiconductor layer, and a gate electrode layer disposed on the gate dielectric layer surrounding the center portion of the first semiconductor layer.
    Type: Application
    Filed: October 17, 2023
    Publication date: February 6, 2025
    Inventors: Cheng-I LIN, Shu-Han CHEN, Chi On CHUI
  • Patent number: 12213971
    Abstract: The present disclosure generally relates to compounds class I HDAC inhibitors, their production and applications. The compounds possess epigenetic immunomodulatory activities in the tumor microenvironment (TME) and thus inhibit growth of tumor cells.
    Type: Grant
    Filed: May 1, 2023
    Date of Patent: February 4, 2025
    Assignee: GREAT NOVEL THERAPEUTICS BIOTECH & MEDICALS CORPORATION
    Inventors: Jia-Shiong Chen, Mu-Hsuan Yang, Yi-Hong Wu, Sz-Hao Chu, Cheng-Han Chou, Ye-Su Chao, Chia-Nan Chen
  • Patent number: 12219752
    Abstract: The present disclosure provides a method of manufacturing a semiconductor structure and a semiconductor structure. The method includes: providing a base and forming, on the base, a bit line contact region provided with a first groove; forming a first bit line contact layer in the first groove, wherein the first bit line contact layer in the first groove defines a second groove; forming a diffusion layer in the second groove, wherein the diffusion layer in the second groove defines a third groove; forming, in the third groove, a second bit line contact layer provided with a gap; and processing the diffusion layer.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: February 4, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Cheng Chen, Hai-Han Hung, Chun-Chieh Huang, Xiaoling Wang
  • Patent number: 12218431
    Abstract: The invention provides an antenna subsystem with improved radiation performances. The antenna subsystem may comprise an antenna-in-module (AiM), an auxiliary structure being conductive, and a support structure being nonconductive and disposed between the AiM and the auxiliary structure. The AiM may comprise a base, and one or more radiators being conductive. The antenna subsystem may provide a spherical coverage by a combination of a first component of gain and a second component of gain. The auxiliary structure may be insulated from the one or more radiators, and may be configured for orienting a radiation pattern of the first component of gain and a radiation pattern of the second component of gain to two different directions respectively; and/or, causing the spherical coverage provided by the antenna subsystem to be broader than a spherical coverage provided by the AiM alone.
    Type: Grant
    Filed: January 30, 2023
    Date of Patent: February 4, 2025
    Assignee: MEDIATEK INC.
    Inventors: Wei-Hsuan Chang, Cheng-Han Lee, Chih-Wei Lee
  • Patent number: 12215096
    Abstract: Hydantoin based compounds useful as inhibitors of matrix metalloproteinases (MMPs), particularly macrophage elastase (MMP-12) are described. Also described are related compositions and methods of using the compounds to inhibit MMP-12 and treat diseases mediated by MMP-12, such as asthma, chronic obstructive pulmonary disease (COPD), emphysema, acute lung injury, idiopathic pulmonary fibrosis (IPF), sarcoidosis, systemic sclerosis, liver fibrosis, nonalcoholic steatohepatitis (NASH), arthritis, cancer, heart disease, inflammatory bowel disease (IBD), acute kidney injury (AKI), chronic kidney disease (CKD), Alport syndrome, and nephritis.
    Type: Grant
    Filed: July 6, 2023
    Date of Patent: February 4, 2025
    Assignee: Foresee Pharmaceuticals USA, Inc.
    Inventors: Wenjin Yang, Kai-Wei Chang, Suying Liu, Cheng-Han Tsai
  • Patent number: 12219849
    Abstract: An array substrate and a display apparatus are provided The array substrate includes: at least one adjusting portion on the base substrate and having a first cross section in a plane perpendicular to the base substrate; first cross section includes top and bottom sides, first and second lateral sides; the bottom side is closer to the base substrate than the top side, an orthographic projection of the top side on the base substrate is within an orthographic projection of the bottom side on the base substrate; the first and/or second lateral sides is/are stepped; a buffer layer on a side of the adjusting portion away from the base substrate; light-emitting devices on a side of the buffer layer away from the base substrate and each including a first electrode, a light-emitting layer and a second electrode sequentially arranged along a direction away from the base substrate.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: February 4, 2025
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xing Fan, Xin Li, Cheng Han, Yansong Li
  • Patent number: 12219819
    Abstract: A display substrate includes a first electrode layer, a pixel define layer, an organic light-emitting layer, a second electrode layer and a first encapsulation layer which are sequentially disposed away from an base substrate. The pixel define layer has a plurality of openings, at least one of which exposes the first electrode layer. The pixel define layer has a first climbing part and a second climbing part close to the edge of at least one opening, the distance from a surface of the second climbing part away from the base substrate to the base substrate is greater than the distance from a surface of the first climbing part away from the base substrate to the base substrate, and the slope angle of the first climbing part is different from that of the second climbing part.
    Type: Grant
    Filed: April 26, 2021
    Date of Patent: February 4, 2025
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Xing Fan, Shantao Chen, Xin Li, Hao Gao, Cheng Han, Yansong Li
  • Publication number: 20250040342
    Abstract: The present disclosure provides a display panel, and belongs to the technical field of display. The display panel in the present application includes a base substrate and a plurality of pixel units on the base substrate. Each of the pixel units includes a plurality of light-emitting units emitting light in different colors. Each of the the plurality of light-emitting unit includes a first electrode, an organic functional layer and a second electrode stacked sequentially along a direction away from the base substrate. Among the plurality of light-emitting units emitting light in different colors in each pixel unit, the second electrode of the light-emitting unit emitting light with a shortest wavelength has a smallest thickness along a direction perpendicular to the base substrate.
    Type: Application
    Filed: November 29, 2022
    Publication date: January 30, 2025
    Inventors: Xiangmin WEN, Na BI, Yansong LI, Haidong WU, Yan FAN, Hao GAO, Cheng HAN
  • Publication number: 20250038073
    Abstract: A package structure and a method for forming the same are provided. The package structure includes a first package structure and a second package structure. The first package structure includes a first device formed over a first substrate. The first device includes a first conductive plug connected to a through substrate via (TSV) structure formed in the first substrate. A buffer layer surrounds the first substrate. A first bonding layer is formed over the first substrate and the buffer layer. The second package structure includes a second device formed over a second substrate. A second bonding layer is formed over the second device. A hybrid bonding structure is between the first package structure and the second package structure by bonding the first bonding layer to the second bonding layer.
    Type: Application
    Filed: July 27, 2023
    Publication date: January 30, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ke-Han SHEN, Chih-Yuan CHEN, Jiung WU, Hung-Yi Kuo, Chung-Ju LEE, Tung-He CHOU, Ji CUI, Kuo-Chung YEE, Chen-Hua YU, Cheng-Chieh HSIEH, Yu-Jen LIEN, Yian-Liang KUO, Shih-Hao TSENG, Jen Yu WANG, Tzu-Chieh Chou
  • Publication number: 20250037667
    Abstract: A display panel includes a plurality of rows of pixel circuits, one or more rows of first dummy pixel circuits, a plurality of cascaded scanning driving units and at least one first dummy scanning driving unit. The plurality of rows of pixel circuits are arranged in a first direction. The one or more rows of first dummy pixel circuits are located on a side of the plurality of rows of pixel circuits in the first direction. Each scanning driving unit is configured to transmit a scanning signal to at least one row of pixel circuits. A first dummy scanning driving unit is cascaded to a first stage of scanning driving unit among the plurality of scanning driving units, and is configured to transmit; a cascade signal to the first stage of scanning driving unit; and transmit scanning signals to at least one row of first dummy pixel circuits.
    Type: Application
    Filed: February 1, 2023
    Publication date: January 30, 2025
    Inventors: Xing Zhang, Pan Xu, Ying Han, Chengyuan Luo, Donghui Zhao, Guangshuang Lv, Cheng Xu
  • Publication number: 20250033657
    Abstract: The relative position of a user equipment (UE) within a vehicle is determined using angular measurements, such as angle of arrival (AOA), and optionally ranging measurements, with respect to a number of wireless transceivers within the vehicle using wideband signals. The relative position of the UE with respect to a personal zone or the steering wheel may be determined based on known positions of the wireless transceivers. If the UE is determined to be within the personal zone, at least one functionality of the UE is restricted to avoid driver distraction and, optionally, the operation autonomous driving of the vehicle adjusted. If the UE is worn on the driver's wrist the relative position of the UE with respect to the steering wheel may be similarly determined and operation of the vehicle modified if the UE is determined to be outside a threshold distance from the steering wheel.
    Type: Application
    Filed: October 14, 2024
    Publication date: January 30, 2025
    Inventors: Santosh Kumar GUPTA, Shishir GUPTA, Constantinos Steven BEKIS, Liang ZHAO, Le Nguyen LUONG, Cheng-Han WANG
  • Patent number: 12207962
    Abstract: The present invention relates to a method for measuring muscle mass, including: a first selection step, wherein a frame selection information is obtained by using a frame to select a fascia region from a provided computed tomography image under the condition that the window width ranges from 300 HU to 500 HU and the window level ranges from 40 HU to 50 HU, wherein the selected range of the fascia region includes a muscle; and a second selection step, wherein a muscle information of the muscle is obtained by calculating a pixel value in the frame-selected fascia region under the condition that the HU value of the CT image ranges from ?29 HU to 150 HU.
    Type: Grant
    Filed: April 20, 2022
    Date of Patent: January 28, 2025
    Assignee: National Cheng Kung University
    Inventors: Yi-Shan Tsai, Yu-Hsuan Lai, Bow Wang, Cheng-Shih Lai, Chao-Yun Chen, Meng-Jhen Wu, Po-Tsun Kuo, Tsung-Han Lee
  • Patent number: 12211698
    Abstract: Provided is a material composition and method that includes forming a patterned resist layer on a substrate, where the patterned resist layer has a first line width roughness. In various embodiments, the patterned resist layer is coated with a treatment material, where a first portion of the treatment material bonds to surfaces of the patterned resist layer. In some embodiments, a second portion of the treatment material (e.g., not bonded to surfaces of the patterned resist layer) is removed, thereby providing a treated patterned resist layer, where the treated patterned resist layer has a second line width roughness less than the first line width roughness.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: January 28, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Siao-Shan Wang, Cheng-Han Wu, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 12211789
    Abstract: A method includes following steps. First transistors are formed over a substrate. An interconnect structure is formed over the plurality of first transistors. A dielectric layer is formed over the interconnect structure. 2D semiconductor seeds are formed over the dielectric layer. The 2D semiconductor seeds are annealed. An epitaxy process is performed to laterally grow a plurality of 2D semiconductor films respectively from the plurality of 2D semiconductor seeds. Second transistors are formed on the plurality of 2D semiconductor films.
    Type: Grant
    Filed: July 31, 2023
    Date of Patent: January 28, 2025
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Chenming Hu, Shu-Jui Chang, Chen-Han Chou, Yen-Teng Ho, Chia-Hsing Wu, Kai-Yu Peng, Cheng-Hung Shen
  • Patent number: 12211752
    Abstract: A method for forming a semiconductor device includes patterning a substrate to form a strip including a first semiconductor material, forming an isolation region along a sidewall of the strip, an upper portion of the strip extending above the isolation region, forming a dummy structure along sidewalls and a top surface of the upper portion of the strip, performing a first etching process on an exposed portion of the upper portion of the strip to form a first recess, the exposed portion of the strip being exposed by the dummy structure, after performing the first etching process, reshaping the first recess to have a V-shaped bottom surface using a second etching process, wherein the second etching process is selective to first crystalline planes having a first orientation relative to second crystalline planes having a second orientation, and epitaxially growing a source/drain region in the reshaped first recess.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: January 28, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien Lin, Kun-Yu Lee, Shahaji B. More, Cheng-Han Lee, Shih-Chieh Chang