Abstract: A device includes a fin extending from a semiconductor substrate; a gate stack over the fin; a first spacer on a sidewall of the gate stack; a source/drain region in the fin adjacent the first spacer; an inter-layer dielectric layer (ILD) extending over the gate stack, the first spacer, and the source/drain region, the ILD having a first portion and a second portion, wherein the second portion of the ILD is closer to the gate stack than the first portion of the ILD; a contact plug extending through the ILD and contacting the source/drain region; a second spacer on a sidewall of the contact plug; and an air gap between the first spacer and the second spacer, wherein the first portion of the ILD extends across the air gap and physically contacts the second spacer, wherein the first portion of the ILD seals the air gap.

Abstract: An array substrate and a display apparatus are provided The array substrate includes: at least one adjusting portion on the base substrate and having a first cross section in a plane perpendicular to the base substrate; first cross section includes top and bottom sides, first and second lateral sides; the bottom side is closer to the base substrate than the top side, an orthographic projection of the top side on the base substrate is within an orthographic projection of the bottom side on the base substrate; the first and/or second lateral sides is/are stepped; a buffer layer on a side of the adjusting portion away from the base substrate; light-emitting devices on a side of the buffer layer away from the base substrate and each including a first electrode, a light-emitting layer and a second electrode sequentially arranged along a direction away from the base substrate.

Abstract: The present disclosure relates to a method for treating a cancer and/or cancer metastasis in a subject comprising administering to the subject irinotecan loaded in a mesoporous silica nanoparticle. The present disclosure also provides a conjugate comprising an agent loaded in a mesoporous silica nanoparticle (MSN) defining at least one pore and having at least one functional group on a sidewall of the at least one pore.

Abstract: A portable electronic device includes a housing, a heat-dissipation component, a bracket, a door structure, a driving mechanism, and a driven linkage. The housing includes a heat-dissipation opening disposed in the housing. The bracket is disposed in the housing and surrounds the heat-dissipation component. The door structure is configured to move between a closed position covering the heat-dissipation opening and an open position exposing the heat-dissipation opening. The driving mechanism is coupled between the bracket and the door structure to drive the door structure to rotate and move. The driven linkage is coupled between the bracket and the door structure. When the door structure is driven to rotate and move, the door structure drives the driven linkage to rotate and move, so that the driven linkage and the driving mechanism jointly drive the door structure to move between the closed position and the open position.

Abstract: Provided are a passivation layer for forming a semiconductor bonding structure, a sputtering target making the same, a semiconductor bonding structure and a semiconductor bonding process. The passivation layer is formed on a bonding substrate by sputtering the sputtering target; the passivation layer and the sputtering target comprise a first metal, a second metal or a combination thereof. The bonding substrate comprises a third metal. Based on a total atom number of the surface of the passivation layer, O content of the surface of the passivation layer is less than 30 at %; the third metal content of the surface of the passivation layer is less than or equal to 10 at %. The passivation layer has a polycrystalline structure. The semiconductor bonding structure sequentially comprises a first bonding substrate, a bonding layer and a second bonding substrate: the bonding layer is mainly formed by the passivation layer and the third metal.

Abstract: The disclosure provides a method of active immunotherapy for a cancer patient, comprising administering vaccines against Globo series antigens (i.e., Globo H, SSEA-3 and SSEA-4). Specifically, the method comprises administering Globo H-CRM197 (OBI-833/821) in patients with cancer. The disclosure also provides a method of selecting a cancer patient who is suitable as treatment candidate for immunotherapy. Exemplary immune response can be characterized by reduction of the severity of disease, including but not limited to, prevention of disease, delay in onset of disease, decreased severity of symptoms, decreased morbidity and delayed mortality.

Abstract: Semiconductor structures and method for forming the same are provide. The semiconductor structure includes a fin structure protruding from a substrate and a gate structure formed across the fin structure. The semiconductor structure further includes an Arsenic-doped region formed in the fin structure and a source/drain structure formed over the Arsenic-doped region. In addition, a bottommost portion of the Arsenic-doped region is lower than a bottommost portion of the source/drain structure.

Abstract: A packet sorting and reassembly circuit module, including a header parser, an information processing circuit, at least one state tracking and reassembly circuit, and an output arbiter, is provided. The header parser is configured to analyze multiple first packet segments to obtain header information corresponding to a first network packet, wherein the first network packet is transmitted based on a transmission control protocol (TCP) communication protocol. The information processing circuit is configured to transmit the first packet segments and sideband information corresponding to the first packet segments to a first state tracking and reassembly circuit among the at least one state tracking and reassembly circuit according to the header information. The first state tracking and reassembly circuit is configured to reassemble and sort the first packet segments according to the sideband information. The output arbiter is configured to output the first packet segments according to a sorting result.

Abstract: Aspects described herein include devices and methods for smart ultra wideband transmissions. In one aspect, an apparatus includes pulse generation circuitry configured to output a plurality of transmission (TX) pulse samples at a selected signal sample rate, where each pulse sample of the plurality of TX pulse samples comprises a value associated with a pulse amplitude at a corresponding sample time The apparatus includes a plurality of power amplifier (PA) cells, with each PA cell of the plurality of PA cells comprising a corresponding current source and associated gates, and where the associated gates of a PA cell are selectable to configure an on state and an off state. Logic circuitry of the apparatus is configured to set the on state or the off state for each PA cell.

Abstract: Some implementations described herein include systems and techniques for fabricating a semiconductor die package that includes a cooling interface region formed in surface of an integrated circuit die. The cooling interface region, which includes a combination of channel regions and pillar structures, may be directly exposed to a fluid above and/or around the semiconductor die package.

Abstract: One or more embodiments of the present description provide a method and device for risk prediction of thermal runaway in LIB. The method includes: acquiring knowledge of a mechanism for thermal runaway in LIB; describing an evolution process of thermal runaway in LIB by adopting a fault tree; mapping a fault tree structure to a dynamic Bayesian network model for thermal runaway in LIB to obtain quantitative results of a risk of thermal runaway in LIB; and taking the quantitative results of a dynamic Bayesian network as inputs of a machine learning model to obtain prediction results of the risk of thermal runaway. By using the method in the present embodiment, an evolution trend of battery thermal runaway can be predicted by fusing multiple thermal runaway causes and multi-source data, and thus, the prediction results are relatively accurate.

Abstract: An imaging system lens assembly includes a first lens group and a second lens group. The first lens group includes a first catadioptric lens element and a second catadioptric lens element, the second lens group includes at least one lens element. Each of an object-side surface and an image-side surface of the first catadioptric lens element and the second catadioptric lens element includes a central region and a peripheral region. The peripheral region of the object-side surface of the first catadioptric lens element includes a first refracting surface. The peripheral region of the image-side surface of the second catadioptric lens element includes a first reflecting surface. The central region of the object-side surface of the first catadioptric lens element includes a second reflecting surface. The central region of the image-side surface of the second catadioptric lens element includes a last refracting surface.

Abstract: A temperature-sensitive automatic rapid gas generation fire extinguishing device is provided, including a box body; a plurality of heat absorption fire extinguishing units are placed on an inner side wall of the box body, and a first trigger unit is arranged between one of the heat absorption fire extinguishing units close to the first baffle and the inner side wall of the box body; the one of the heat absorption fire extinguishing units triggers the first baffle to move down through the first trigger unit, and a relatively closed space is formed in the box body; a plurality of gas generation fire extinguishing units are placed on an inner side wall of the box body, and a second trigger unit is arranged between one of the gas generation fire extinguishing units close to the second baffle and the inner side wall of the box body.

Abstract: A catadioptric optical membrane, which is disposed on a surface of a substrate, includes a reflection membrane and a matting membrane. The reflection membrane is disposed on an effective optical path area of the substrate and includes a reflection metal membrane and a reflection oxidation membrane. The reflection oxidation membrane includes a first reflection oxidation membrane and a second reflection oxidation membrane. The reflection metal membrane is farther away from the substrate than the first reflection oxidation membrane. The second reflection oxidation membrane is farther away from the substrate than the reflection metal membrane. The matting membrane is disposed on a non-effective optical path area of the substrate. The matting membrane includes a deep-color membrane and a first anti-reflection membrane. The deep-color membrane includes a deep-color metal membrane and a deep-color oxidation membrane. The deep-color membrane is farther away from the substrate than the first anti-reflection membrane.

Abstract: A fan is provided herein, including a housing, a hub, and a plurality of blades. The housing includes a top case and a bottom case. The hub is rotatably disposed between the top case and the bottom case in an axial direction. The blades extend from the hub in a radial direction, located between the top case and the bottom case. Each of the blades has a proximal end and a distal end. The proximal end is connected to the hub. The distal end is opposite from the proximal end, located at the other side of the blade, having at least one recessed portion. Each of the recessed portions form a passage for air.

Abstract: The present invention provides a latching guide structure arranged inside a door of semiconductor carrier. The latching guide structure comprises an upper latching part, a lower latching part, at least one elastic unit and a driver. Moreover, a first guiding portion of the upper latching part is matched with a second guiding portion of the lower latching part, therefore to define the installation space for the at least one elastic unit. On the other hand, the driver simultaneously actuates an upper actuating unit of the first guiding portion and a lower actuating unit of the second guiding portion to linearly move in reverse direction therebetween. The range of the linear motion of the upper actuating unit and the lower actuating unit represents the compression or extension of the at least one elastic unit, determining to control the open/close status of the upper latching part and the lower latching part.

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a gate structure over the substrate, and a source/drain (S/D) region adjacent to the gate structure. The S/D region can include first and second side surfaces separated from each other. The S/D region can further include top and bottom surfaces between the first and second side surfaces. A first separation between the top and bottom surfaces can be greater than a second separation between the first and second side surfaces.

Abstract: In one example, a keyboard housing may include a chassis, a plurality of keys exposed through a top surface of the chassis, and an input device assembly connected to the chassis. The input device assembly may include a flexible touch sensing component to receive a touch input and a support structure. The support structure may include a first portion and a second portion foldable onto the first portion. The first portion and the second portion may support the flexible touch sensing component.