Patents by Inventor Cheng Han

Cheng Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250053243
    Abstract: A laptop computer includes a body, a bracket disposed in the body, a latching member movably disposed on the bracket, a first key module detachably assembled onto the bracket, and a second key module disposed on the bracket. A part of the first key module is located on a moving path of the latching member. The latching member is adapted to be driven by an external force to push the part of the first key module away from the bracket.
    Type: Application
    Filed: January 5, 2024
    Publication date: February 13, 2025
    Applicant: Acer Incorporated
    Inventors: Hung-Chi Chen, Cheng-Han Lin
  • Patent number: 12224786
    Abstract: Dynamic tuning method for a specific absorption rate (SAR) is provided. The dynamic tuning method is applied to user equipment (UE). The dynamic tuning method may include the following steps: the UE may determine the back-off value corresponding to the current antenna state; and the UE may tune the conducted power of the radio frequency (RF) circuit of the UE based on the back-off value.
    Type: Grant
    Filed: September 8, 2022
    Date of Patent: February 11, 2025
    Assignee: MEDIATEK INC.
    Inventors: Chun-Yen Wu, Cheng-Han Lee
  • Patent number: 12222654
    Abstract: A method includes illuminating radiation to a resist layer over a substrate to pattern the resist layer. The patterned resist layer is developed by using a positive tone developer. The patterned resist layer is rinsed using a basic aqueous rinse solution. A pH value of the basic aqueous rinse solution is lower than a pH value of the developer, and a rinse temperature of rinsing the patterned resist layer is in a range of about 20° C. to about 40° C.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: February 11, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ming-Hui Weng, Chen-Yu Liu, Cheng-Han Wu, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 12215096
    Abstract: Hydantoin based compounds useful as inhibitors of matrix metalloproteinases (MMPs), particularly macrophage elastase (MMP-12) are described. Also described are related compositions and methods of using the compounds to inhibit MMP-12 and treat diseases mediated by MMP-12, such as asthma, chronic obstructive pulmonary disease (COPD), emphysema, acute lung injury, idiopathic pulmonary fibrosis (IPF), sarcoidosis, systemic sclerosis, liver fibrosis, nonalcoholic steatohepatitis (NASH), arthritis, cancer, heart disease, inflammatory bowel disease (IBD), acute kidney injury (AKI), chronic kidney disease (CKD), Alport syndrome, and nephritis.
    Type: Grant
    Filed: July 6, 2023
    Date of Patent: February 4, 2025
    Assignee: Foresee Pharmaceuticals USA, Inc.
    Inventors: Wenjin Yang, Kai-Wei Chang, Suying Liu, Cheng-Han Tsai
  • Patent number: 12219849
    Abstract: An array substrate and a display apparatus are provided The array substrate includes: at least one adjusting portion on the base substrate and having a first cross section in a plane perpendicular to the base substrate; first cross section includes top and bottom sides, first and second lateral sides; the bottom side is closer to the base substrate than the top side, an orthographic projection of the top side on the base substrate is within an orthographic projection of the bottom side on the base substrate; the first and/or second lateral sides is/are stepped; a buffer layer on a side of the adjusting portion away from the base substrate; light-emitting devices on a side of the buffer layer away from the base substrate and each including a first electrode, a light-emitting layer and a second electrode sequentially arranged along a direction away from the base substrate.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: February 4, 2025
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xing Fan, Xin Li, Cheng Han, Yansong Li
  • Patent number: 12218431
    Abstract: The invention provides an antenna subsystem with improved radiation performances. The antenna subsystem may comprise an antenna-in-module (AiM), an auxiliary structure being conductive, and a support structure being nonconductive and disposed between the AiM and the auxiliary structure. The AiM may comprise a base, and one or more radiators being conductive. The antenna subsystem may provide a spherical coverage by a combination of a first component of gain and a second component of gain. The auxiliary structure may be insulated from the one or more radiators, and may be configured for orienting a radiation pattern of the first component of gain and a radiation pattern of the second component of gain to two different directions respectively; and/or, causing the spherical coverage provided by the antenna subsystem to be broader than a spherical coverage provided by the AiM alone.
    Type: Grant
    Filed: January 30, 2023
    Date of Patent: February 4, 2025
    Assignee: MEDIATEK INC.
    Inventors: Wei-Hsuan Chang, Cheng-Han Lee, Chih-Wei Lee
  • Patent number: 12219819
    Abstract: A display substrate includes a first electrode layer, a pixel define layer, an organic light-emitting layer, a second electrode layer and a first encapsulation layer which are sequentially disposed away from an base substrate. The pixel define layer has a plurality of openings, at least one of which exposes the first electrode layer. The pixel define layer has a first climbing part and a second climbing part close to the edge of at least one opening, the distance from a surface of the second climbing part away from the base substrate to the base substrate is greater than the distance from a surface of the first climbing part away from the base substrate to the base substrate, and the slope angle of the first climbing part is different from that of the second climbing part.
    Type: Grant
    Filed: April 26, 2021
    Date of Patent: February 4, 2025
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Xing Fan, Shantao Chen, Xin Li, Hao Gao, Cheng Han, Yansong Li
  • Patent number: 12213971
    Abstract: The present disclosure generally relates to compounds class I HDAC inhibitors, their production and applications. The compounds possess epigenetic immunomodulatory activities in the tumor microenvironment (TME) and thus inhibit growth of tumor cells.
    Type: Grant
    Filed: May 1, 2023
    Date of Patent: February 4, 2025
    Assignee: GREAT NOVEL THERAPEUTICS BIOTECH & MEDICALS CORPORATION
    Inventors: Jia-Shiong Chen, Mu-Hsuan Yang, Yi-Hong Wu, Sz-Hao Chu, Cheng-Han Chou, Ye-Su Chao, Chia-Nan Chen
  • Publication number: 20250040342
    Abstract: The present disclosure provides a display panel, and belongs to the technical field of display. The display panel in the present application includes a base substrate and a plurality of pixel units on the base substrate. Each of the pixel units includes a plurality of light-emitting units emitting light in different colors. Each of the the plurality of light-emitting unit includes a first electrode, an organic functional layer and a second electrode stacked sequentially along a direction away from the base substrate. Among the plurality of light-emitting units emitting light in different colors in each pixel unit, the second electrode of the light-emitting unit emitting light with a shortest wavelength has a smallest thickness along a direction perpendicular to the base substrate.
    Type: Application
    Filed: November 29, 2022
    Publication date: January 30, 2025
    Inventors: Xiangmin WEN, Na BI, Yansong LI, Haidong WU, Yan FAN, Hao GAO, Cheng HAN
  • Publication number: 20250033657
    Abstract: The relative position of a user equipment (UE) within a vehicle is determined using angular measurements, such as angle of arrival (AOA), and optionally ranging measurements, with respect to a number of wireless transceivers within the vehicle using wideband signals. The relative position of the UE with respect to a personal zone or the steering wheel may be determined based on known positions of the wireless transceivers. If the UE is determined to be within the personal zone, at least one functionality of the UE is restricted to avoid driver distraction and, optionally, the operation autonomous driving of the vehicle adjusted. If the UE is worn on the driver's wrist the relative position of the UE with respect to the steering wheel may be similarly determined and operation of the vehicle modified if the UE is determined to be outside a threshold distance from the steering wheel.
    Type: Application
    Filed: October 14, 2024
    Publication date: January 30, 2025
    Inventors: Santosh Kumar GUPTA, Shishir GUPTA, Constantinos Steven BEKIS, Liang ZHAO, Le Nguyen LUONG, Cheng-Han WANG
  • Patent number: 12211698
    Abstract: Provided is a material composition and method that includes forming a patterned resist layer on a substrate, where the patterned resist layer has a first line width roughness. In various embodiments, the patterned resist layer is coated with a treatment material, where a first portion of the treatment material bonds to surfaces of the patterned resist layer. In some embodiments, a second portion of the treatment material (e.g., not bonded to surfaces of the patterned resist layer) is removed, thereby providing a treated patterned resist layer, where the treated patterned resist layer has a second line width roughness less than the first line width roughness.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: January 28, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Siao-Shan Wang, Cheng-Han Wu, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 12211752
    Abstract: A method for forming a semiconductor device includes patterning a substrate to form a strip including a first semiconductor material, forming an isolation region along a sidewall of the strip, an upper portion of the strip extending above the isolation region, forming a dummy structure along sidewalls and a top surface of the upper portion of the strip, performing a first etching process on an exposed portion of the upper portion of the strip to form a first recess, the exposed portion of the strip being exposed by the dummy structure, after performing the first etching process, reshaping the first recess to have a V-shaped bottom surface using a second etching process, wherein the second etching process is selective to first crystalline planes having a first orientation relative to second crystalline planes having a second orientation, and epitaxially growing a source/drain region in the reshaped first recess.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: January 28, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien Lin, Kun-Yu Lee, Shahaji B. More, Cheng-Han Lee, Shih-Chieh Chang
  • Publication number: 20250030446
    Abstract: A method for TA-SAR optimization with an antenna tuner is provided. The antenna tuner has multiple tuner states. An instant SAR level that is higher than a threshold SAR level is calculated. A suitable tuner among the multiple tuner states is determined based on the instant SAR level. The tuner is switched to the suitable tuner state to transmit signals with the TX power level corresponding to the suitable tuner state.
    Type: Application
    Filed: July 19, 2023
    Publication date: January 23, 2025
    Inventors: Cheng-Han LEE, Yu-Han CHENG, Chih-Wei LEE
  • Publication number: 20250029550
    Abstract: A display panel and a pixel circuit thereof are provided. A pulse width signal generator turns on a charge sharing switch during a light-emitting period, and performs charge sharing with a control end of a positive feedback switch of a positive feedback circuit, so as to control the positive feedback switch to provide a positive feedback voltage to the pulse width signal generator to increase a voltage at an output end of the pulse width signal generator and thus to accelerate a rising speed of a voltage for controlling a driving current generator to provide a driving current.
    Type: Application
    Filed: July 16, 2024
    Publication date: January 23, 2025
    Applicant: AUO Corporation
    Inventors: Chih-Lung Lin, Yi-Jui Chen, Cheng-Han Ke, Ming-Yang Deng, Chia-Tien Peng
  • Patent number: 12202500
    Abstract: The relative position of a user equipment (UE) within a vehicle is determined using angular measurements, such as angle of arrival (AOA), and optionally ranging measurements, with respect to a number of wireless transceivers within the vehicle using wideband signals. The relative position of the UE with respect to a personal zone or the steering wheel may be determined based on known positions of the wireless transceivers. If the UE is determined to be within the personal zone, at least one functionality of the UE is restricted to avoid driver distraction and, optionally, the operation autonomous driving of the vehicle adjusted. If the UE is worn on the driver's wrist the relative position of the UE with respect to the steering wheel may be similarly determined and operation of the vehicle modified if the UE is determined to be outside a threshold distance from the steering wheel.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: January 21, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Santosh Kumar Gupta, Shishir Gupta, Constantinos Steven Bekis, Liang Zhao, Le Nguyen Luong, Cheng-Han Wang
  • Publication number: 20250022945
    Abstract: Various embodiments of the present disclosure provide a semiconductor device structure. In one embodiment, the semiconductor device structure includes a first source/drain feature and a second source/drain feature, a plurality of semiconductor layers vertically stacked and disposed between the first and second source/drain features, a gate electrode layer surrounding a portion of each of the plurality of the semiconductor layers, and an interfacial layer (IL) disposed between the gate electrode layer and one of the plurality of the semiconductor layers, wherein a topmost semiconductor layer of the plurality of the semiconductor layers has a first length, and the IL has a second length greater than the first length.
    Type: Application
    Filed: July 14, 2023
    Publication date: January 16, 2025
    Inventors: Chung-En TSAI, Sheng-Syun WONG, Cheng-Han LEE, Chih-Yu MA, Shih-Chieh CHANG
  • Publication number: 20250022925
    Abstract: A semiconductor device and a method of fabricating the semiconductor device are disclosed. The method includes forming a fin base on a substrate, epitaxially growing a S/D region on the fin base, forming a contact opening on the S/D region, forming a semiconductor nitride layer on a sidewall of the contact opening, performing a densification process on the semiconductor nitride layer to form a densified semiconductor nitride layer, forming a silicide layer on an exposed surface of the S/D region in the contact opening, forming a contact plug in the contact opening, and forming a via structure in the contact plug.
    Type: Application
    Filed: July 12, 2023
    Publication date: January 16, 2025
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fan Hsuan CHIEN, Kai-Shiung HSU, Shih-Chi LIN, Cheng-Han TSAI, Pei Yen CHENG
  • Patent number: 12194917
    Abstract: A light-emitting device is provided. The light-emitting device includes a light-emitting diode, a reflective structure, and a package structure. The reflective structure includes a bottom surface and a lateral part. The light-emitting diode is disposed on the bottom surface. The lateral part is disposed surrounding the bottom surface and disposed on the bottom surface. The package structure is configured to package the light-emitting diode and the reflective structure. The package structure includes a first package part and a second package part. The first package part has a phosphorescent powder. An interface is between the first package part and the second package part. The interface is disposed below a top surface of the lateral part.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: January 14, 2025
    Assignee: Lite-On Technology Corporation
    Inventors: Cheng-Han Wang, Cheng-Hong Su, Chih-Li Yu
  • Publication number: 20250015140
    Abstract: The present disclosure describes a semiconductor device includes a substrate, a buffer layer on the substrate, and a stacked fin structure on the buffer layer. The buffer layer can include germanium, and the stacked fin structure can include a semiconductor layer with germanium and tin. The semiconductor device further includes a gate structure wrapped around a portion of the semiconductor layer and an epitaxial structure on the buffer layer and in contact with the semiconductor layer. The epitaxial structure includes germanium and tin.
    Type: Application
    Filed: September 23, 2024
    Publication date: January 9, 2025
    Applicant: Taiwean Semiconductor Manufacturing Company, Ltd.
    Inventors: Shahaji B. MORE, Cheng-Han LEE, Chee-Wee LIU, Chung-En TSAI, Shih-Ya LIN, Shih-Chieh CHANG
  • Publication number: 20250015129
    Abstract: In a method of manufacturing a semiconductor device, a fin structure in which first semiconductor layers and second semiconductor layers are alternately stacked is formed, a sacrificial gate structure is formed over the fin structure, a source/drain region of the fin structure, which is not covered by the sacrificial gate structure, is etched, thereby forming a source/drain space, the first semiconductor layers are laterally etched through the source/drain space, and a source/drain epitaxial layer is formed in the source/drain space. An inner spacer made of a dielectric material is formed on an end of each of the etched first semiconductor layers and at least one of the spacer has width changes along vertical direction of device. At least one of the first semiconductor layers has a composition different from another of the first semiconductor layers.
    Type: Application
    Filed: September 17, 2024
    Publication date: January 9, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shu KUAN, Shahaji B. MORE, Chien LIN, Cheng-Han LEE, Shih-Chieh CHANG