Patents by Inventor Cheng Han

Cheng Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250008805
    Abstract: A display substrate includes a light emitting element on a base substrate; and a light modulating structure on a side of the light emitting element away from the base substrate. The light modulating structure includes a color filter layer and a substantially transparent layer on a side of the color filter layer away from the base substrate. The color filter layer includes a plurality of color filter units, a respective color filter unit of the plurality of color filter units being in an individual subpixel. Adjacent color filter units are spaced apart by a portion of the substantially transparent layer that extends into a region between the adjacent color filter units. An orthographic projection of the respective color filter unit on the base substrate at least partially overlaps with an orthographic projection of a light emitting layer of the light emitting element on the base substrate.
    Type: Application
    Filed: November 24, 2022
    Publication date: January 2, 2025
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Cheng Han, Qixiao Wu, Zhihui Zhang, Yanqiang Wang, Songquan Wu, Yanming Wang, Xu Li, Le Wang, Lihui Luo, Yansong Li
  • Patent number: 12182335
    Abstract: A head mounted display, tapping input signal generating method, and non-transitory computer readable storage medium thereof are provided. Based on a plurality of real-time images, the head-mounted display determines whether a first finger among the plurality of fingers corresponds to a tapping pattern. The head-mounted display determines whether a sensing signal received from a wearable device matches a tapping gesture of the first finger in response to having the first finger among the fingers corresponding to the tapping pattern. The head-mounted display generates a tapping input signal corresponding to the first finger in response to the sensing signal matching the tapping gesture of the first finger.
    Type: Grant
    Filed: April 13, 2023
    Date of Patent: December 31, 2024
    Assignee: HTC Corporation
    Inventors: Chao-Hsiang Lai, Cheng-Han Hsieh, HsinYu Feng
  • Publication number: 20240420751
    Abstract: An electronic device and a control method for memory refresh operation thereof are provided. The electronic device includes a memory and a controller. The memory includes a plurality of timers, a plurality of buffers and an interrupt signal generator. Each of the buffers is configured to store at least one word line information, and generate a refresh word line information according to a timing result trigger signal of each corresponding timer. The interrupt signal generator generates an interrupt signal corresponding to an auto refresh operation according to the timing result trigger signal, a non-internal self-refresh mode signal and a non-accessing status. The controller receives the interrupt signal and transmits an auto refresh command to the memory according to the interrupt signal to enable the memory to perform the auto refresh operation.
    Type: Application
    Filed: September 26, 2023
    Publication date: December 19, 2024
    Applicant: Winbond Electronics Corp.
    Inventors: Chien-Ti Hou, Ying-Te Tu, Cheng Han Lee
  • Publication number: 20240413223
    Abstract: A method for manufacturing a semiconductor structure includes: forming a channel portion on a fin portion; forming two source/drain portions on the fin portion and at two opposite sides of the channel portion, in which each of the two source/drain portions includes a first semiconductor material that is doped with dopant impurities; and forming two bottom portions each of which is disposed between the fin portion and a corresponding one of the two source/drain portions, in which each of the two bottom portions includes a second semiconductor material that is different from the first semiconductor material and that is capable of trapping the dopant impurities when the dopant impurities in the first semiconductor material diffuse toward the fin portion.
    Type: Application
    Filed: June 8, 2023
    Publication date: December 12, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chung-En TSAI, Chih-Yu MA, Cheng-Han LEE, Shih-Chieh CHANG, Sheng-Syun WONG
  • Publication number: 20240406355
    Abstract: A temperature control module and a temperature control method, which are suitable for a projector. A thermal sensor is disposed on the projector and suitable for sensing the ambient temperature to generate an ambient temperature sensing signal. A cooling device is disposed on the projector and suitable for cooling a target element of the projector. When the projector is in a brightness adjustment mode, a control circuit generates a control signal to the cooling device according to the ambient temperature sensing signal from the thermal sensor and the brightness setting signal of the projector. The cooling device adjusts the temperature regulation operation performed on the target element according to the control signal.
    Type: Application
    Filed: May 17, 2024
    Publication date: December 5, 2024
    Applicant: Coretronic Corporation
    Inventor: Cheng-Han Lu
  • Publication number: 20240405060
    Abstract: A display substrate, a mask assembly and a display panel are provided. The display substrate includes: pixel units arranged in an array and including first pixel units and second pixel units, where, in a row direction, the first pixel units and the second pixel units are alternately arranged; in a column direction, the first pixel units and the second pixel units are alternately arranged; the first pixel unit includes a first sub-pixel, two second sub-pixels, and a third sub-pixel in a virtual quadrilateral; the second pixel unit includes a first sub-pixel, two second sub-pixels, and a third sub-pixel in a virtual hexagon; where adjacent first pixel unit and second pixel unit in the column direction share a first sub-pixel or a third sub-pixel, and adjacent first pixel unit and second pixel unit in the row direction share a second sub-pixel.
    Type: Application
    Filed: June 9, 2023
    Publication date: December 5, 2024
    Inventors: Xinxing GUAN, Na BI, Jianing LIU, Cheng HAN, Shun WANG, Shuang ZHENG, Qihao ZENG, Hao LIU
  • Publication number: 20240395937
    Abstract: A source/drain region of a semiconductor device is formed using an epitaxial growth process. In an embodiment a first step comprises forming a bulk region of the source/drain region using a first precursor, a second precursor, and an etching precursor. A second step comprises cleaning the bulk region with the etchant along with introducing a shaping dopant to the bulk region in order to modify the crystalline structure of the exposed surfaces. A third step comprises forming a finishing region of the source/drain region using the first precursor, the second precursor, and the etching precursor.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 28, 2024
    Inventors: Yi-Min Huang, Shih-Chieh Chang, Cheng-Han Lee
  • Publication number: 20240397799
    Abstract: A light-emitting panel and a manufacturing method thereof, and a light-emitting apparatus are provided, which relate to the technical field of photoelectric technology. The light-emitting panel includes: a light-emitting substrate including a light-emitting area and a non-light-emitting area surrounding the light-emitting area; a first packaging layer disposed at a light emitting side of the light-emitting substrate; a low refractive index layer disposed at a side of a first packaging layer away from the light-emitting substrate, the low refractive index layer being arranged around the light-emitting area; a high refractive index layer disposed at sides of the low refractive index layer and the first packaging layer away from the light-emitting substrate, an orthographic projection of the high refractive index layer on the light-emitting substrate covering the light-emitting area, and the high refractive index layer covering a side surface of the low refractive index layer facing the light-emitting area.
    Type: Application
    Filed: September 28, 2022
    Publication date: November 28, 2024
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Cheng Han, Qixiao Wu, Songquan Wu, Xu Li, Yanming Wang, Xiangmin Wen, Yansong Li
  • Publication number: 20240395582
    Abstract: A method of controlling a feedback control system of a semiconductor process chemical fluid in a storage tank includes performing a fluid quality measurement of fluid by a spectrum analyzer positioned adjacent to a dispensing port of the storage tank, and determining whether a variation in fluid quality measurement of the fluid is within an acceptable range. The method further includes in response to a variation in fluid quality measurement that is not within the acceptable range of variation in fluid quality measurement, automatically adjusting a configurable parameter of the semiconductor process chemical fluid in the storage tank to set the variation in fluid quality measurement of the fluid within the acceptable range.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 28, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Yang LIN, Cheng-Han WU, Chen-Yu LIU, Kuo-Shu TSENG, Shang-Sheng LI, Chen Yi HSU, Yu-Cheng CHANG
  • Patent number: 12154951
    Abstract: The present disclosure describes a semiconductor device includes a substrate, a buffer layer on the substrate, and a stacked fin structure on the buffer layer. The buffer layer can include germanium, and the stacked fin structure can include a semiconductor layer with germanium and tin. The semiconductor device further includes a gate structure wrapped around a portion of the semiconductor layer and an epitaxial structure on the buffer layer and in contact with the semiconductor layer. The epitaxial structure includes germanium and tin.
    Type: Grant
    Filed: March 6, 2023
    Date of Patent: November 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shahaji B. More, Cheng-Han Lee, Shih-Chieh Chang, Shih-Ya Lin, Chung-En Tsai, Chee-Wee Liu
  • Patent number: 12150427
    Abstract: An intelligent defecation device for living creature includes a device body, a supporting portion, an image module, and a first analysis module. The supporting portion is formed within the inner side of the device body for accommodating a moisture absorption member so as to allow the living creature to leave over its excrement therein. The image module is also arranged at the device body for dynamically capturing the images of the excrement in the supporting portion and outputting the image. The first analysis module is arranged in the device body and connected with the image module to analyze and calculate the defecation mode with the image based on preset or accumulated data, so as to generate a signal when an abnormal defecation mode is diagnosed.
    Type: Grant
    Filed: January 12, 2023
    Date of Patent: November 26, 2024
    Assignee: LuluPet Co., Ltd.
    Inventors: James Cheng-Han Wu, Pei-Hsuan Shih, Chun-Ming Su, You-Gang Kuo, Ning-Yuan Lyu, Chi-Yeh Hsu, Liang-Hao Huang
  • Publication number: 20240387735
    Abstract: A semiconductor device includes semiconductor wires or sheets disposed over a substrate, a source/drain epitaxial layer in contact with the semiconductor wires or sheets, a gate dielectric layer disposed on and wrapping around each channel region of the semiconductor wires or sheets, a gate electrode layer disposed on the gate dielectric layer and wrapping around each channel region, and insulating spacers disposed in spaces, respectively. The spaces are defined by adjacent semiconductor wires or sheets, the gate electrode layer and the source/drain region. The source/drain epitaxial layer includes multiple doped SiGe layers having different Ge contents and at least one of the source/drain epitaxial layers is non-doped SiGe or Si.
    Type: Application
    Filed: July 30, 2024
    Publication date: November 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shahaji B. MORE, Shih-Chieh CHANG, Cheng-Han LEE, Pei-Shan LEE
  • Publication number: 20240387292
    Abstract: A method for forming a semiconductor device includes patterning a substrate to form a strip including a first semiconductor material, forming an isolation region along a sidewall of the strip, an upper portion of the strip extending above the isolation region, forming a dummy structure along sidewalls and a top surface of the upper portion of the strip, performing a first etching process on an exposed portion of the upper portion of the strip to form a first recess, the exposed portion of the strip being exposed by the dummy structure, after performing the first etching process, reshaping the first recess to have a V-shaped bottom surface using a second etching process, wherein the second etching process is selective to first crystalline planes having a first orientation relative to second crystalline planes having a second orientation, and epitaxially growing a source/drain region in the reshaped first recess.
    Type: Application
    Filed: July 27, 2024
    Publication date: November 21, 2024
    Inventors: Chien Lin, Kun-Yu Lee, Shahaji B. More, Cheng-Han Lee, Shih-Chieh Chang
  • Publication number: 20240389439
    Abstract: A display panel comprises: a base substrate; a display function layer, comprising multiple light-emitting elements; a light-exit angle limiting layer, comprising a first light-blocking region and multiple first light-exit regions corresponding to multiple light-emitting elements on a one-to-one basis, an orthographic projection of each first light-exit region on the base substrate overlapping with an orthographic projection of a corresponding light-emitting element on the base substrate; a dimming function layer, comprising multiple dimming structures corresponding to multiple light-emitting elements on a one-to-one basis, an orthographic projection of each dimming structure on the base substrate not overlapping with an orthographic projection of a corresponding light-emitting element on the base substrate, the dimming structure being configured to change a direction of propagation of part of the light that is emitted by the corresponding light-emitting element and directed toward the first light-blocking reg
    Type: Application
    Filed: June 6, 2023
    Publication date: November 21, 2024
    Inventors: Qixiao WU, Xu LI, Cheng HAN, Hao GAO, Zhihui ZHANG, Weiye ZHENG
  • Publication number: 20240389213
    Abstract: A dispensing system includes a dispense material supply that contains a dispense material and a dispensing pump connected downstream from the dispense material supply. The dispensing pump includes a body made of a first electrically conductive material, one or more first electrical contacts that are disposed on the body of the dispensing pump, and one or more first connection wires that are coupled between each one of the one or more first electrical contacts and ground. The dispensing system also includes a dispensing nozzle connected downstream from the dispensing pump and includes a tube made of a second electrically conductive material, one or more second electrical contacts that are disposed on an outer surface of the tube, and one or more second connection wires that are coupled between each one of the one or more second electrical contacts and the ground.
    Type: Application
    Filed: July 29, 2024
    Publication date: November 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Yang LIN, Yu-Cheng CHANG, Cheng-Han WU, Shang-Sheng LI, Chen-Yu LIU, Chen Yi HSU
  • Patent number: 12147614
    Abstract: A system and a method for remotely controlling extended reality by a virtual mouse are provided. The system includes a head mounted display and a first remote controller for being worn on a hand. The head mounted display includes an image capture device. The first remote controller communicatively connects to the head mounted display, wherein the head mounted display is configured to: capture an image through the image capture device; detect the image to obtain first data of the hand in the image and second data of a plane in the image; and enable the virtual mouse according to the first data and the second data.
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: November 19, 2024
    Assignee: HTC Corporation
    Inventors: Chao-Hsiang Lai, Cheng-Han Hsieh, Tzu-Yin Chang
  • Patent number: 12149169
    Abstract: A power converter having a multi-slope compensation mechanism is provided. A multi-slope compensation circuit of the power converter includes a plurality of first capacitors, a comparator and a plurality of first resistors. A first terminal of each of the plurality of first capacitors and a node between a second terminal of a high-side switch and a first terminal of a low-side switch are connected to an inductor. A plurality of first input terminals of a comparator are respectively connected to second terminals of the plurality of first capacitors, and are respectively connected to first terminals of the plurality of first resistors. Second terminals of the plurality of first resistors are coupled to a second reference voltage. A second input terminal of the comparator is coupled to a first reference voltage. An output terminal of the comparator is connected to an input terminal of a driver circuit.
    Type: Grant
    Filed: October 20, 2022
    Date of Patent: November 19, 2024
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Cheng-Han Wu, Fu-Chuan Chen
  • Patent number: 12148794
    Abstract: In a method of manufacturing a semiconductor device, a fin structure in which first semiconductor layers and second semiconductor layers are alternately stacked is formed, a sacrificial gate structure is formed over the fin structure, a source/drain region of the fin structure, which is not covered by the sacrificial gate structure, is etched, thereby forming a source/drain space, the first semiconductor layers are laterally etched through the source/drain space, and a source/drain epitaxial layer is formed in the source/drain space. An inner spacer made of a dielectric material is formed on an end of each of the etched first semiconductor layers and at least one of the spacer has width changes along vertical direction of device. At least one of the first semiconductor layers has a composition different from another of the first semiconductor layers.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: November 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shu Kuan, Shahaji B. More, Chien Lin, Cheng-Han Lee, Shih-Chieh Chang
  • Publication number: 20240379669
    Abstract: Epitaxial source/drain structures for enhancing performance of multigate devices, such as fin-like field-effect transistors (FETs) or gate-all-around (GAA) FETs, and methods of fabricating the epitaxial source/drain structures, are disclosed herein. An exemplary source/drain structure extends from a topmost channel layer to a depth into a semiconductor substrate. The source/drain structure includes an undoped epitaxial layer with a trough-shaped top surface, a first doped epitaxial layer over the undoped epitaxial layer, a second doped epitaxial layer over the first epitaxial layer, and a third doped epitaxial layer over the second doped epitaxial layer. A thickness of the undoped epitaxial layer is less than the depth of the epitaxial source/drain structure into the semiconductor substrate.
    Type: Application
    Filed: July 25, 2024
    Publication date: November 14, 2024
    Inventors: Shahaji B. More, Cheng-Han Lee
  • Publication number: 20240379861
    Abstract: Methods and semiconductor structures are provided. A method according to the present disclosure includes forming, over a substrate, a fin-shaped structure that includes a plurality of channel layers interleaved by a plurality of sacrificial layers, recessing a source/drain region of the fin-shaped structure to form a source/drain recess that extends into the substrate and exposes a portion of the substrate, selectively and partially recessing sidewalls of the plurality of sacrificial layers to form inner spacer recesses, forming inner spacers in the inner spacer recesses, selectively forming a buffer semiconductor layer on the exposed portion of the substrate, selectively depositing a first epitaxial layer on sidewalls of the plurality of channel layer and the buffer semiconductor layer such that a top surface of the buffer semiconductor layer is completely covered by the first epitaxial layer, and depositing a second epitaxial layer over the first epitaxial layer and the inner spacers.
    Type: Application
    Filed: July 24, 2024
    Publication date: November 14, 2024
    Inventors: Shahaji B. More, Cheng-Han Lee