Patents by Inventor Cheng-Han Wang

Cheng-Han Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11616517
    Abstract: Apparatuses and methods are disclosed regarding a multiband transmitter. In an example aspect, an apparatus for processing signals for wireless transmission includes a wireless interface device. The wireless interface device includes an upconverter, a tunable filter, and a driver amplifier. The upconverter has an output and is configured to upconvert a baseband frequency to a radio frequency based on a local oscillator signal. The tunable filter has an input and an output; the input of the tunable filter is coupled to the output of the upconverter. The driver amplifier has an input; the input of the driver amplifier is coupled to the output of the tunable filter.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: March 28, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Sean Joel Lyn, Cheng-Han Wang, Hye Jin Song, Sang-Oh Lee
  • Patent number: 11600916
    Abstract: An area-efficient balun and a method for signal processing using such a balun. One example balun generally includes a winding and a clamping circuit. The winding is formed by a coiled trace including a first portion having a first trace width and a second portion having a second trace width, the second trace width being narrower than the first trace width. The clamping circuit has a first terminal and a second terminal, the first terminal of the clamping circuit being coupled to the first portion of the coiled trace.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: March 7, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Sean Joel Lyn, Cheng-Han Wang, Hye Jin Song, Hai Huang, Sang-Oh Lee
  • Publication number: 20220404548
    Abstract: A package structure is provided. The package structure includes at least one optoelectronic device, a lead frame, and an encapsulant. The optoelectronic device is disposed on the lead frame. The lead frame includes at least one lead unit that includes a first lead and a second lead. The first lead has a first bonding part and a first pin. The first bonding part has a first inclined sidewall at an upper end of one side away from the second lead. The second lead has a second pin and a carrying part, of which an upper end has a die-attaching region for carrying the optoelectronic device. The encapsulant covers at least the optoelectronic device, the first bonding part, and the carrying part.
    Type: Application
    Filed: June 15, 2022
    Publication date: December 22, 2022
    Inventors: CHENG-HAN WANG, CHENG-HONG SU, CHIH-LI YU
  • Publication number: 20220246795
    Abstract: A light-emitting device is provided. The light-emitting device includes a light-emitting diode, a reflective structure, and a package structure. The reflective structure includes a bottom surface and a lateral part. The light-emitting diode is disposed on the bottom surface. The lateral part is disposed surrounding the bottom surface and disposed on the bottom surface. The package structure is configured to package the light-emitting diode and the reflective structure. The package structure includes a first package part and a second package part. The first package part has a phosphorescent powder. An interface is between the first package part and the second package part. The interface is disposed below a top surface of the lateral part.
    Type: Application
    Filed: January 20, 2022
    Publication date: August 4, 2022
    Applicant: Lite-On Technology Corporation
    Inventors: Cheng-Han Wang, Cheng-Hong Su, Chih-Li Yu
  • Publication number: 20210364687
    Abstract: A light-emitting device and a light emitting module are provided. The light emitting module includes a housing, at least one light guide element, and at least one light emitting element. The housing includes at least one passage passing through its a first surface and a second surface, and a coupling portion formed on an inner surface adjacent to the second surface. The light guide element arranged in the at least one passage has a light emergent surface exposed at one end of the at least one passage and a light incident surface exposed at the other end of the at least one passage. The light emitting element is coupled to the housing by the coupling portion. The light emitting element includes a light emitting surface facing to the light incident surface of the light guide element and a soldering portion exposed from the housing.
    Type: Application
    Filed: May 18, 2021
    Publication date: November 25, 2021
    Inventors: CHENG-HAN WANG, SZU-TSUNG KAO, CHIH-LI YU, CHENG-HONG SU, CHUN-WEI HUANG, CHEN-HSIU LIN
  • Publication number: 20210258023
    Abstract: Apparatuses and methods are disclosed regarding a multiband transmitter. In an example aspect, an apparatus for processing signals for wireless transmission includes a wireless interface device. The wireless interface device includes an upconverter, a tunable filter, and a driver amplifier. The upconverter has an output and is configured to upconvert a baseband frequency to a radio frequency based on a local oscillator signal. The tunable filter has an input and an output; the input of the tunable filter is coupled to the output of the upconverter. The driver amplifier has an input; the input of the driver amplifier is coupled to the output of the tunable filter.
    Type: Application
    Filed: February 18, 2021
    Publication date: August 19, 2021
    Inventors: Sean Joel Lyn, Cheng-Han Wang, Hye Jin Song, Sang-Oh Lee
  • Publication number: 20210257726
    Abstract: An area-efficient balun and a method for signal processing using such a balun. One example balun generally includes a winding and a clamping circuit. The winding is formed by a coiled trace including a first portion having a first trace width and a second portion having a second trace width, the second trace width being narrower than the first trace width. The clamping circuit has a first terminal and a second terminal, the first terminal of the clamping circuit being coupled to the first portion of the coiled trace.
    Type: Application
    Filed: February 1, 2021
    Publication date: August 19, 2021
    Inventors: Sean Joel LYN, Cheng-Han WANG, Hye Jin SONG, Hai HUANG, Sang-Oh LEE
  • Publication number: 20200091955
    Abstract: Certain aspects of the present disclosure provide methods and apparatus for simultaneous multi-band transmission, including techniques and circuitry for reducing the coupling of a second-order harmonic signal into a victim circuit. One example radio frequency front-end circuit generally includes a first transmit output stage circuit configured to output signals in a first frequency band and a second transmit output stage circuit configured to output signals in a second frequency band. The first transmit output stage circuit generally includes a first adjustable transconductance stage comprising an input stage and a cascode stage coupled to the input stage; and a first adjustable impedance stage coupled to the first adjustable transconductance stage. For certain aspects, the second transmit output stage circuit generally includes a second adjustable transconductance stage and a second adjustable impedance stage coupled to the second adjustable transconductance stage.
    Type: Application
    Filed: September 13, 2018
    Publication date: March 19, 2020
    Inventors: Cheng-Han WANG, Yi ZENG
  • Patent number: 10574286
    Abstract: An RF front end provides high receive selectivity by selectively configuring matching networks within a Time Division Duplex transceiver. One or more elements of the transmit or receive signal paths are configured to perform multiple functions. Each of the functions can be performed in dependence on an operating mode of the RF front end. In some embodiments, one or more elements in the transmit or receive signal paths are reconfigured during receive portions of operation to provide additional receive selectivity.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: February 25, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Cheng-Han Wang, Young Gon Kim, Kamal Aggarwal
  • Patent number: 10411652
    Abstract: An amplifier may include a first transistor. The amplifier may also include a second transistor coupled to the first transistor in an output stage of the amplifier. The amplifier may also include a level shift resistor coupled between a gate of the first transistor and a gate of the second transistor. The amplifier may further include a feedback bias circuit coupled to the gate of the first transistor and the gate of the second transistor through the level shift resistor. The feedback bias circuit may be configured to sense a common mode voltage of the output stage of the amplifier, and to compare the common mode voltage with a reference voltage to control a resistor bias current conducted by the level shift resistor.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: September 10, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Yu-Ching Yeh, Sean Joel Lyn, Cheng-Han Wang, Roger Brockenbrough
  • Patent number: 10250375
    Abstract: An apparatus and a method are disclosed for synchronizing clock signals distributed within a wireless device. In some embodiments, a local oscillator (LO) clock signal is buffered and distributed to two or more transceivers within the wireless device. Each transceiver may include a configurable clock divider to divide the distributed LO clock signal and generate an output clock signal. A phase detector compares output clock signals from each of the configurable clock dividers and generates an output signal in accordance with a determined phase difference. The phase detector output signal may cause at least one of the configurable clock dividers to modify its respective output clock signal, and thereby synchronize output clock signals between different configurable clock dividers. In some embodiments, a clock signal from a configurable clock divider may be modified (shifted) by approximately 90 or 180 degrees.
    Type: Grant
    Filed: September 22, 2016
    Date of Patent: April 2, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Justin Black, Cheng-Han Wang, Jeongsik Yang
  • Publication number: 20190074862
    Abstract: An RF front end provides high receive selectivity by selectively configuring matching networks within a Time Division Duplex transceiver. One or more elements of the transmit or receive signal paths are configured to perform multiple functions. Each of the functions can be performed in dependence on an operating mode of the RF front end. In some embodiments, one or more elements in the transmit or receive signal paths are reconfigured during receive portions of operation to provide additional receive selectivity.
    Type: Application
    Filed: August 30, 2018
    Publication date: March 7, 2019
    Inventors: Cheng-Han WANG, Young Gon KIM, Kamal AGGARWAL
  • Publication number: 20190028061
    Abstract: An amplifier may include a first transistor. The amplifier may also include a second transistor coupled to the first transistor in an output stage of the amplifier. The amplifier may also include a level shift resistor coupled between a gate of the first transistor and a gate of the second transistor. The amplifier may further include a feedback bias circuit coupled to the gate of the first transistor and the gate of the second transistor through the level shift resistor. The feedback bias circuit may be configured to sense a common mode voltage of the output stage of the amplifier, and to compare the common mode voltage with a reference voltage to control a resistor bias current conducted by the level shift resistor.
    Type: Application
    Filed: March 1, 2018
    Publication date: January 24, 2019
    Inventors: Yu-Ching YEH, Sean Joel LYN, Cheng-Han WANG, Roger BROCKENBROUGH
  • Patent number: 10177873
    Abstract: A radio frequency (RF) receiver, for example a satellite positioning system receiver, can be configured to use a single phase locked loop for generating an oscillator signal to perform downconversion of signals in two different frequency bands using two or more local oscillators. A first RF signal portion includes a first signal band and undergoes double downconversion using a first mixer and a second mixer, while a second RF signal portion includes a second signal band and undergoes single downconversion using a single mixer. A controller is configured to determine a first oscillator divider value and a second oscillator divider value to avoid a jammer frequency and frequency dividers are used to generate the two or more local oscillators.
    Type: Grant
    Filed: May 4, 2018
    Date of Patent: January 8, 2019
    Assignee: Qualcomm Incorporated
    Inventors: Yi Zeng, Hong Sun Kim, Cheng-Han Wang
  • Patent number: 9941842
    Abstract: A power amplifier bias circuit having high dynamic range and low memory is disclosed. In an exemplary embodiment, an apparatus includes an output stage configured to generate a biased RF signal based on a first DC signal and a filtered signal. The apparatus also includes a low pass filter configured to filter the biased RF signal to generate the filtered signal.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: April 10, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Shu-Hsien Liao, Feipeng Wang, Cheng-Han Wang
  • Publication number: 20180083763
    Abstract: An apparatus and a method are disclosed for synchronizing clock signals distributed within a wireless device. In some embodiments, a local oscillator (LO) clock signal is buffered and distributed to two or more transceivers within the wireless device. Each transceiver may include a configurable clock divider to divide the distributed LO clock signal and generate an output clock signal. A phase detector compares output clock signals from each of the configurable clock dividers and generates an output signal in accordance with a determined phase difference. The phase detector output signal may cause at least one of the configurable clock dividers to modify its respective output clock signal, and thereby synchronize output clock signals between different configurable clock dividers. In some embodiments, a clock signal from a configurable clock divider may be modified (shifted) by approximately 90 or 180 degrees.
    Type: Application
    Filed: September 22, 2016
    Publication date: March 22, 2018
    Inventors: Justin Black, Cheng-Han Wang, Jeongsik Yang
  • Patent number: 9716188
    Abstract: A MOS capacitor with improved linearity is disclosed. In an exemplary embodiment, an apparatus includes a main branch comprising a first signal path having a first capacitor pair connected in series with reversed polarities and a second signal path having a second capacitor pair connected in series with reversed polarities, the first and second signal paths connected in parallel. The apparatus also includes an auxiliary branch comprising at least one signal path having at least one capacitor pair connected in series with reversed polarities and connected in parallel with the main branch. In an exemplary embodiment, the capacitors are MOS capacitors.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: July 25, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Mohammad B. Vahid Far, Alireza Khalili, Cheng-Han Wang, Phoebe Peihong Chen
  • Patent number: 9712195
    Abstract: An amplifier includes a gain transistor including a control terminal to receive an input signal. A degeneration inductor is coupled between the first terminal of the gain transistor and ground. A shunt inductor and a capacitor are coupled in series between the control terminal of the gain transistor and ground, and form a filter to attenuate frequencies of the input signal within a frequency range. The degeneration inductor and the shunt inductor form a transformer to provide impedance matching.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: July 18, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Cheng-Han Wang, Conor Donovan, Jesse Aaron Richmond, Jin-Su Ko
  • Patent number: 9647638
    Abstract: A method and apparatus for minimizing transmit signal interference is provided. The method includes the steps of: receiving a signal and amplifying the received signal. The received signal is then mixed with an intermediate frequency signal to obtain a baseband modulated signal. The baseband modulated signal is first filtered in an RC filter. The resulting signal is then divided by a preselected amount and the first divided portion is sent to a main path of a biquad filter, which produces a first stage biquad filtered signal. The second portion of the divided signal is sent to an auxiliary path of the biquad filter, and produces a second filtered signal. The first and second signals are then recombined and sent to the second stage of the biquad filter, where further filtering takes place.
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: May 9, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Mohammad Bagher Vahid Far, Cheng-Han Wang, Jesse Aaron Richmond, Thinh Cat Nguyen, Abbas Komijani, Yashar Rajavi, Alireza Khalili
  • Patent number: 9543897
    Abstract: A method, an apparatus, and a system product for mixing radio frequency signals are provided. In one aspect, the apparatus is configured to perform switching of switches based on first, second, third, and fourth phased half duty clock signals. The apparatus convolves a differential input signal on a differential input port with the first, second, third, and fourth phased half duty cycle clock signals to concurrently generate a differential in-phase output signal and a differential quadrature-phase output signal on a dual differential output port. The first, second, third, and fourth phased half duty cycle clock signals are of the same frequency and out of phase by a multiple of ninety degrees with respect to each other.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: January 10, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Cheng-Han Wang, Alberto Cicalini, Thinh Cat Nguyen, Mohammad Bagher Vahid Far, Jesse Aaron Richmond