Abstract: A global navigation satellite system (GNSS) receiver includes at least one GNSS antenna configured to receive input signaling from at least a first GNSS source and a second GNSS source; an in-phase/quadrature (I/Q) mixer coupled to the at least one GNSS antenna and configured to process the input signaling to obtain complex intermediate signaling; a first complex filter coupled to the I/Q mixer and configured to filter the complex intermediate signaling with respect to a first frequency range to obtain first real output signaling; a second complex filter coupled to the I/Q mixer and configured to filter the complex intermediate signaling with respect to a second frequency range to obtain second real output signaling; and a signal combiner coupled to the first and second complex filters and configured to generate combined real output signaling by combining the first real output signaling and the second real output signaling.

Abstract: Methods and circuits can down convert at least a first RF signal on a first path in a first frequency band to provide a first IF signal. A second RF signal on second path in a second frequency band can be down converted to provide a second IF signal. The first IF signal and the second IF signal are interspersed in the frequency domain, and the first frequency band is different from the second frequency band. A combiner can combine at least part of the first IF signal and the second IF signal to provide a combined signal on an output signal path for reception by a digital processing circuit. The first IF signal or second IF signal can be a Zero IF (ZIF), very low IF (VLIF), or Low IF (LIF) signal.

Abstract: A reconfigurable LNA for increased jammer rejection is disclosed. An exemplary embodiment includes an LNA having a tunable resonant frequency, and a detector configured to output a control signal to tune the resonant frequency of the LNA to increase jammer suppression. An exemplary method includes detecting if a jammer is present, tuning a resonant frequency of an LNA away from the jammer to increase jammer rejection if the jammer is present, and tuning the resonant frequency of the LNA to a selected operating frequency if the jammer is not present.

Abstract: Systematic IM2 calibration for a differential LNA is disclosed. In an aspect, an apparatus includes an amplifier configured to output an amplified signal having a level of systematic pre-mixer IM2 distortion, a detector configured to detect the level of the systematic pre-mixer IM2 distortion in the amplified signal, and a bias signal generator configured to generate at least one bias signal configured to adjust the amplifier to reduce the level of the systematic pre-mixer IM2 distortion.

Abstract: A reconfigurable LNA for increased jammer rejection is disclosed. An exemplary embodiment includes an LNA having a tunable resonant frequency, and a detector configured to output a control signal to tune the resonant frequency of the LNA to increase jammer suppression. An exemplary method includes detecting if a jammer is present, tuning a resonant frequency of an LNA away from the jammer to increase jammer rejection if the jammer is present, and tuning the resonant frequency of the LNA to a selected operating frequency if the jammer is not present.

Abstract: A class AB amplifier with resistive level-shifting circuitry is described. In one exemplary design, the class AB amplifier includes an input stage, a resistive level-shifting stage, a class AB output stage, and a bias circuit. The input stage receives an input signal and provides a first drive signal. The resistive level-shifting stage receives the first drive signal and provides a second drive signal. The output stage receives the first and second drive signals and provides an output signal. The bias circuit generates a bias voltage for the resistive level-shifting stage to obtain a desired quiescent current for the output stage. In one exemplary design, the resistive level-shifting stage includes a transistor and a resistor. The transistor receives the bias voltage and provides the second drive signal. The resistor is coupled to the transistor and provides a voltage drop between the first and second drive signals.

Abstract: Techniques for optimizing gain or noise figure of an RF receiver are disclosed. In an exemplary embodiment a controller controls a capacitor bank between an LNA and a mixer of the RF front end of the receiver. For a given center frequency a first set of capacitors is switched to the mixer and a second set of capacitors is switched to ground. The ratio of capacitance of the second set to the first set of capacitors affects either gain of the RF FE or noise figure of the receiver. Therefore, the RF FE of the receiver may be controlled in such a way as to optimize for either RF FE gain or for receiver noise figure.

Abstract: An improved passive double balanced mixer with reduced capacitor voltage mismatch is described. A passive double balanced mixer includes two sets of mixer circuits, each comprised of switches. Each switch is separately divided into a first portion and a second portion of unequal number of fingers. A first and second LO AC coupling capacitors associated with a given switch are coupled at one end to an LO signal. The outputs of the first LO AC coupling capacitors are coupled to the first portion of the first switch and the second portion of the second switch, respectively, while the outputs of the second LO AC coupling capacitors are coupled to the second portion of the first switch and the first portion of the second switch, respectively. In one embodiment, the unequal number of fingers is defined by an n?1 and an n+1 number of fingers, respectively. In an alternate embodiment, the mixer is an ADB mixer with a transconductance amplifier and two sets of mixer circuits as above.

Abstract: Systematic IM2 calibration for a differential LNA is disclosed. In an aspect, an apparatus includes an amplifier configured to output an amplified signal having a level of systematic pre-mixer IM2 distortion, a detector configured to detect the level of the systematic pre-mixer IM2 distortion in the amplified signal, and a bias signal generator configured to generate at least one bias signal configured to adjust the amplifier to reduce the level of the systematic pre-mixer IM2 distortion.

Abstract: An apparatus includes first and second filters and a bandwidth control circuit. The first filter operates as part of a first oscillator in a first mode and filters a first input signal and provides a first output signal in a second mode. The second filter operates as part of a second oscillator in the first mode and filters a second input signal and provides a second output signal in the second mode. The bandwidth control circuit adjusts the bandwidth of the first and second filters in the first mode, e.g., adjusts the oscillation frequency of each oscillator to obtain a target bandwidth for an associated filter. The apparatus may further include first and second gain control circuits. Each gain control circuit may vary the amplitude of an oscillator signal from an associated oscillator and/or set a gain of an associated filter in the first mode.

Abstract: Techniques for optimizing gain or noise figure of an RF receiver are disclosed. In an exemplary embodiment a controller controls a capacitor bank between an LNA and a mixer of the RF front end of the receiver. For a given center frequency a first set of capacitors is switched to the mixer and a second set of capacitors is switched to ground. The ratio of capacitance of the second set to the first set of capacitors affects either gain of the RF FE or noise figure of the receiver. Therefore, the RF FE of the receiver may be controlled in such a way as to optimize for either RF FE gain or for receiver noise figure.

Abstract: An apparatus includes a filter and a gain control circuit. The filter receives and filters an input signal and provides an output signal in a first mode and operates as part of an oscillator in a second mode. The gain control circuit varies the amplitude of an oscillator signal from the oscillator in the second mode, e.g., by adjusting at least one variable gain element within the oscillator to obtain a target amplitude and/or non rail-to-rail signal swing for the oscillator signal. The apparatus may further include a bandwidth control circuit to adjust the bandwidth of the filter in the second mode. The bandwidth control circuit receives the oscillator signal, determines a target oscillation frequency corresponding to a selected bandwidth for the filter, and adjusts at least one circuit element within the filter to obtain the target oscillation frequency.

Abstract: An improved passive double balanced mixer with reduced capacitor voltage mismatch is described. A passive double balanced mixer includes two sets of mixer circuits, each comprised of switches. Each switch is separately divided into a first portion and a second portion of unequal number of fingers. A first and second LO AC coupling capacitors associated with a given switch are coupled at one end to an LO signal. The outputs of the first LO AC coupling capacitors are coupled to the first portion of the first switch and the second portion of the second switch, respectively, while the outputs of the second LO AC coupling capacitors are coupled to the second portion of the first switch and the first portion of the second switch, respectively. In one embodiment, the unequal number of fingers is defined by an n?1 and an n+1 number of fingers, respectively. In an alternate embodiment, the mixer is an ADB mixer with a transconductance amplifier and two sets of mixer circuits as above.

Abstract: A class AB amplifier with resistive level-shifting circuitry is described. In one exemplary design, the class AB amplifier includes an input stage, a resistive level-shifting stage, a class AB output stage, and a bias circuit. The input stage receives an input signal and provides a first drive signal. The resistive level-shifting stage receives the first drive signal and provides a second drive signal. The output stage receives the first and second drive signals and provides an output signal. The bias circuit generates a bias voltage for the resistive level-shifting stage to obtain a desired quiescent current for the output stage. In one exemplary design, the resistive level-shifting stage includes a transistor and a resistor. The transistor receives the bias voltage and provides the second drive signal. The resistor is coupled to the transistor and provides a voltage drop between the first and second drive signals.

Abstract: An apparatus includes first and second filters and a bandwidth control circuit. The first filter operates as part of a first oscillator in a first mode and filters a first input signal and provides a first output signal in a second mode. The second filter operates as part of a second oscillator in the first mode and filters a second input signal and provides a second output signal in the second mode. The bandwidth control circuit adjusts the bandwidth of the first and second filters in the first mode, e.g., adjusts the oscillation frequency of each oscillator to obtain a target bandwidth for an associated filter. The apparatus may further include first and second gain control circuits. Each gain control circuit may vary the amplitude of an oscillator signal from an associated oscillator and/or set a gain of an associated filter in the first mode.

Abstract: An apparatus includes a filter and a gain control circuit. The filter receives and filters an input signal and provides an output signal in a first mode and operates as part of an oscillator in a second mode. The gain control circuit varies the amplitude of an oscillator signal from the oscillator in the second mode, e.g., by adjusting at least one variable gain element within the oscillator to obtain a target amplitude and/or non rail-to-rail signal swing for the oscillator signal. The apparatus may further include a bandwidth control circuit to adjust the bandwidth of the filter in the second mode. The bandwidth control circuit receives the oscillator signal, determines a target oscillation frequency corresponding to a selected bandwidth for the filter, and adjusts at least one circuit element within the filter to obtain the target oscillation frequency.