Patents by Inventor Cheng Hu

Cheng Hu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973067
    Abstract: Methods for manufacturing a display device are provided. The methods include providing a plurality of light-emitting units and a substrate. The methods also include transferring the light-emitting units to a transfer head. The methods further include attaching at least one of the plurality of light-emitting units on the transfer head to the substrate by a bonding process, wherein the transfer head and the substrate satisfy the following equation during the bonding process: 0 ? ? ? T ? ? 1 T ? ? 2 ? A ? ( T ) ? dT - ? T ? ? 1 T ? ? 3 ? E ? ( T ) ? dT ? ? < 0.01 wherein A(T) is the coefficient of thermal expansion of the transfer head, E(T) is the coefficient of thermal expansion of the substrate, T1 is room temperature, T2 is the temperature of the transfer head, and T3 is the temperature of the substrate.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: April 30, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Tung-Kai Liu, Tsau-Hua Hsieh, Fang-Ying Lin, Kai Cheng, Hui-Chieh Wang, Shun-Yuan Hu
  • Patent number: 11961777
    Abstract: A package structure and a method of forming the same are provided. The package structure includes a first die, a second die, a first encapsulant, and a buffer layer. The first die and the second die are disposed side by side. The first encapsulant encapsulates the first die and the second die. The second die includes a die stack encapsulated by a second encapsulant encapsulating a die stack. The buffer layer is disposed between the first encapsulant and the second encapsulant and covers at least a sidewall of the second die and disposed between the first encapsulant and the second encapsulant. The buffer layer has a Young's modulus less than a Young's modulus of the first encapsulant and a Young's modulus of the second encapsulant.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Chih Chen, Chien-Hsun Lee, Chung-Shi Liu, Hao-Cheng Hou, Hung-Jui Kuo, Jung-Wei Cheng, Tsung-Ding Wang, Yu-Hsiang Hu, Sih-Hao Liao
  • Publication number: 20240114614
    Abstract: Disclosed is a thermal conduction-electrical conduction isolated circuit board with a ceramic substrate and a power transistor embedded, mainly comprising: a dielectric material layer, a heat-dissipating ceramic block, a securing portion, a stepped metal electrode layer, a power transistor, and a dielectric material packaging, wherein a via hole is formed in the dielectric material layer, the heat-dissipating ceramic block is correspondingly embedded in the via hole, the heat-dissipating ceramic block has a thermal conductivity higher than that of the dielectric material layer and a thickness less than that of the dielectric material layer, the stepped metal electrode layer conducts electricity and heat for the power transistor, the dielectric material packaging is configured to partially expose the source connecting pin, drain connecting pin, and gate connecting pin of the encapsulated stepped metal electrode layer.
    Type: Application
    Filed: September 29, 2022
    Publication date: April 4, 2024
    Inventors: HO-CHIEH YU, CHEN-CHENG-LUNG LIAO, CHUN-YU LIN, JASON AN CHENG HUANG, CHIH-CHUAN LIANG, KUN-TZU CHEN, NAI-HIS HU, LIANG-YO CHEN
  • Publication number: 20240113080
    Abstract: A semiconductor device and a method of manufacture are provided. In particular, a semiconductor device using blocks, e.g., discrete connection blocks, having through vias and/or integrated passive devices formed therein are provided. Embodiments such as those disclosed herein may be utilized in PoP applications. In an embodiment, the semiconductor device includes a die and a connection block encased in a molding compound. Interconnection layers may be formed on surfaces of the die, the connection block and the molding compound. One or more dies and/or packages may be attached to the interconnection layers.
    Type: Application
    Filed: November 30, 2023
    Publication date: April 4, 2024
    Inventors: Ching-Wen Hsiao, Chen-Shien Chen, Wei Sen Chang, Shou-Cheng Hu
  • Publication number: 20240105632
    Abstract: A device includes an interposer, which includes a substrate having a top surface. An interconnect structure is formed over the top surface of the substrate, wherein the interconnect structure includes at least one dielectric layer, and metal features in the at least one dielectric layer. A plurality of through-substrate vias (TSVs) is in the substrate and electrically coupled to the interconnect structure. A first die is over and bonded onto the interposer. A second die is bonded onto the interposer, wherein the second die is under the interconnect structure.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 28, 2024
    Inventors: Hsien-Pin Hu, Chen-Hua Yu, Ming-Fa Chen, Jing-Cheng Lin, Jiun Ren Lai, Yung-Chi Lin
  • Patent number: 11938868
    Abstract: A photographing device for a vehicle and relates to the field of automatic driving technology is disclosed. The specific solution is that the photographing device includes a seat; a camera mounted on the seat; a lens holder mounted on the seat and rotatable relative to the seat; a transparent lens mounted on the lens holder and arranged opposite to the camera; and a driving assembly connected with the lens holder to drive the lens holder to rotate relative to the base.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: March 26, 2024
    Assignee: Apollo Intelligent Connectivity (Beijing) Technology Co., Ltd.
    Inventors: Jingsheng Hu, Zongtao Fan, Bolei Wang, Rui Ren, Cheng Tan, Jiali Zhang, Yanfu Zhang
  • Patent number: 11936027
    Abstract: Embodiments of the present application provide a case for a battery, a battery, a power consumption device, and a method and device for producing a battery. The case includes: a thermal management component configured to adjust temperature of a battery cell accommodated in the case; a first wall provided with a through hole, the through hole being configured to communicate a gas inside and outside the case; and a condensing component attached to the thermal management component, the condensing component being configured to shield the through hole so as to condense a gas flowing into the inside of the case through the through hole. According to the technical solutions of the embodiments of the present application, the safety of the battery can be enhanced.
    Type: Grant
    Filed: December 27, 2020
    Date of Patent: March 19, 2024
    Assignee: JIANGSU CONTEMPORARY AMPEREX TECHNOLOGY LIMITED
    Inventors: Fenggang Zhao, Jiarong Hong, Xiaoteng Huang, Wenli Wang, Cheng Xue, Haiqi Yang, Langchao Hu
  • Patent number: 11929871
    Abstract: The present disclosure provides a method for generating a backbone network, an apparatus for generating a backbone network, a device, and a storage medium. The method includes: acquiring a set of a training image, a set of an inference image, and a set of an initial backbone network; training and inferring, for each initial backbone network in the set of the initial backbone network, the initial backbone network by using the set of the training image and the set of the inference image, to obtain an inference time and an inference accuracy of a trained backbone network in an inference process; determining a basic backbone network based on the inference time and the inference accuracy of the trained backbone network in the inference process; and obtaining a target backbone network based on the basic backbone network and a preset target network.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: March 12, 2024
    Inventors: Cheng Cui, Tingquan Gao, Shengyu Wei, Yuning Du, Ruoyu Guo, Bin Lu, Ying Zhou, Xueying Lyu, Qiwen Liu, Xiaoguang Hu, Dianhai Yu, Yanjun Ma
  • Patent number: 11919247
    Abstract: A powder-based three-dimensional printing (3DP) method, device and system, and a computer-readable storage medium. The method includes: analyzing printing images of layers corresponding to a part to be printed to determine a target print image and adding a preset mark to the target print image which includes a print image of a target layer that causes a previous powder layer of the target layer to displace during printing; acquiring an image to be printed of a current layer to be printed; identifying the image to be printed to determine whether the preset mark exists on the image to be printed; and if yes, processing the current layer to be printed and/or a previous powder layer of the current layer to be printed such that the previous powder layer of the current layer does not move with powder spreading of the current layer.
    Type: Grant
    Filed: December 19, 2021
    Date of Patent: March 5, 2024
    Assignee: KOCEL INTELLIGENT MACHINERY LIMITED
    Inventors: Fan Peng, Donge Zheng, Yinxue Du, Yi Liu, Jun Yang, Cheng Hu, Zixiang Zhou
  • Publication number: 20240055371
    Abstract: Embodiments include a crack stopper structure surrounding an embedded integrated circuit die, and the formation thereof. The crack stopper structure may include multiple layers separated by a fill layer. The layers of the crack stopper may include multiple sublayers, some of the sublayers providing adhesion, hardness buffering, and material gradients for transitioning from one layer of the crack stopper structure to another layer of the crack stopper structure.
    Type: Application
    Filed: January 9, 2023
    Publication date: February 15, 2024
    Inventors: Der-Chyang Yeh, Kuo-Chiang Ting, Yu-Hsiung Wang, Chao-Wen Shih, Sung-Feng Yeh, Ta Hao Sung, Cheng-Wei Huang, Yen-Ping Wang, Chang-Wen Huang, Sheng-Ta Lin, Li-Cheng Hu, Gao-Long Wu
  • Publication number: 20240038812
    Abstract: An image sensor and method for fabricating are provided. The image sensor includes: a semiconductor substrate with multiple pixel regions formed thereon; adhesive frame formed on the semiconductor substrate, the adhesive frame including a peripheral adhesive frame arranged along the periphery of the semiconductor substrate and multiple reaction well adhesive frames disposed within the peripheral adhesive frame; a biological liquid crystal filled at least in each of the reaction well adhesive frames, the biological liquid crystal having an antigen-modified or an antibody-modified liquid crystal sensing interface; a glass coverplate disposed opposite to the semiconductor substrate; and a bonding layer, bonding the adhesive frames to the glass coverplate and loses a bonding power when heated or irradiated by UV light.
    Type: Application
    Filed: September 12, 2022
    Publication date: February 1, 2024
    Inventors: Chun-Sheng FAN, Cheng HU
  • Publication number: 20230416205
    Abstract: The present disclosure relates generally to small molecule modulators of NLR Family Pyrin Domain Containing 3 (NL-RP3), or a pharmaceutically acceptable salt, isotopically enriched analog, stereoisomer, mixture of stereoisomers, or prodrug thereof, methods of making and intermediates thereof, and methods of using thereof.
    Type: Application
    Filed: November 19, 2021
    Publication date: December 28, 2023
    Inventors: Alex L. Bagdasarian, Cyril Bucher, Robert A. Craig, II, Javier de Vicente Fidalgo, Anthony A. Estrada, Brian M. Fox, Cheng Hu, Benjamin J. Huffman, Katrina W. Lexa, Lizanne G. Nilewski, Maksim Osipov, Arun Thottumkara
  • Patent number: 11851433
    Abstract: The present disclosure relates generally to methods and compositions for preventing or arresting cell death and/or inflammation.
    Type: Grant
    Filed: October 5, 2021
    Date of Patent: December 26, 2023
    Assignee: Denali Therapeutics Inc.
    Inventors: Giorgio Bonanomi, Anthony A. Estrada, Jianwen A. Feng, Brian Fox, Cinzia Maria Francini, Cheng Hu, Colin Philip Leslie, Maksim Osipov, Anantha Sudhakar, Zachary K. Sweeney, Javier De Vicente Fidalgo
  • Patent number: 11855045
    Abstract: A semiconductor device and a method of manufacture are provided. In particular, a semiconductor device using blocks, e.g., discrete connection blocks, having through vias and/or integrated passive devices formed therein are provided. Embodiments such as those disclosed herein may be utilized in PoP applications. In an embodiment, the semiconductor device includes a die and a connection block encased in a molding compound. Interconnection layers may be formed on surfaces of the die, the connection block and the molding compound. One or more dies and/or packages may be attached to the interconnection layers.
    Type: Grant
    Filed: January 3, 2022
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Wen Hsiao, Chen-Shien Chen, Wei Sen Chang, Shou-Cheng Hu
  • Patent number: 11854723
    Abstract: Approaches provided herein include a protection device assembly having a protection component and a first electrode layer extending along a first main side of the protection component. The first electrode layer may include a first section separated from a second section by a first gap. The assembly may further include a second electrode layer extending along a second main side of the protection component, the second electrode layer including a third section separated from a fourth section by a second gap, wherein the first gap is aligned with the second gap. The assembly may further include a first insulation layer disposed over the first electrode layer, and a second insulation layer disposed over the second electrode layer. The assembly may further include a solder pad extending around an end of the protection component, the solder pad further extending over the first insulation layer and the second insulation layer.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: December 26, 2023
    Assignee: LITTELFUSE ELECTRONICS (SHANGHAI) CO., LTD.
    Inventors: Jianhua Chen, Bing Wang, Pinghong Li, Cheng Hu
  • Patent number: 11841167
    Abstract: A method for manufacturing an air curtain device includes steps of: a) providing a frame that includes two side wall bodies and two end wall bodies cooperatively defining an inner space thereamong, and an upper opening and a lower opening through which the inner space communicates with the external environment; b) covering an upper surface and a lateral outer surface of the frame with a first covering layer; c) closing the lower opening by placing an air-permeable plate; d) sealing a gap between the air-permeable plate and the frame by a first adhesive; e) removing a portion of the first covering layer that covers the upper surface of the frame; and f) closing the upper opening by a cover that is sealingly connected to the frame.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: December 12, 2023
    Assignee: National Taipei University of Technology
    Inventors: Shih-Cheng Hu, Ti Lin
  • Publication number: 20230395342
    Abstract: Thermal Cut-Off (TCO) devices suitable for surface mount reflow processes are disclosed. The TCO devices are modeled after existing lead attached TCO device structures, but are improved with compact and miniaturized structures suitable for surface mount reflow operations. The arm and base terminals include pads for surface mount reflow. The base molds are designed for receiving the PTC device, bimetal device, and arm terminal feature and may operate using either a single base terminal or a multi-part base terminal. Multiple cover designs are disclosed to lower the heat capacity of the upper plate of the TCO device relative to the base terminal. A TCO device featuring an integrated arm and bimetal device terminal is also disclosed, with an updated base portion to support the integrated terminal.
    Type: Application
    Filed: November 6, 2020
    Publication date: December 7, 2023
    Applicant: Dongguan Littelfuse Electronics Company Limited
    Inventors: Werner Johler, Cheng HU, Jianming BU, Kevin Liang
  • Publication number: 20230387736
    Abstract: A motor rotor is provided, comprising: a rotor core, comprising a plurality of metal parts and an inner hole of the rotor, the inner hole of the rotor passing through the rotor core, and the metal parts constituting a rotor metal total area ?Ametal; and a plurality of reluctance parts, disposed surrounding the inner hole of the rotor, each of the reluctance parts comprising at least one flux barrier, at least one of the flux barriers penetrating the rotor core, and the at least one of the flux barriers in each of the reluctance parts constituting a flux barrier total area ?Aair; wherein, the sum of ?Aair and ?Ametal being a rotor effective total area, and the ratio of ?Aair to the rotor effective total area being a flux barrier ratio KA, expressed as KA=?Aair/?Aair+?Ametal, and the flux barrier ratio KA satisfying the following relation: 0.25?KA?0.5.
    Type: Application
    Filed: September 26, 2022
    Publication date: November 30, 2023
    Inventors: Cheng-Hu Chen, Yu-Cheng Yao, Ruey-Yue Lin
  • Publication number: 20230357162
    Abstract: The present disclosure relates generally to small molecule modulators of NLR Family Pyrin Domain Containing 3 (NL-RP3), or a pharmaceutically acceptable salt, isotopically enriched analog, stereoisomer, mixture of stereoisomers, or prodrug thereof, methods of making and intermediates thereof, and methods of using thereof.
    Type: Application
    Filed: August 13, 2021
    Publication date: November 9, 2023
    Inventors: Alex L. Bagdasarian, Robert A. Craig, II, Javier de Vicente Fidalgo, Anthony A. Estrada, Brian M. Fox, Cheng Hu, Benjamin J. Huffman, Katrina W. Lexa, Lizanne G. Nilewski, Maksim Osipov, Arun Thottumkara
  • Publication number: 20230348437
    Abstract: The present disclosure relates generally to small molecule modulators of NLR Family Pyrin Domain Containing 3 (NL-RP3), or a pharmaceutically acceptable salt, isotopically enriched analog, stereoisomer, mixture of stereoisomers, or prodrug thereof, methods of making and intermediates thereof, and methods of using thereof.
    Type: Application
    Filed: July 1, 2021
    Publication date: November 2, 2023
    Inventors: Robert A. Craig, II, Javier de Vicente Fidalgo, Anthony A. Estrada, Brian M. Fox, Cheng Hu, Katrina W. Lexa, Lizanne G. Nilewski, Maksim Osipov, Arun Thottumkara