Patents by Inventor Cheng Liu

Cheng Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240155092
    Abstract: Disclosed are an interactive information processing method, an electronic device and a storage medium. The method includes establishing a correspondence between a multimedia data stream and a display text generated based on the multimedia data stream; presenting the multimedia data stream and the display text based on the correspondence; and in response to detecting a triggering operation triggering a display content in the display text, adjusting, based on a timestamp corresponding to the display content and the correspondence, the multimedia data stream to navigate to a playback position corresponding to the display content; the display content comprises a text corresponding to speech in the multimedia data stream; and the display text and the multimedia data stream are displayed on different display areas of a page respectively, and a display area occupied by the display text is not superimposed on a display area occupied by the multimedia data stream.
    Type: Application
    Filed: January 17, 2024
    Publication date: May 9, 2024
    Inventors: Jingsheng YANG, Kojung CHEN, Jinghui LIU, Mengyuan XIONG, Xiang ZHENG, Cheng QIAN, Xiao HAN, Li ZHAO
  • Publication number: 20240150354
    Abstract: The present application provides tricyclic urea compounds that modulate the activity of the V617F variant of JAK2, which are useful in the treatment of various diseases, including cancer.
    Type: Application
    Filed: August 24, 2023
    Publication date: May 9, 2024
    Inventors: Yanran Ai, Onur Atasoylu, Yu Bai, Joseph Barbosa, David M. Burns, Daniel Levy, Brent Douty, Hao Feng, Leah C. Konkol, Cheng-Tsung Lai, Xun Liu, Song Mei, Jun Pan, Haisheng Wang, Liangxing Wu, Wenqing Yao, Eddy W. Yue
  • Publication number: 20240155048
    Abstract: Provided in embodiments of this application are a transmission assembly and a foldable electronic device. The transmission assembly includes a first transmission assembly. The first transmission assembly is configured for use in a bending area of the foldable electronic device. The first transmission assembly includes at least two first conductive layers and a first transmission layer located between the two first conductive layers. Each first conductive layer includes at least a first conductive fabric, and the first transmission layer includes at least one first signal line. A dielectric layer is further arranged between the first conductive layer and the first transmission layer, and the dielectric layer includes at least a first substrate layer.
    Type: Application
    Filed: May 9, 2022
    Publication date: May 9, 2024
    Inventors: Yin MENG, Cheng JIANG, Shumin LIU, Feng LIANG
  • Publication number: 20240153895
    Abstract: Semiconductor dies of a semiconductor die package are directly bonded, and a top metal region may be formed over the semiconductor dies. A plurality of conductive terminals may be formed over the top metal region. The conductive terminals are formed of copper (Cu) or another material that enables low-temperature deposition process techniques, such as electroplating, to be used to form the conductive terminal. In this way, the conductive terminals of the semiconductor die packages described herein may be formed at a relatively low temperature. This reduces the likelihood of thermal deformation of semiconductor dies in the semiconductor die packages. The reduced thermal deformation reduces the likelihood of warpage, breakage, and/or other types of damage to the semiconductor dies of the semiconductor die packages, which may increase performance and/or increase yield of semiconductor die packages.
    Type: Application
    Filed: April 19, 2023
    Publication date: May 9, 2024
    Inventors: Harry-HakLay CHUANG, Wei-Cheng WU, Chung-Jen HUANG, Yung Chun TU, Chien Lin LIU, Shun-Kuan LIN, Ping-tzu CHEN
  • Publication number: 20240153979
    Abstract: A method of manufacturing an image sensor structure includes forming an isolation structure in a substrate to divide the substrate into a first region and a second region, forming a first light sensing region in the first region and a second light sensing region in the second region, forming a first gate structure over the first light sensing region and a second gate structure over the second light sensing region, forming gate spacers on sidewalls of the first and second gate structures, and depositing a blocking layer on sidewalls of the gate spacers. The blocking layer has an opening positioned between the first and second gate structures. A source/drain structure is formed directly under the opening in the blocking layer. The method also includes forming an interlayer dielectric layer over the first and second gate structures and the blocking layer.
    Type: Application
    Filed: April 13, 2023
    Publication date: May 9, 2024
    Inventors: Wei Long CHEN, Wen-I HSU, Feng-Chi HUNG, Jen-Cheng LIU, Dun-Nian YAUNG
  • Publication number: 20240153887
    Abstract: A semiconductor package structure includes a base having a first surface and a second surface opposite thereto, wherein the base comprises a wiring structure, a first electronic component disposed over the first surface of the base and electrically coupled to the wiring structure, a second electronic component disposed over the first surface of the base and electrically coupled to the wiring structure, wherein the first electronic component and the second electronic component are separated by a molding material, a first hole and a second hole formed on the second surface of the base, and a frame disposed over the first surface of the base, wherein the frame surrounds the first electronic component and the second electronic component.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 9, 2024
    Inventors: Tzu-Hung LIN, Chia-Cheng CHANG, I-Hsuan PENG, Nai-Wei LIU
  • Patent number: 11978678
    Abstract: A display device includes a first substrate, a light-emitting element, a light conversion layer, and a color filter layer. The light-emitting element is disposed on the first substrate. The light conversion layer is disposed on the light-emitting element. In addition, the color filter layer is overlapped the light-emitting element and the light conversion layer.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: May 7, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Tung-Kai Liu, Tsau-Hua Hsieh, Wei-Cheng Chu, Chun-Hsien Lin, Chandra Lius, Ting-Kai Hung, Kuan-Feng Lee, Ming-Chang Lin, Tzu-Min Yan, Hui-Chieh Wang
  • Patent number: 11979174
    Abstract: Systems and methods are provided for a processor-implemented method for compressing, storing, and transmitting simulation data. The simulation data including a set of floating point data values is received, the simulation data characterizing simulated physical properties of a physical object. A first master data value is identified from the set to cluster one or more data values from the set as a first group of data values based on a comparison between a data value of the set and the first master data value. Compressed simulation data is transmitted, where the compressed simulation data includes a floating point representation of the first master data value and integer representations of other data values of the first group of data values.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: May 7, 2024
    Assignee: Ansys, Inc.
    Inventors: Jianhui Xie, Jin Wang, Yong-Cheng Liu, Jean-Daniel Beley
  • Patent number: 11978758
    Abstract: Methods for forming via last through-vias. A method includes providing an active device wafer having a front side including conductive interconnect material disposed in dielectric layers and having an opposing back side; providing a carrier wafer having through vias filled with an oxide extending from a first surface of the carrier wafer to a second surface of the carrier wafer; bonding the front side of the active device wafer to the second surface of the carrier wafer; etching the oxide in the through vias in the carrier wafer to form through oxide vias; and depositing conductor material into the through oxide vias to form conductors that extend to the active carrier wafer and make electrical contact to the conductive interconnect material. An apparatus includes a carrier wafer with through oxide vias extending through the carrier wafer to an active device wafer bonded to the carrier wafer.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Szu-Ying Chen, Pao-Tung Chen, Dun-Nian Yaung, Jen-Cheng Liu
  • Patent number: 11976105
    Abstract: The present application provides antibody-TCR chimeric constructs comprising an antibody moiety that specifically binds to a target antigen fused to a TCRM capable of recruiting at least one TCR-associated signaling module. Also provided are methods of making and using these constructs.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: May 7, 2024
    Assignee: EUREKA THERAPEUTICS, INC.
    Inventors: Jingwei Lu, Zhiyuan Yang, Cheng Liu, Hong Liu, Yiyang Xu, Su Yan, Vivien Wai-Fan Chan, Lucas Horan
  • Patent number: 11977250
    Abstract: A lighting keyboard includes a backlight module and at least one keyswitch. The backlight module includes a lighting substrate and a protruding structure. The lighting substrate includes two non-intersecting traces and a light emitting unit. The light emitting unit is connected between the two non-intersecting traces. A position of the protruding structure corresponds to a position of the light emitting unit and the protruding structure is located between the two non-intersecting traces. The at least one keyswitch is disposed on the backlight module.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: May 7, 2024
    Assignee: DARFON ELECTRONICS CORP.
    Inventors: Ying-Lan Liu, Hsin-Cheng Ho, Heng-Yi Huang
  • Patent number: 11978740
    Abstract: A layer stack including a first bonding dielectric material layer, a dielectric metal oxide layer, and a second bonding dielectric material layer is formed over a top surface of a substrate including a substrate semiconductor layer. A conductive material layer is formed by depositing a conductive material over the second bonding dielectric material layer. The substrate semiconductor layer is thinned by removing portions of the substrate semiconductor layer that are distal from the layer stack, whereby a remaining portion of the substrate semiconductor layer includes a top semiconductor layer. A semiconductor device may be formed on the top semiconductor layer.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Harry-Hak-Lay Chuang, Kuo-Ching Huang, Wei-Cheng Wu, Hsin Fu Lin, Henry Wang, Chien Hung Liu, Tsung-Hao Yeh, Hsien Jung Chen
  • Publication number: 20240139564
    Abstract: A battery pack including fire extinguishing equipment. The fire extinguishing equipment includes a first chamber, a second chamber, and an activation line. The first chamber stores a fire extinguishing chemical agent, the second chamber stores a gas-generating chemical agent, and the activation line extends into the second chamber to be in contact with the gas-generating chemical agent. The second chamber includes a pressure relief opening, and the pressure relief opening is in communication with the first chamber, and is configured to spray the gas in the second chamber to the first chamber. The first chamber includes a discharge opening, and the discharge opening is configured to discharge the fire extinguishing chemical agent in the first chamber after the gas generated after the gas-generating chemical agent is ignited enters the first chamber.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Applicant: Huawei Digital Power Technologies Co., Ltd.
    Inventors: Zongzhe LIU, Zheng ZHONG, Bin LE, Cheng CHEN, Yezheng ZHANG, Zeshun LIN
  • Publication number: 20240146831
    Abstract: The implementation of this application provides a power management method, a terminal. The method includes: obtaining a configuration change signal of a terminal device in response to a configuration change of the terminal device; obtaining an output power level truth table of the terminal device based on the configuration change signal of the terminal device, where the output power level truth table includes a configuration of the terminal device and a power level and a fallback power of the terminal device in the configuration; obtaining the power level and the fallback power of the terminal device based on the output power level truth table; setting an output power of the terminal device based on the fallback power of the terminal device, and outputting a corresponding power value based on the power level.
    Type: Application
    Filed: May 9, 2022
    Publication date: May 2, 2024
    Inventors: Chunhui Ye, Liang Liu, Cheng Jiang
  • Publication number: 20240147651
    Abstract: A hard disk bracket configured to be installed on a case includes a tray, a base, a handle, a pin, and a latch. The tray has an accommodating space. The base is connected to the tray. The handle is disposed in the base and has a first slide part detachably fastened with the base. The pin is disposed through the handle and the base. The latch is disposed in the base and is detachably fastened with the case. The latch is fastened with the handle and has a second slide part penetrating the handle for extending outside the base.
    Type: Application
    Filed: August 10, 2023
    Publication date: May 2, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Wei-Cheng Liu, Hsin-Kai Chuang
  • Publication number: 20240146039
    Abstract: The present application discloses a power distribution and monitoring integrated access door, comprising: a first door box side cabinet for supplying power to a cabinet, first and second compartments for power distribution being provided in the first door box side cabinet; a door lintel fixedly connected to the first door box side cabinet; and a door system used for isolating cold and hot channels and mounted below the door lintel and disposed on one side of the first door box side cabinet. In the present disclosure, by using the access door of a closed channel as a carrier, power distribution, monitoring, illumination control, access control and fire control are integrated together. Therefore, the power distribution and monitoring integrated access door of the present disclosure has the functions of power distribution, monitoring, illumination control, access control, and fire control in addition to the isolation of the hot and cold channels.
    Type: Application
    Filed: May 27, 2021
    Publication date: May 2, 2024
    Applicant: VERTIV TECH (XI’AN ) CO., LTD.
    Inventors: Peng NIE, Cheng GAO, Xin LIU, Xing LI
  • Publication number: 20240146036
    Abstract: A bus power distribution micromodule, including a UPS; a channel door containing a bus starting end A; and at least one cabinet containing a bus section A1 or A2, wherein an input end of the bus starting end A is connected to the UPS, an output end thereof is connected to the bus section A1 or A2 by means of a connector, and the bus section A1 or A2 is disposed in the cabinet and connected to a power distribution apparatus of the cabinet. In the bus power distribution micromodule, a plug-and-play property, easy expansion and IT load flexible matching of the cabinet are realized; the bus starting end is integrated in the channel door of the micromodule, thereby facilitating convenient maintenance and operation; the beneficial effect of having a small, occupied area is achieved; and, moreover, the bus power distribution micromodule has the advantage of rapid delivery.
    Type: Application
    Filed: May 27, 2021
    Publication date: May 2, 2024
    Applicant: VERTIV TECH (XI’AN ) CO., LTD.
    Inventors: Cheng GAO, Xiaobo FENG, Xing LI, Xin LIU, Tengjiang WANG
  • Patent number: 11973067
    Abstract: Methods for manufacturing a display device are provided. The methods include providing a plurality of light-emitting units and a substrate. The methods also include transferring the light-emitting units to a transfer head. The methods further include attaching at least one of the plurality of light-emitting units on the transfer head to the substrate by a bonding process, wherein the transfer head and the substrate satisfy the following equation during the bonding process: 0 ? ? ? T ? ? 1 T ? ? 2 ? A ? ( T ) ? dT - ? T ? ? 1 T ? ? 3 ? E ? ( T ) ? dT ? ? < 0.01 wherein A(T) is the coefficient of thermal expansion of the transfer head, E(T) is the coefficient of thermal expansion of the substrate, T1 is room temperature, T2 is the temperature of the transfer head, and T3 is the temperature of the substrate.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: April 30, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Tung-Kai Liu, Tsau-Hua Hsieh, Fang-Ying Lin, Kai Cheng, Hui-Chieh Wang, Shun-Yuan Hu
  • Patent number: 11973101
    Abstract: An image-sensor device is provided. The image-sensor device includes a semiconductor substrate and a radiation-sensing region in the semiconductor substrate. The image-sensor device also includes a doped isolation region in the semiconductor substrate and a dielectric film extending into the doped isolation region from a surface of the semiconductor substrate. A portion of the doped isolation region is between the dielectric film and the radiation-sensing region.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: April 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung
  • Publication number: 20240133281
    Abstract: A calculation system for predicting a proppant embedding depth based on a shale softening effect is provided, including a sampling test terminal, a scheduling module, a monitoring module, and a calculation module, wherein the scheduling module, the monitoring module, and the calculation module are connected in communication, and the monitoring module is connected to an external operating system through a wireless network, wherein the external operating system is configured to perform a hydraulic fracturing operation and receive a first control signal and/or a second control signal from the monitoring module. The sampling test terminal is configured to test the samples and obtain test data. The scheduling module is configured to determine a target construction parameter.
    Type: Application
    Filed: December 23, 2023
    Publication date: April 25, 2024
    Applicant: SOUTHWEST PETROLEUM UNIVERSITY
    Inventors: Cong LU, Qijun ZENG, Jianchun GUO, Jiaxing LIU, Jun WU, Junkai LU, Cheng LUO, Guangqing ZHOU, Xianbo MENG, Jiandong WANG, Yanhui LIU, Xiaoshan WANG, Xin SHAN