Abstract: A touch circuit includes a touch IC and a logic sub-circuit. The touch IC includes a touch signal port. The logic sub-circuit is connected to the touch signal port, and is configured to transmit a touch enabling signal to the touch signal port. The logic sub-circuit includes an AND gate. The AND gate includes a first input terminal, a second input terminal and an output terminal electrically connected to the touch signal port. The AND gate is configured to output the touch enabling signal through the output terminal electrically connected to the touch signal port in response to receiving one of a backlight turn-on signal and a screen turn-on signal through the first input terminal, and a touch generation signal through the second input terminal.

Abstract: The present disclosure discloses a mutant of a lycopene epsilon cyclase (Lcye) gene crucial in a wheat carotenoid synthesis pathway and use thereof. The present disclosure provides the following proteins: (1) a protein obtained by substituting serine at position 253 of an Lcye-D1 protein with phenylalanine; (2) a derived protein that is obtained by subjecting the protein in (1) to substitution and/or deletion and/or addition of one or more amino acid residues and has the same ability as the protein in (1); (3) a protein that has a homology of more than 99%, more than 95%, more than 90%, more than 85%, or more than 80% with the amino acid sequence defined in any one of (1) and (2) and has the same function as the amino acid sequence; and (4) a fusion protein obtained by attaching a tag to N-terminus and/or C-terminus of the protein in any one of (1) to (3).

Abstract: Disclosed are conjugates of biomolecule and use thereof. The disclosed conjugates of biomolecule contain a biomolecule and a functional moiety covalently linked to the biomolecule. The functional moiety contains a group that prevents the biomolecule from binding to its ligand or receptor, a cleavable linker arm that can be activated by proteolytic enzymes or can be acidically activated in a microenvironment of a disease, a linker arm that will automatically shed after the cleavable linker arm is cleaved, and a group that maintains or promotes the binding capacity of the biomolecule to its ligand or receptor.

Abstract: A coalescing filter element (300) with double drainage layers, including an inner coalescing component (1) configured to captured a large amount of liquid in gas, and an outer coalescing component (2) configured to coalesce and filter a small amount of liquid remaining in the gas. The inner coalescing component (1) and the outer coalescing component (2) are cylindrical structures disposed in a vertical direction and opened at two ends. The outer coalescing component (2) is sleeved on an outer side of the inner coalescing component (1), and an annular drainage space (3) is formed between the inner coalescing component (1) and the outer coalescing component (2). A top end cap (4) is provided on top ends of the inner coalescing component (1) and the outer coalescing component (2). A bottom end cap (5) is provided on bottom ends of the inner coalescing component (1) and the outer coalescing component (2).

Abstract: Embodiments of the present application provide a status detection method and apparatus for a filter. The filter filters a fluid in a sealed channel. At least a pressure sensor is further provided downstream of the filter in the sealed channel. The method includes: if a fluid flowing through a filter in a sealed channel is controlled to have a first flow rate, then acquiring a first pressure value measured by a pressure sensor; if the fluid flowing through the filter in the sealed channel is controlled to have a second flow rate, then acquiring a second pressure value measured by the pressure sensor; and determining a status of the filter according to a difference between the first pressure value and the second pressure value. Therefore, detection of the status of the filter is achieved, and an operator is prompted to maintain/replace the filter in time. In addition, an existing component can be used, so that applicability is high and detection costs are low.

Abstract: The present invention provides a culture medium for inducing an increase in a plasmid copy number and use thereof. The culture medium for inducing an increase in a plasmid copy number of the present invention has a plasmid extraction concentration increased by from 45 to 95% compared with a conventional method for inducing a plasmid copy number, and has a plasmid extraction concentration increased by from 110 to 440% compared with an induction method using a culture medium without glucose and arabinose. The culture medium plays an important role in inducing an increase in a plasmid copy number and achieving high-throughput production.

Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a source/drain region arranged within a substrate. A first select gate is arranged over the substrate, and a first memory gate is arranged over the substrate and separated from the source/drain region by the first select gate. An inter-gate dielectric structure is arranged between the first memory gate and the first select gate. The inter-gate dielectric structure extends under the first memory gate. A height of the inter-gate dielectric structure decreases along a direction extending from the first select gate to the first memory gate.

Abstract: The disclosure relates to a method and device for identifying unknown traffic data based on a dynamic network environment. The method includes following steps. The known traffic in the network data is classified by using the known network traffic classification model, then the preliminary determination is performed according to a classification prediction result, network data preliminarily determined as the unknown traffic data is classified by using the adaptive clustering method, and then respective classes are identified by using a similarity coefficient estimation method so as to identify the classes of the malicious traffic and the normal traffic, that is, to further identify and learn the unknown traffic data, and transform it into known traffic data, and then the known network traffic classification model is trained and updated again with the new known traffic data.

Abstract: An electronic device used in a method for expanding image depth obtains first images by a first sensor, the first images comprising depth information. The electronic device obtains second images by a second sensor, the second images comprising gradient information, and the first images correspond to the second images. The electronic device determines the pixels in the first images which contain expandable content according to the gradient information of the second images, applies expansion accordingly to the pixels in the first images to generate third images, and generate target depth maps according to the gradient information of the second images and the depth information of the third images.

Abstract: A method includes providing a semiconductor structure having an active region and an isolation structure adjacent to the active region, the active region having source and drain regions sandwiching a channel region for a transistor, the semiconductor structure further having a gate structure over the channel region. The method further includes etching a trench in one of the source and drain regions, wherein the trench exposes a portion of a sidewall of the isolation structure, epitaxially growing a first semiconductor layer in the trench, epitaxially growing a second semiconductor layer over the first semiconductor layer, changing a crystalline facet orientation of a portion of a top surface of the second semiconductor layer by an etching process, and epitaxially growing a third semiconductor layer over the second semiconductor layer after the changing of the crystalline facet orientation.

Abstract: A method includes: forming a first plurality of tiers that each comprises first and second dummy layers over a substrate, wherein within each tier, the second dummy layer is disposed above the first dummy layer; forming a second plurality of recessed regions in the first plurality of tiers, wherein at least one subgroup of the second plurality of recessed regions extend through respective different numbers of the second dummy layers; and performing an etching operation to concurrently forming a third plurality of trenches with respective different depths in the substrate through the at least one subgroup of the second plurality of recessed regions.

Abstract: A method for monitoring a running state of a distributed system, an electronic device, and a storage medium are provided. The method comprises: acquiring a first calling key-value pair sent by a first component in a distributed system (101); and determining the current running state of the first component according to a first keyword value, and historical calling data corresponding to a first key code value in a preset database (102).

Abstract: Photoresists and methods of forming and using the same are disclosed. In an embodiment, a method includes spin-on coating a first hard mask layer over a target layer; depositing a photoresist layer over the first hard mask layer using chemical vapor deposition or atomic layer deposition, the photoresist layer being deposited using one or more organometallic precursors; heating the photoresist layer to cause cross-linking between the one or more organometallic precursors; exposing the photoresist layer to patterned energy; heating the photoresist layer to cause de-crosslinking in the photoresist layer forming a de-crosslinked portion of the photoresist layer; and removing the de-crosslinked portion of the photoresist layer.

Abstract: The present disclosure provides a method of forming a semiconductor structure and a semiconductor structure. The method of forming the semiconductor structure includes: providing an initial structure, where the initial structure includes a substrate and a dielectric layer; forming a conductive trench, where a distance between a bottom surface of the conductive trench and a second side surface of the substrate is a first spacing; forming a conductive hole, where the conductive hole extends to the second side surface of the substrate from a top surface of the dielectric layer; forming a conductive pillar, where the conductive pillar fills the conductive hole; forming an inductor structure, where the inductor structure fills the conductive trench, and projection of the inductor structure on the substrate is provided as a spiral structure that uses projection of the conductive pillar on the substrate as an inductor center and that surrounds the inductor center.

Abstract: The present application relates to compositions for preventing or treating viral and other microbial infections. In some embodiments, the present application provides chimeric proteins comprising a target-binding moiety that specifically binds to a pathogen that infects through a mucosa, and a positively charged mucoadhesive peptide fragment. Also provided are antibodies and constructs thereof that specifically binds to an S1 subunit of a spike protein of SARS-CoV-2. Compositions comprising the chimeric proteins, antibodies, or constructs described herein are useful for preventing or treating a microbial infection in an individual, such as a coronavirus infection.

Abstract: A coater cup deformation testing device includes a supporting board, a first plate and a second plate. The first plate is located on a first side surface of the supporting board. The first plate is circular and has a first diameter. The second plate is located on the first plate or on a second side surface of the supporting board. The second side surface is opposite to the first side surface. The second plate is circular and has a second diameter less than the first diameter. An area of each of the first and second plates is less than an area of the supporting board. A projection of each of the first and second plates on the supporting board is formed within the supporting board.

Abstract: A method for forming a semiconductor structure is disclosed. A substrate having a logic device region and a memory device region is provided. A first dielectric layer is formed on the substrate. Plural memory stack structures are formed on the first dielectric layer on the memory device region. An insulating layer is formed and conformally covers the memory stack structures and the first dielectric layer. An etching back process is performed to remove a portion of the insulating layer without exposing any portion of the memory stack structures. After the etching back process, a second dielectric layer is formed on the insulating layer and completely fills the spaces between the memory stack structures.

Abstract: A three-dimensional (3D) integrated circuit (IC) is provided. In some embodiments, a second IC die is bonded to a first IC die. A seal-ring structure is arranged in a peripheral region of the 3D IC in the first IC die and the second IC die. The seal-ring structure extends from a first semiconductor substrate of the first IC die to a second semiconductor substrate of the second IC die. A plurality of through silicon via (TSV) coupling structures is arranged at the peripheral region of the 3D IC along an inner perimeter of the seal-ring structure closer to the 3D IC than the seal-ring structure. The plurality of TSV coupling structures respectively comprises a TSV disposed in the second semiconductor substrate and electrically coupling to the 3D IC through a stack of TSV wiring layers and inter-wire vias.

Abstract: A fuse structure includes a gate structure, a first electrode, a second electrode and an isolation structure. The gate structure is at least partially formed on an active area of a substrate. The first electrode is formed on the active area of the substrate and spaced apart from the gate structure. The second electrode is formed at least on a side of the gate structure. The isolation structure is formed between the active area and the second electrode.

Abstract: A data anonymity method and a data anonymity system are provided. The data anonymity method includes the following steps. A data set comprising a plurality of direct-identifiers, a plurality of quasi-identifiers and a plurality of event logs each of which includes an activity and a timestamp is obtained. A content of each of the direct-identifiers is replaced by a pseudonym. The quasi-identifiers are classified, via a group-by algorithm with k-anonymity, as a plurality of equivalence classes. The activities corresponding to each of the direct-identifiers are linked according to the timestamps to obtain a plurality of event sequences. A similarity hierarchy tree is obtained according to a plurality of edit distances among the event sequences. The event sequences are grouped according to the similarity hierarchy tree with k-anonymity to obtain at least one group. The event sequences which are in the group are generalized.