Abstract: Various embodiments of the present disclosure are directed to a stacked complementary metal-oxide semiconductor (CMOS) image sensor. A first integrated circuit (IC) chip and a second IC chip are vertically stacked. A pixel sensor spans the first and second IC chips. The pixel sensor comprises a first transfer transistor and a photodetector that are at the first IC chip, and further comprises a source-follower transistor, a transistor capacitor, and a second transfer transistor that are at the second IC chip. The transistor capacitor and the second transfer transistor are electrically coupled in series from a source/drain region of the first transfer transistor to a gate electrode of the source-follower transistor.

Abstract: A coater cup deformation testing device includes a supporting board, a first plate and a second plate. The first plate is located on a first side surface of the supporting board. The first plate is circular and has a first diameter. The second plate is located on the first plate or on a second side surface of the supporting board. The second side surface is opposite to the first side surface. The second plate is circular and has a second diameter less than the first diameter. An area of each of the first and second plates is less than an area of the supporting board. A projection of each of the first and second plates on the supporting board is formed within the supporting board.

Abstract: A semiconductor structure includes: a substrate, a conductive pattern layer, a support layer and a re-distribution layer. The conductive pattern layer is arranged on the substrate. The support layer covers the conductive pattern layer and is provided with a via hole. The re-distribution layer is arranged on the support, and the re-distribution layer includes a test pad at least located in the via hole. The test pad includes a plurality of test contact portions and a plurality of recesses that are arranged alternately and connected mutually, and the recess is in corresponding contact with a portion of the conductive pattern layer in the via hole.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor including a first integrated circuit (IC) die stacked with a second IC die. The first IC die includes a plurality of photodetectors disposed within a first substrate. The second IC die includes a plurality of pixel transistors and a semiconductor capacitor disposed on a second substrate. The semiconductor capacitor includes a first capacitor electrode, a capacitor dielectric layer, and a doped capacitor region. The first capacitor electrode overlies the second substrate and comprises a protrusion disposed in the second substrate. The capacitor dielectric layer is disposed between the first capacitor electrode and the second substrate. The doped capacitor region is disposed within the second substrate and underlies the first capacitor electrode. The plurality of photodetectors, the plurality of pixel transistors, and the semiconductor capacitor define a pixel.

Abstract: A semiconductor structure and a manufacturing method thereof are provided. A semiconductor structure includes top, bottom, and middle tiers. The bottom tier includes a first interconnect structure overlying a first semiconductor substrate, and a first front-side bonding structure overlying the first interconnect structure. The middle tier interposed between and electrically coupled to the top and bottom tiers includes a second interconnect structure overlying a second semiconductor substrate, a second front-side bonding structure interposed between the top tier and the second interconnect structure, and a back-side bonding structure interposed between the second semiconductor substrate and the first front-side bonding structure.

Abstract: The present disclosure relates to a touch detection device and method, and an electronic apparatus. The touch detection device comprises: a charge amplification circuit connected to a sensing point of a touch panel and configured to receive an excitation signal and charges of the sensing point, amplify the charges of the sensing point, and output a capacitance change signal of the sensing point; and a capacitance compensation circuit connected to the sensing point of the touch panel and configured to inject compensation charges into the sensing point in a process during which a level of the excitation signal changes, wherein a polarity of the compensation charges is related to a direction of the level of the excitation signal changing. The embodiment of the present disclosure may compensate for or even eliminate the influence caused by the parasitic capacitance of the touch panel, improve the accuracy of touch detection, and save the circuit area.

Abstract: A semiconductor structure includes a substrate, a first dielectric layer on the substrate, a plurality of memory stack structures on the first dielectric layer, an insulating layer conformally covering the memory stack structures and the first dielectric layer, a second dielectric layer on the insulating layer and filling the spaces between the memory stack structures, a first interconnecting structure through the second dielectric layer, wherein a top surface of the first interconnecting structure is flush with a top surface of the second dielectric layer and higher than top surfaces of the memory stack structures, a third dielectric layer on the second dielectric layer, and a plurality of second interconnecting structures through the third dielectric layer, the second dielectric layer and the insulating layer on the top surfaces of the memory stack structures to contact the top surfaces of the memory stack structures.

Abstract: A p-type doping region around an isolation structure provides additional electrical isolation between pixel sensors of a pixel array. As a result, current leakage from a floating node of one pixel sensor into another is reduced. Therefore, dark current is reduced, and performance of the pixel array is improved. Additionally, pixel noise caused by electrons trapped in the isolation structure may be reduced.

Abstract: Some embodiments relate to a method that includes depositing a first layer of hard mask material over a layer of dielectric material; etching the first layer of the hard mask material, the etched first layer of hard mask material including an etched portion having a first lateral dimension; depositing a second layer of the hard mask material over the first layer of the hard mask material; etching at least a portion of the second layer of the hard mask material, while allowing a remaining portion of the hard mask material, to expose a portion of the layer of the dielectric material that has a second lateral dimension less than the first lateral dimension; and etching a trench into the layer of the dielectric material at the exposed portion of the layer of the dielectric material.

Abstract: An image sensor includes photosensitive areas in a first array within a semiconductor substrate. Microlens are disposed over the semiconductor substrate in a second array. Metal shields are disposed between a subset of the microlenses and corresponding photosensitive areas. The metal half-shields have dimensions and positions that provide half-shielding that enables half-shield phase detection autofocus. An antireflective coating is disposed over the metal half-shields. The metal half-shields and the antireflective coating may be in a composite grid that provides lateral separation between color filters. Alternatively, metal half-shields and the antireflective coating may be in below a layer that includes color filters. The antireflective coating includes a quarter-wave layer.

Abstract: A semiconductor image-sensing structure includes a reflective grid and a reflective shield disposed over a substrate. The reflective grid is disposed in a first region, and the reflective shield is disposed in a second region separated from the first region. A thickness of the reflective shield is greater than a thickness of the reflective grid.

Abstract: The present invention relates to a steering wheel component (2) and a steering wheel assembly comprising the steering wheel component (2). The steering wheel component (2) comprises an airbag door cover (21), wherein the airbag door cover (21) has an integral panel (210), wherein the panel (210) has a first area (31) for closing an airbag housing (22) and a second area (32), which is arranged beside the first area (31) and is configured as an operating surface for a multifunction switch (3).

Abstract: Multi-gate devices and methods for fabricating such are disclosed herein. An exemplary method includes forming a diffusion blocking layer on a semiconductor substrate; forming channel material layers over the diffusion blocking layer; patterning the semiconductor substrate, the channel material layers, and the diffusion blocking layer to form a trench in the semiconductor substrate, thereby defining an active region being adjacent the trench; filling the trench with a dielectric material layer and a solid doping source material layer containing a dopant; and driving the dopant from the solid doping source material layer to the active region, thereby forming an anti-punch-through (APT) feature in the active region.

Abstract: An illumination module is provided. The illumination module includes a light-emitting unit. The light-emitting unit includes a light-emitting element array and a focusing lens array. The light-emitting element array includes a plurality of light-emitting elements. The light-emitting elements are used for generating a plurality of light beams. The focusing lens array includes a plurality of focusing lenses. Each of the light-emitting elements corresponds to at least one of the focusing lenses.

Abstract: A semiconductor device includes a substrate having a front side and a back side opposite to each other. A plurality of photodetectors is disposed in the substrate within a pixel region. An isolation structure is disposed within the pixel region and between the photodetectors. The isolation structure includes a back side isolation structure extending from the back side of the substrate to a position in the substrate. A conductive plug structure is disposed in the substrate within a periphery region. A conductive cap is disposed on the back side of the substrate and extends from the pixel region to the periphery region and electrically connects the back side isolation structure to the conductive plug structure. A conductive contact lands on the conductive plug structure, and is electrically connected to the back side isolation structure through the conductive plug structure and the conductive cap.

Abstract: A stocking vehicle is provided. The stocking vehicle is configured to perform a stocking operation to transfer a first product unit from a first location to a second location. The stocking vehicle includes a stocking component. The stocking vehicle includes a motor coupled to the stocking component to facilitate performance of the stocking operation by the stocking component. The stocking vehicle includes an energy storage device configured to supply first energy to the motor during a first state of the motor and store second energy of the motor during a second state of the motor.

Abstract: A method includes following steps. A target layer is formed over a substrate. A first hard mask layer is formed over the target layer by a plasma generated using a first radio frequency generator and a second radio frequency generator. The first radio frequency generator and the second radio frequency generator have different powers. A second hard mask layer is formed over the first hard mask layer by a plasma generated using the first radio frequency generator without using the second radio frequency generator. A photoresist layer is formed over the second hard mask layer. The photoresist layer is exposed. The photoresist layer is developed. The first hard mask layer and the second hard mask layer are patterned using the photoresist layer as an etch mask. The target layer is patterned using the first hard mask layer and the second hard mask layer as an etch mask.

Abstract: Discussed is a battery module, which includes a plurality of battery assemblies and a flexible rod. Each battery assembly includes a frame and at least one battery unit, and the at least one battery unit is disposed within the frame. The flexible rod sequentially passes through the plurality of battery assemblies, and the plurality of battery assemblies jointly construct a structure configured to be curved by bending the flexible rod.

Abstract: A method of manufacturing semiconductor device includes forming a multilayer photoresist structure including a metal-containing photoresist over a substrate. The multilayer photoresist structure includes two or more metal-containing photoresist layers having different physical parameters. The metal-containing photoresist is a reaction product of a first precursor and a second precursor, and each layer of the multilayer photoresist structure is formed using different photoresist layer formation parameters. The different photoresist layer formation parameters are one or more selected from the group consisting of the first precursor, an amount of the first precursor, the second precursor, an amount of the second precursor, a length of time each photoresist layer formation operation, and heating conditions of the photoresist layers.

Abstract: Method of manufacturing semiconductor device includes forming photoresist layer over substrate. Forming photoresist layer includes combining first precursor and second precursor in vapor state to form photoresist material, wherein first precursor is organometallic having formula: MaRbXc, where M at least one of Sn, Bi, Sb, In, Te, Ti, Zr, Hf, V, Co, Mo, W, Al, Ga, Si, Ge, P, As, Y, La, Ce, Lu; R is substituted or unsubstituted alkyl, alkenyl, carboxylate group; X is halide or sulfonate group; and 1?a?2, b?1, c?1, and b+c?5. Second precursor is at least one of an amine, a borane, a phosphine. Forming photoresist layer includes depositing photoresist material over the substrate. The photoresist layer is selectively exposed to actinic radiation to form latent pattern, and the latent pattern is developed by applying developer to selectively exposed photoresist layer to form pattern.