Patents by Inventor Cheng Tai

Cheng Tai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9620239
    Abstract: A method for operating a memory is provided. The memory has an array of memory cells arranged in a plurality of rows and columns. Each row includes a label storage unit. The method includes receiving a first to-be-programmed data set to be stored into a target row and determining whether a condition is satisfied. When the condition is satisfied, performing a first operation on the first to-be-programmed data set to obtain a second to-be-programmed data set, programming the second to-be-programmed data set into the target row of memory cells, and setting the value of the label storage, unit to be a first labeling value. When the condition is not satisfied, performing a second operation on the first to-be-programmed data set to program the first to-be-programmed data set into the target row of memory cells, and setting the value of the label storage unit to be a second labeling value.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: April 11, 2017
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Cheng-Tai Huang, Chia-Chi Yang, Chen-Yi Huang
  • Publication number: 20170063096
    Abstract: The power generation and transmission device and method is able to be used to harness power such as solar and/or wind power and then transmit the power to a device on the other side of a physical structure such as a house, a car, a umbrella, a tent, and an awning.
    Type: Application
    Filed: November 14, 2016
    Publication date: March 2, 2017
    Inventors: Chih-Cheng Tai, Lucas John Myslinski, Chyh-Yih Chang, Shih Ming Tseng, Shih Hsiang Tseng
  • Publication number: 20170063213
    Abstract: A flyback converter includes: a transformer including a primary winding and a secondary winding; a first switch coupled to the primary winding; a first control module configured to control the first switch; a second switch coupled to the secondary winding; and a second control module configured to control the second switch, such that the second switch operates in an ON state during a first time period and during a second time period which follows the first time period, and such that a current flowing through the secondary winding has a direction during the second time period opposite to that during the first time period.
    Type: Application
    Filed: April 21, 2016
    Publication date: March 2, 2017
    Inventors: CHENG-TAI LIN, TING-YI HSU, CHENG-HUNG LIN, MING-TSUNG HSIEH, YU-KANG LO
  • Publication number: 20170044429
    Abstract: A gold nanocluster composition and method for preparing the same are provided. The method includes providing a gold ion-containing solution. Next, the method entails mixing the gold ion-containing solution and a reducing agent solution to obtain a first mixture liquid, and heating the first mixture liquid to obtain a second mixture liquid, wherein the second mixture liquid contains the gold nanoclusters, which are partially capped by reducing agent.
    Type: Application
    Filed: October 28, 2016
    Publication date: February 16, 2017
    Applicant: Industrial Technology Research Institute
    Inventors: Cheng-Tai CHEN, Pei-Shin JIANG, Ting-Shou CHEN, Jane S-C TSAI
  • Patent number: 9569051
    Abstract: A method for determining touch point coordinates on capacitive type touch panel includes following steps. A touch panel having a conductive layer, a plurality of first electrodes, and a plurality of second electrodes is provided. A first signal curve As1 is obtained by driving and sensing each first electrode. A second signal curve As2 is obtained by driving and sensing each second electrode. A third signal curve Bs1 is obtained by driving and sensing each first electrode, wherein the second electrode opposite to the sensed first electrode is grounded. A fourth signal curve Bs2 is gotten by driving and sensing each second electrodes, wherein the first electrode opposite to the sensed second electrode is grounded. The coordinates of the touch points are obtained by comparing the first signal curve As1, the second signal curve As2, the third signal curve Bs1, and the fourth signal curve Bs2.
    Type: Grant
    Filed: January 22, 2015
    Date of Patent: February 14, 2017
    Assignee: TIANJIN FUNAYUANCHUANG TECHNOLOGY CO., LTD.
    Inventors: Chien-Yung Cheng, Cheng-Tai Huang, Chun-Lung Huang, Feng-Yu Kuo, Po-Sheng Shih
  • Publication number: 20160358882
    Abstract: A semiconductor device and a method of fabricating the same are introduced. In an embodiment, one or more passivation layers are formed over a first substrate. Recesses are formed in the passivation layers and one or more conductive pads are formed in the recesses. One or more barrier layers are formed between the passivation layers and the conductive pads. The conductive pads of the first substrate are aligned to the conductive pads of a second substrate and are bonded using a direct bonding method.
    Type: Application
    Filed: August 16, 2016
    Publication date: December 8, 2016
    Inventors: Ping-Yin Liu, Lan-Lin Chao, Cheng-Tai Hsiao, Xin-Hua Huang, Hsun-Chung Kuang
  • Patent number: 9506864
    Abstract: A gold nanocluster composition and method for preparing the same are provided. The method includes providing a gold ion-containing solution. Next, the method entails mixing the gold ion-containing solution and a reducing agent solution to obtain a first mixture liquid, and heating the first mixture liquid to obtain a second mixture liquid, wherein the second mixture liquid contains the gold nanoclusters, which are partially capped by reducing agent.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: November 29, 2016
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Cheng-Tai Chen, Pei-Shin Jiang, Ting-Shou Chen, Jane S-C Tsai
  • Publication number: 20160336430
    Abstract: A semiconductor structure includes a substrate and a fin. The fin extends from the substrate and is formed with a hole therethrough. The hole is defined by a confronting pair of wall parts. One of the wall parts is more arcuate than the other of the wall parts. A method for fabricating the semiconductor structure is also disclosed.
    Type: Application
    Filed: July 25, 2016
    Publication date: November 17, 2016
    Inventors: CHIA-CHENG TAI, CHUN-LIANG TAI
  • Publication number: 20160290718
    Abstract: A vacuum dye sublimation or dye transferring machine provides an even heating mechanism and structures for avoiding a position shifting of a dye sublimation film. A color changing coating composition comprises a first amount of polyurethane, a second amount of curing compounds/agents or hardening agent, a third amount of thermalchromic pigment, and a fourth amount of a solvent. A wall decoration method and device.
    Type: Application
    Filed: March 30, 2016
    Publication date: October 6, 2016
    Inventors: Yanqiang Ye, Chih-Cheng Tai
  • Patent number: 9425155
    Abstract: A semiconductor device and a method of fabricating the same are introduced. In an embodiment, one or more passivation layers are formed over a first substrate. Recesses are formed in the passivation layers and one or more conductive pads are formed in the recesses. One or more barrier layers are formed between the passivation layers and the conductive pads. The conductive pads of the first substrate are aligned to the conductive pads of a second substrate and are bonded using a direct bonding method.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: August 23, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ping-Yin Liu, Hsun-Chung Kuang, Cheng-Tai Hsiao, Xin-Hua Huang, Lan-Lin Chao
  • Patent number: 9418763
    Abstract: The present invention provides a memory. The memory includes a plurality of memory cells arranged as an array with a plurality of rows and a plurality of column. A memory cell is connected to at least one redundant memory cell in a same row for storing same data as the memory cell; and a column of memory cells correspond to one redundant column of redundant memory cells wherein each redundant memory cell in the redundant column stores same data as the memory cell in a same row.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: August 16, 2016
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Cheng-Tai Huang, Jiaqi Yang, Chen-Yi Huang
  • Patent number: 9406749
    Abstract: A semiconductor structure includes a substrate and a fin. The fin extends from the substrate and is formed with a hole therethrough. The hole is defined by a confronting pair of wall parts. One of the wall parts is more arcuate than the other of the wall parts. A method for fabricating the semiconductor structure is also disclosed.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: August 2, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chia-Cheng Tai, Chun-Liang Tai
  • Publication number: 20160178596
    Abstract: A method for detecting metal ions and chemical/biochemical molecules is provided. The method includes providing a probe, wherein the probe includes: a gold nanocluster; a reducing agent and a chelating agent partially capped on a surface of the gold nanocluster, wherein the probe is formed of reducing gold ions by the reducing agent, and the gold ions and the reducing agent have a molar ratio of 1:0.7 to 1:1.9. The probe may interact with several metal ions of an aqueous solution to produce different changes of fluorescent spectra. Chemical/biochemical molecules can be detected by the fluorescent spectra difference caused by the interaction between the metal ions and the chemical/biochemical molecules.
    Type: Application
    Filed: December 24, 2014
    Publication date: June 23, 2016
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Cheng-Tai CHEN, Pei-Shin JIANG
  • Publication number: 20160155665
    Abstract: An integrated circuit structure includes a package component, which further includes a non-porous dielectric layer having a first porosity, and a porous dielectric layer over and contacting the non-porous dielectric layer, wherein the porous dielectric layer has a second porosity higher than the first porosity. A bond pad penetrates through the non-porous dielectric layer and the porous dielectric layer. A dielectric barrier layer is overlying, and in contact with, the porous dielectric layer. The bond pad is exposed through the dielectric barrier layer. The dielectric barrier layer has a planar top surface. The bond pad has a planar top surface higher than a bottom surface of the dielectric barrier layer.
    Type: Application
    Filed: February 8, 2016
    Publication date: June 2, 2016
    Inventors: Hsun-Chung Kuang, Yen-Chang Chu, Cheng-Tai Hsiao, Ping-Yin Liu, Lan-Lin Chao, Yeur-Luen Tu, Chia-Shiung Tsai, Xiaomeng Chen
  • Publication number: 20160131582
    Abstract: A gold nanocluster composition and method for preparing the same are provided. The method includes providing a gold ion-containing solution. Next, the method entails mixing the gold ion-containing solution and a reducing agent solution to obtain a first mixture liquid, and heating the first mixture liquid to obtain a second mixture liquid, wherein the second mixture liquid contains the gold nanoclusters, which are partially capped by reducing agent.
    Type: Application
    Filed: December 24, 2014
    Publication date: May 12, 2016
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Cheng-Tai CHEN, Pei-Shin JIANG, Ting-Shou CHEN, Jane S-C TSAI
  • Publication number: 20160116485
    Abstract: Compositions and methods for reconstituting a protein of interest in the plasma membrane of a Xenopus oocyte are disclosed. The method generally includes combining a preassembled membrane protein or proteins with a liposome to prepare a proteo-liposome. The proteo-liposome can have a specific composition of lipids. The proteo-liposome is incubated for sufficient time and under conditions suitable for the protein of interest to fold, associate with, or insert into the liposome's lipid bilayer. In some embodiments, the protein or proteins assemble into a protein channel or complex on or in the proteo-liposome's membrane. The treated oocytes can be used to determine the structure, function, or activity of the membrane protein of interest, the effect of a lipid microenvironment on a membrane protein of interest, or to identify compounds that modulate the function or activity of the membrane protein of interest.
    Type: Application
    Filed: June 9, 2014
    Publication date: April 28, 2016
    Inventors: Phang-Cheng Tai, Ying-hsin Hsieh, Chun Jiang, Jenny Jie Yang, Juan Zou
  • Publication number: 20160099313
    Abstract: A semiconductor structure includes a substrate and a fin. The fin extends from the substrate and is formed with a hole therethrough. The hole is defined by a confronting pair of wall parts. One of the wall parts is more arcuate than the other of the wall parts. A method for fabricating the semiconductor structure is also disclosed.
    Type: Application
    Filed: October 2, 2014
    Publication date: April 7, 2016
    Inventors: CHIA-CHENG TAI, CHUN-LIANG TAI
  • Patent number: 9279610
    Abstract: Embodiments of the present invention are directed to storage systems for milk bags. A storage system for milk bags receives milk bags and management of the stored milk bags. The milk bags are stored in compartments for easy storage and retrieval.
    Type: Grant
    Filed: January 6, 2015
    Date of Patent: March 8, 2016
    Inventors: Tina Ting-Yuan Wang, Chih-Cheng Tai, Michael Clair Houston
  • Publication number: 20160046835
    Abstract: An anti-corrosive, wear-resistant, and UV-blocking/absorbing coating for dye sublimation, the preparation method thereof, and the application thereof are provided. The coating for dye sublimation includes the following compositions, in parts by weight: 70 to 99 parts of polyurethane, 0.4 to 10 parts of inorganic nano silicon oxides, 0.3 to 10 parts of inorganic nano aluminum oxides, and 0.3 to 10 parts of inorganic nano zirconium oxides.
    Type: Application
    Filed: August 12, 2015
    Publication date: February 18, 2016
    Inventors: Yanqiang Ye, Chih-Cheng Tai, Lei Li, Zhixiang Wu, Wenjun Liao
  • Patent number: 9257399
    Abstract: An integrated circuit structure includes a package component, which further includes a non-porous dielectric layer having a first porosity, and a porous dielectric layer over and contacting the non-porous dielectric layer, wherein the porous dielectric layer has a second porosity higher than the first porosity. A bond pad penetrates through the non-porous dielectric layer and the porous dielectric layer. A dielectric barrier layer is overlying, and in contact with, the porous dielectric layer. The bond pad is exposed through the dielectric barrier layer. The dielectric barrier layer has a planar top surface. The bond pad has a planar top surface higher than a bottom surface of the dielectric barrier layer.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: February 9, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsun-Chung Kuang, Yen-Chang Chu, Cheng-Tai Hsiao, Ping-Yin Liu, Lan-Lin Chao, Yeur-Luen Tu, Chia-Shiung Tsai, Xiaomeng Chen