Patents by Inventor Cheng Tsai

Cheng Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250132217
    Abstract: A semiconductor device includes a substrate, an active structure, a first dielectric layer and a second dielectric layer. The active structure is formed on the substrate and includes an active channel sheet, wherein the active channel sheet has a first lateral surface. The first dielectric layer is formed above the active structure and has a recess, wherein the recess is recessed with respect to the first lateral surface of the active channel sheet. The second dielectric layer is formed within the recess and has a dielectric constant, wherein the dielectric constant is less than 3.9.
    Type: Application
    Filed: October 19, 2023
    Publication date: April 24, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Ting LAN, Shih-Cheng CHEN, Chia-Cheng TSAI, Kuo-Cheng CHIANG
  • Publication number: 20250123711
    Abstract: A circuit, for a touch panel, comprises a plurality of touch signal processing circuits, coupled to a plurality of sensors of the touch panel to receive a plurality of touch signals, wherein when a first sensor within the plurality of sensors is touched, the first sensor generates a first touch signal of the plurality of touch signals; and a controller, coupled to the plurality of touch signal processing circuits, configured to adjust the first touch signal according to the plurality of touch signals except the first touch signal.
    Type: Application
    Filed: October 16, 2023
    Publication date: April 17, 2025
    Applicant: HIMAX TECHNOLOGIES LIMITED
    Inventors: Yaw-Guang Chang, Ren-Yuan Huang, Yi-Yang Tsai, Hao-Cheng Tsai
  • Publication number: 20250116914
    Abstract: An imaging lens assembly module includes an imaging lens assembly and a variable aperture module. The imaging lens assembly has an optical axis. The variable aperture module includes a light blocking sheet set, a fixed element, a movable element, and an annular light blocking portion. The light blocking sheet set includes at least two light blocking sheets, wherein the at least two light blocking sheets are mutually stacked along a circumferential direction surrounding the optical axis to form a variable aperture opening. The fixed element has a sidewall structure. The annular light blocking portion surrounds the optical axis to form a fixed aperture opening.
    Type: Application
    Filed: December 19, 2024
    Publication date: April 10, 2025
    Inventors: Heng-Yi SU, Chia-Cheng TSAI, Hao-Jan CHEN, Ming-Ta CHOU
  • Patent number: 12274053
    Abstract: A semiconductor structure includes an array of active patterns, a peripheral pattern around the array of active patterns, and at least a branch pattern connected to an inner edge of the peripheral pattern. The active patterns respectively extend along a first direction and are arranged end-to-end along the first direction and side-by-side along a second direction that is different form the first direction. The branch pattern extends along the first direction. An end portion of the branch pattern and an end portion of one of the active patterns that is immediately side-by-side next to the branch pattern are flush along the second direction.
    Type: Grant
    Filed: April 12, 2022
    Date of Patent: April 8, 2025
    Assignee: Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Yaoguang Xu, Chien-Cheng Tsai, Junyi Zheng, Jianshan Wu, Zhiyi Zhou
  • Patent number: 12272646
    Abstract: A semiconductor memory device and a manufacturing method thereof are provided in the present invention. An under-cut structure is formed at an edge of a bit line contact opening in the process of forming the bit line contact opening for avoiding short problems caused by alignment shifting, and the process window of the process of forming the bit line contact opening may be improved accordingly.
    Type: Grant
    Filed: July 26, 2023
    Date of Patent: April 8, 2025
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Feng-Yi Chang, Shih-Fang Tzou, Fu-Che Lee, Chien-Cheng Tsai, Feng-Ming Huang
  • Patent number: 12265904
    Abstract: An apparatus and a method for neural network computation are provided. The apparatus for neural network computation includes a first neuron circuit and a second neuron circuit. The first neuron circuit is configured to execute a neural network computation of at least one computing layer with a fixed feature pattern in a neural network algorithm. The second neuron circuit is configured to execute the neural network computation of at least one computing layer with an unfixed feature pattern in the neural network algorithm. The performance of the first neuron circuit is greater than that of the second neuron circuit.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: April 1, 2025
    Assignee: Industrial Technology Research Institute
    Inventors: Sih-Han Li, Shih-Chieh Chang, Shyh-Shyuan Sheu, Jian-Wei Su, Fu-Cheng Tsai
  • Publication number: 20250104054
    Abstract: A blockchain-based method for saving research data is implemented by a processing system. The processing system is connected to a blockchain system, and stores a user account associated with the blockchain system. The method includes sending a deployment request that includes the user account and an application to the blockchain system, in order for the blockchain system to deploy the application associated with the user account on the blockchain system. The method further includes generating and sending a processing request that includes a to-be-processed dataset to the blockchain system, in order for the blockchain system to analyze the to-be-processed dataset using the application so as to obtain a target dataset that corresponds to the to-be-processed dataset and that indicates an analysis result of the to-be-processed dataset, to store the to-be-processed dataset and the target dataset in the blockchain system, and to send the target dataset to the processing system.
    Type: Application
    Filed: February 26, 2024
    Publication date: March 27, 2025
    Applicant: National Taiwan Normal University
    Inventor: Yun-Cheng TSAI
  • Patent number: 12260321
    Abstract: A data feature augmentation system and method for a low-precision neural network are provided. The data feature augmentation system includes a first time difference unit. The first time difference unit includes a first sample-and-hold circuit and a subtractor. The first sample-and-hold circuit is used for receiving an input signal and obtaining a first signal according to the input signal. The first signal is related to a first leakage rate of the first sample-and-hold circuit and the first signal is the signal generated by delaying the input signal by one time unit. The subtractor is used for performing subtraction on the input signal and the first signal to obtain a time difference signal. The input signal and the time difference signal are inputted to the low-precision neural network.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: March 25, 2025
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Fu-Cheng Tsai, Yi-Ching Kuo, Chih-Sheng Lin, Shyh-Shyuan Sheu, Tay-Jyi Lin, Shih-Chieh Chang
  • Publication number: 20250098219
    Abstract: A device includes: a substrate having a semiconductor fin; a stack of semiconductor channels on the substrate and positioned over the fin; a gate structure wrapping around the semiconductor channels; a source/drain abutting the semiconductor channels; an inner spacer positioned between the stack of semiconductor channels and the fin; an undoped semiconductor layer vertically adjacent the source/drain and laterally adjacent the fin; and an isolation structure that laterally surrounds the undoped semiconductor layer, the isolation structure being between the source/drain and the inner spacer.
    Type: Application
    Filed: February 15, 2024
    Publication date: March 20, 2025
    Inventors: Jung-Hung CHANG, Shih-Cheng CHEN, Tsung-Han CHUANG, Fu-Cheng CHANG, Wen-Ting LAN, Chia-Cheng TSAI, Kuo-Cheng CHIANG, Chih-Hao WANG, Wang-Chun Huang, Shi-Syuan Huang
  • Publication number: 20250096470
    Abstract: An electronic device includes a casing, an antenna, and a connector. The casing includes a metal layer and a first slot and a second slot located on the metal layer. The metal layer includes a metal connecting segment, a first region, and a second region. The metal connecting segment is located between the first slot and the second slot, and the first region and the second region are separated by the first slot, the second slot, and the metal connecting segment. The antenna is connected to the first region, and the antenna is adapted to resonate at a frequency band. The connector is connected to the second region.
    Type: Application
    Filed: July 2, 2024
    Publication date: March 20, 2025
    Applicant: PEGATRON CORPORATION
    Inventors: Chang-Hsun Wu, Ming-Huang Chen, Yu-Peng Lin, Hung-Cheng Tsai, Kuo-Yung Chiu, Hsuan-Chi Lin, Chao-Hsu Wu
  • Publication number: 20250098237
    Abstract: Semiconductor structures and methods of forming the same are provided. In an embodiment, an exemplary semiconductor structure includes a first transistor. The first transistor includes a first gate structure wrapping around a plurality of first nanostructures disposed over a substrate, a first source/drain feature electrically coupled to a topmost nanostructure of the plurality of first nanostructures and isolated from a bottommost nanostructure of the plurality of first nanostructures by a first dielectric layer, and a first semiconductor layer disposed between the substrate and the first source/drain feature, wherein the first source/drain feature is in direct contact with a top surface of the first semiconductor layer.
    Type: Application
    Filed: January 4, 2024
    Publication date: March 20, 2025
    Inventors: Jung-Hung Chang, Shih-Cheng Chen, Tsung-Han Chuang, Wen-Ting Lan, Chia-Cheng Tsai, Kuo-Cheng Chiang, Chih-Hao Wang
  • Publication number: 20250089140
    Abstract: An LED driving apparatus, a microcontroller, and a control method for an LED module are provided. The LED driving apparatus includes a power supply module, a switch module, and a control module. The power supply module is configured to supply power to the LED module, in which the power supply module determines whether to trigger an overcurrent protection based on whether an output current exceeds a threshold current. The control module is configured to receive an overcurrent detection signal to control a conduction state of the switch module, so as to affect the current amount of the LED module. When the overcurrent detection signal indicates the output current exceeds the threshold current, the control module outputs a first control signal based on the overcurrent detection signal to control the switch module, to prevent the overcurrent protection from being triggered.
    Type: Application
    Filed: January 8, 2024
    Publication date: March 13, 2025
    Inventors: Chun-Yi WU, Lian-Cheng TSAI, Chih-Wei TSAI
  • Publication number: 20250079104
    Abstract: A protection device includes a meltable conductor, an electrode set, and a heating element. The meltable conductor has a core metal layer and a bottom covering layer with low melting point. The core metal layer has a first low melting point metal layer, a second low melting point metal layer, and a high melting point metal layer laminated therebetween. The bottom covering layer with low melting point is disposed on a bottom surface of the core metal layer. The electrode set has a first electrode and a second electrode respectively connected to two terminals of the meltable conductor. The heating element is disposed under the bottom covering layer, thereby heating up and blowing the meltable conductor in the event of over-voltage.
    Type: Application
    Filed: March 8, 2024
    Publication date: March 6, 2025
    Inventors: Tung-Cheng TSAI, Po-Chih SHEN, Wei-Tsang TAI
  • Publication number: 20250068320
    Abstract: The present disclosure discloses a display apparatus having an on-screen display control mechanism. A signal receiving terminal receives a keyboard input signal. A signal transmission circuit receives the keyboard input signal by using an input terminal from the signal receiving terminal and transmits the keyboard input signal to a first output terminal and a second output terminal respectively in a keyboard signal transmission mode and a on-screen display control mode. The display control circuit controls a display panel to display a on-screen display including control items and an indicating object under the on-screen display control mode, receive the keyboard input signal from the second output terminal to retrieve key information and control the indicating object according to the key information to move among the control items to switch a selected control item indicated thereby or execute a control function of the selected control item.
    Type: Application
    Filed: August 15, 2024
    Publication date: February 27, 2025
    Inventors: Tsung-Hsien LEE, Shih-Cheng TSAI
  • Publication number: 20250072065
    Abstract: A device includes: a substrate; a stack of semiconductor channels on the substrate; a gate structure wrapping around the semiconductor channels; a source/drain region abutting the semiconductor channels; and a hybrid structure between the source/drain region and the substrate. The hybrid structure includes: a first semiconductor layer under the source/drain region; and an isolation region extending vertically from an upper surface of the first semiconductor layer to a level above a bottom surface of the first semiconductor layer.
    Type: Application
    Filed: January 5, 2024
    Publication date: February 27, 2025
    Inventors: Jung-Hung CHANG, Shih-Cheng CHEN, Chia-Hao YU, Chia-Cheng TSAI, Kuo-Cheng CHIANG, Chih-Hao WANG
  • Publication number: 20250072067
    Abstract: A semiconductor structure includes an isolation structure in a substrate, a metal gate structure over the substrate and a portion of the isolation structure, a spacer at sidewalls of the metal gate structure, epitaxial source/drain structure at two sides of the metal gate structure, and a protection layer over the isolation structure. The protection layer and the spacer include a same material.
    Type: Application
    Filed: August 25, 2023
    Publication date: February 27, 2025
    Inventors: SHIH-CHENG CHEN, WEN-TING LAN, JUNG-HUNG CHANG, CHIA-CHENG TSAI, KUO-CHENG CHIANG
  • Publication number: 20250060653
    Abstract: An imaging lens module includes an imaging lens, an adjustable aperture module, a first spacer and a second spacer. The adjustable aperture module is disposed between an object-side lens group and an image-side lens group of the imaging lens and comprises a blade assembly, fixed shafts, a movable component and a driving mechanism. The blade assembly includes at least two light-blocking blades forming a light pass aperture. The driving mechanism is to rotate the movable component in a circumferential direction, allowing the blade assembly to move relative to the fixed shafts for varying an aperture size of the light pass aperture. The fixed shafts are disposed on the first spacer. The second spacer and the first spacer together form an inner space in which the adjustable aperture module is accommodated. The second spacer receives and is in physical contact with the object-side lens group.
    Type: Application
    Filed: January 17, 2024
    Publication date: February 20, 2025
    Applicant: LARGAN PRECISION CO., LTD.
    Inventors: Te-Sheng TSENG, Chia-Cheng TSAI, Heng Yi SU, Ming-Ta CHOU
  • Patent number: 12211854
    Abstract: An array substrate includes a substrate; a gate disposed on the substrate; a first insulating layer covering the gate; a first semiconductor layer and a second semiconductor layer that are provided on the first insulating layer, a channel corresponding to the gate being provided in the first semiconductor layer and second semiconductor layer, the second semiconductor layer including a first metal oxide semiconductor layer and a second metal oxide semiconductor layer which are stacked, both the first metal oxide semiconductor layer and the second metal oxide semiconductor layer being disconnected at the channel, and the oxygen vacancy concentration of the second metal oxide semiconductor layer being less than the oxygen vacancy concentration of the first metal oxide semiconductor layer; and a source and a drain that are provided on the second semiconductor layer, both the source and the drain being in electrically conductive contact with the second semiconductor layer.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: January 28, 2025
    Assignee: INFOVISION OPTOELECTRONICS (KUNSHAN) CO., LTD.
    Inventors: Te-Chen Chung, Chih-Cheng Tsai, Huilong Zheng, Xingang Wang
  • Publication number: 20250022943
    Abstract: A semiconductor device includes a 2-D material channel layer, a gate structure, and source/drain electrodes. The gate structure is over a channel region of the 2-D material channel layer. The source/drain electrodes are over source/drain regions of the 2-D material channel layer, respectively. Each of the source/drain electrodes includes a 2-D material electrode and a metal electrode. The 2-D material electrode is below a bottom surface of a corresponding one of the source/drain regions of the 2-D material channel layer. The metal electrode is over a top surface of the corresponding one of the source/drain regions of the 2-D material channel layer.
    Type: Application
    Filed: July 14, 2023
    Publication date: January 16, 2025
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yen LIN, Po-Cheng TSAI, Che-Jia CHANG
  • Publication number: 20250010098
    Abstract: A quantum graphene generator contains: a far-infrared quantum implantation device which includes: a body, a lid, a crystal quartz, a plasma sheet, an intermediate-frequency current device, a magnet assembly, and an energy medium. The body includes an accommodation chamber. The lid is covered on the body and includes a receiving space. The crystal quartz is received in the accommodation chamber and includes the energy medium. The plasma sheet is comprised of multiple multi-stranded coil layers, multiple copper adhering layers, and a copper sheet. The intermediate-frequency current device includes multiple magnetic elements. A top of the magnet assembly is arranged on a middle copper adhering layer below the top copper adhering layer, and a bottom of the magnet assembly is located on the energy medium to increase the magnetic field.
    Type: Application
    Filed: July 5, 2023
    Publication date: January 9, 2025
    Inventors: Zhi-Min LI, Ching-Cheng TSAI