Patents by Inventor Cheng Tsai

Cheng Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12032505
    Abstract: A command transforming method, applied to a command transforming system comprising a first transceiving interface and a second transceiving interface, comprising: receiving at least one command transmitted from a first device via the first transceiving interface; determining a first sequence rule of the first device and a second sequence rule of a second device, wherein the first sequence rule means if the first device is required to process the command in sequence and the second sequence rule means if the second device is required to process the command in sequence; transmitting the command to the second device via the second transceiving interface; processing the command by the second device according to the second sequence rule and transmitting a response corresponding to the command to the second transceiving interface by the second device; and transmitting the response to the first device according to the first sequence rule.
    Type: Grant
    Filed: February 23, 2022
    Date of Patent: July 9, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventors: Cheng-Yuan Hsiao, Sung-Kao Liu, Yi-Cheng Tsai, Chi-Rung Wu
  • Patent number: 12025653
    Abstract: An artificial intelligence (AI)-based constrained random verification (CRV) method for a design under test (DUT) includes: receiving a series of constraints; obtaining a limited constraint range according to the series of constraints; generating a series of stimuli according to the limited constraint range; and verifying the DUT by the series of stimuli; wherein at least one of the step of obtaining the limited constraint range according to the series of constraints and the step of generating the series of stimuli according to the limited constraint range employs an AI algorithm.
    Type: Grant
    Filed: October 19, 2022
    Date of Patent: July 2, 2024
    Assignee: MEDIATEK INC.
    Inventors: Chung-An Wang, Chiao-Hua Tseng, Chia-Cheng Tsai, Tung-Yu Lee, Yen-Her Chen, Chien-Hsin Yeh, Chia-Shun Yeh, Chin-Tang Lai
  • Patent number: 12019365
    Abstract: A variable aperture module includes a blade assembly, a positioning element, a driving part and pressing structures. The blade assembly includes movable blades disposed around an optical axis to form a light passable hole with an adjustable size. Each movable blade has a positioning hole and a movement hole adjacent thereto. The positioning element includes positioning structures disposed respectively corresponding to the positioning holes. The driving part includes a rotation element disposed corresponding to the movement holes and is rotatable with respect to the positioning element. The pressing structures are disposed respectively corresponding to the movable blades. Each pressing structure is at least disposed into at least one of the positioning hole and the movement hole of the corresponding movable blade. Each pressing structure at least presses against at least one of the corresponding one positioning structure and the rotation element.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: June 25, 2024
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Chia-Cheng Tsai, Hsiu-Yi Hsiao, Ming-Ta Chou, Te-Sheng Tseng
  • Patent number: 12003299
    Abstract: The present invention provides an electronic device including a first antenna, a second antenna and a wireless communication chip. The wireless communication chip is configured to control the first antenna to broadcast a packet, control the second antenna to receive the packet broadcasted from the first antenna, and determine channel state information according to the packet received by the second antenna.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: June 4, 2024
    Assignee: MEDIATEK INC.
    Inventors: Po-Jung Chiu, I-Cheng Tsai, Ching-Chia Cheng, Shun-Yong Huang
  • Publication number: 20240176211
    Abstract: An imaging lens assembly module includes an imaging lens assembly and a variable aperture module. The imaging lens assembly has an optical axis. The variable aperture module includes a light blocking sheet set, a fixed element, a movable element, and an annular light blocking portion. The light blocking sheet set includes at least two light blocking sheets, wherein the at least two light blocking sheets are mutually stacked along a circumferential direction surrounding the optical axis to form a variable aperture opening. The fixed element has a sidewall structure. The annular light blocking portion surrounds the optical axis to form a fixed aperture opening.
    Type: Application
    Filed: November 28, 2023
    Publication date: May 30, 2024
    Inventors: Heng-Yi SU, Chia-Cheng TSAI, Hao-Jan CHEN, Ming-Ta CHOU
  • Patent number: 11992053
    Abstract: A vaporizer comprises an absorber, a heating element, and a porous cover layer. The absorber is configured to absorb a material to be vaporized. The heating element is configured to heat and vaporize the material to be vaporized in the absorber, and includes a first electrode portion, a second electrode portion, and an electrically conductive connecting member connected between the first electrode portion and the second electrode portion. The porous cover layer covers at least a portion of the heating element without covering the first and second electrode portions. A ratio of an area of the porous cover layer to an area of the electrically conductive connecting member is defined as a covering ratio, which is at least 50%. A porosity of the porous cover layer ranges from 30% to 75%.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: May 28, 2024
    Assignee: POLYTRONICS TECHNOLOGY CORP.
    Inventors: Po-Chih Shen, Tong Cheng Tsai, Yu Sian Jhou
  • Patent number: 11996058
    Abstract: A display device is provided and includes a display panel, a light source, a light source controller, and a timing controller. The light source is adjacent to the display panel. The light source controller is electrically connected to the light source. The timing controller is electrically connected to the light source controller and the display panel. The timing controller includes a decoding unit and first and second processing units. The first processing unit is electrically connected to the decoding unit and the display panel. The second processing unit is electrically connected to the decoding unit and the light source controller. The decoding unit provides a refresh signal to the first and second processing units so that the display panel refreshes displayed content in a first refresh sequence according to first refresh rates, and the light source refreshes brightness in a second refresh sequence according to second refresh rates.
    Type: Grant
    Filed: February 7, 2023
    Date of Patent: May 28, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Huang-Chi Chao, Wei-Cheng Tsai, Ming-Chi Weng, Yu-Hsin Feng, Cheng-Tso Hsiao, Ming-Feng Hsieh, Chien-Hung Chan
  • Publication number: 20240152671
    Abstract: A violation checking method includes generating a violation log report for a design, classifying violation logs in the violation log report into high-risk logs and low-risk logs by a machine learning model, reviewing the high-risk logs, and modifying the design if at least one bug is identified in the high-risk logs.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 9, 2024
    Applicant: MEDIATEK INC.
    Inventors: Chi-Ming Lee, Chung-An Wang, Cheok Yan Goh, Chia-Cheng Tsai, Chien-Hsin Yeh, Chia-Shun Yeh, Chin-Tang Lai
  • Publication number: 20240126633
    Abstract: A method for responding to a command is adapted for a storage device. The method for responding to a command includes following steps of: sequentially receiving a first command and a second command by a bridge of the storage device from a host; executing the first command and the second command to generate a status completion signal or a status error signal by the bridge; and detecting an error state of at least one of the first command and the second command to execute a response mode or an idle mode by the bridge according to the error state so as to respond to the host.
    Type: Application
    Filed: August 14, 2023
    Publication date: April 18, 2024
    Inventors: Yi Cheng TSAI, Sung-Kao LIU, Cheng-Yuan HSIAO, Po-Hao CHEN
  • Publication number: 20240107903
    Abstract: A memory device includes a substrate, a 2-D material channel layer, a 2-D material charge storage layer, source/drain contacts, a gate dielectric layer, and a gate electrode. The 2-D material channel layer is over the substrate. The 2-D material charge storage layer is over the 2-D material channel layer. The 2-D charge storage layer and the 2-D material channel layer include the same chalcogen atoms. The source/drain contacts are over the 2-D material channel layer. The gate dielectric layer covers the source/drain contacts and the 2-D material charge storage layer. The gate electrode is over the gate dielectric layer.
    Type: Application
    Filed: March 13, 2023
    Publication date: March 28, 2024
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yen LIN, Po-Cheng TSAI
  • Publication number: 20240103342
    Abstract: A variable aperture module includes a blade assembly, a positioning element, a driving part and pressing structures. The blade assembly includes movable blades disposed around an optical axis to form a light passable hole with an adjustable size. Each movable blade has a positioning hole and a movement hole adjacent thereto. The positioning element includes positioning structures disposed respectively corresponding to the positioning holes. The driving part includes a rotation element disposed corresponding to the movement holes and is rotatable with respect to the positioning element. The pressing structures are disposed respectively corresponding to the movable blades. Each pressing structure is at least disposed into at least one of the positioning hole and the movement hole of the corresponding movable blade. Each pressing structure at least presses against at least one of the corresponding one positioning structure and the rotation element.
    Type: Application
    Filed: November 21, 2022
    Publication date: March 28, 2024
    Applicant: LARGAN PRECISION CO., LTD.
    Inventors: Chia-Cheng TSAI, Hsiu-Yi HSIAO, Ming-Ta CHOU, Te-Sheng TSENG
  • Publication number: 20240096864
    Abstract: An optical device includes an optical component and an electrical component. The optical component has a sensing surface and a backside surface opposite to the sensing surface. The electrical component is disposed adjacent to the backside surface of the optical component and configured to support the optical component. A portion of the backside surface of the optical component is exposed from the electrical component.
    Type: Application
    Filed: September 20, 2022
    Publication date: March 21, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsiang-Cheng TSAI, Ying-Chung CHEN
  • Publication number: 20240091838
    Abstract: A forming method of a processing curve in a stamping process is provided. The method includes the following steps. A plurality of processing curves are established, and an optimization target is set for the processing curves according to material characteristics of a workpiece, process requirements and a finished product CAD file. At least two of the processing curves are selected and superimposed to form a basic forming curve, wherein each subsection of the basic forming curve corresponds to a selected processing curve. Whether the selected processing curve in each subsection of the basic forming curve matches the optimization target is determined.
    Type: Application
    Filed: November 28, 2022
    Publication date: March 21, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Po-Huang SHIEH, Hsuan-Yu HUANG, Ming-Cheng TSAI, Yi-Ping HUANG
  • Publication number: 20240096976
    Abstract: A method includes forming a gate dielectric layer over a gate electrode layer; forming a 2-D material layer over the gate dielectric layer; forming source/drain contacts over source/drain regions of the 2-D material layer, in which each of the source/drain contacts includes an antimonene layer and a metal layer over the antimonene layer; and after forming the source/drain contacts, removing a first portion of the 2-D material layer exposed by the source/drain contacts, while leaving a second portion of the 2-D material layer remaining over the gate dielectric layer as a channel region.
    Type: Application
    Filed: January 6, 2023
    Publication date: March 21, 2024
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yen LIN, Po-Cheng TSAI
  • Publication number: 20240079051
    Abstract: Disclosed is a memory cell including a first transistor having a first terminal coupled to a bit line; a second transistor having a first terminal coupled to a bit line bar; a weight storage circuit coupled between a gate terminal of the first transistor and a gate terminal of the second transistor, storing a weight value, and determining to turn on the first transistor or the second transistor according to the weight value; and a driving circuit coupled to a second terminal of the first transistor, a second terminal of the second transistor, and at least one word line, receiving at least one threshold voltage and at least one input data from the word line, and determining whether to generate an operation current on a path of the turned-on first transistor or the turned-on second transistor according to the threshold voltage and the input data.
    Type: Application
    Filed: November 8, 2022
    Publication date: March 7, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Chih-Sheng Lin, Tuo-Hung Hou, Fu-Cheng Tsai, Jian-Wei Su, Kuo-Hua Tseng
  • Publication number: 20240071225
    Abstract: A risk control system for traffic devices includes a light emitting device, a processing element and a user prompting element. The processing element is electrically connected with the light emitting device, and outputs a prompt signal. The user prompting element is electrically connected with the processing element, and receives the prompt signal.
    Type: Application
    Filed: July 28, 2023
    Publication date: February 29, 2024
    Inventors: Yu-Chien KAO, Chueh-Yuan NIEN, Yi-Cheng TSAI
  • Patent number: 11910538
    Abstract: In one example, an electronic device housing may include a substrate, an insulating adhesive layer formed on a surface of the substrate, a patterned electroless plating layer formed on the insulating adhesive layer, and a patterned electrolytic plating layer formed on the patterned electroless plating layer.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: February 20, 2024
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Yi-Chen Chen, Kun Cheng Tsai, Kuan-Ting Wu, Ying-Hung Ku, Hsueh Chen Hung
  • Publication number: 20240030391
    Abstract: A method of manufacturing a light-emitting device includes a number of operations. A light-emitting element is formed. A simulation of a metasurface is performed. The metasurface is formed based on the simulation of the metasurface. The metasurface is disposed on a light-emitting side of the light-emitting element. Performing the simulation of the metasurface includes establishing a metasurface model of the metasurface, in which the metasurface model has a plurality of unit cells, and phase compensation values of the unit cells are periodically distributed with a supercell period length in a deflection direction. The phase compensation values of the unit cell are adjusted and the light source is set to simulate the multiple transmittances of the metasurface model under different phase compensation values. The phase compensation values at a peak value of transmittance are selected as process parameters of the metasurface.
    Type: Application
    Filed: December 13, 2022
    Publication date: January 25, 2024
    Inventors: Yu-Heng HONG, Wei-Cheng TSAI, Yao-Wei HUANG, Shih-Chen CHEN, Hao-Chung KUO
  • Publication number: 20240030256
    Abstract: A semiconductor image sensing structure includes a semiconductor substrate having a front side and a back side, a pixel sensor disposed in the semiconductor substrate, a transistor disposed over the front side of the semiconductor substrate, and a reflective structure disposed over the front side of the semiconductor substrate. A gate structure of the transistor and the reflective structure include a same material. A top surface of the gate structure of the transistor and a top surface of the reflective structure are aligned with each other.
    Type: Application
    Filed: July 21, 2022
    Publication date: January 25, 2024
    Inventors: WEI-LIN CHEN, YU-CHENG TSAI, CHUN-HAO CHOU, KUO-CHENG LEE
  • Publication number: 20240030034
    Abstract: A method includes forming a 2-D material semiconductor layer over a substrate; forming source/drain electrodes covering opposite sides of the 2-D material semiconductor layer, while leaving a portion of the 2-D material semiconductor layer exposed by the source/drain electrodes; forming a first gate dielectric layer over the portion of the 2-D material semiconductor layer by using a physical deposition process; forming a second gate dielectric layer over the first gate dielectric layer by using a chemical deposition process, in which a thickness of the first gate dielectric layer is less than a thickness of the second gate dielectric layer; and forming a gate electrode over the second gate dielectric layer.
    Type: Application
    Filed: October 4, 2023
    Publication date: January 25, 2024
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yen LIN, Po-Cheng TSAI, Yu-Wei ZHANG