Abstract: The present disclosure, in some embodiments, relates to a metal-insulator-metal (MIM) capacitor structure. The MIM capacitor structure includes one or more lower interconnects disposed within a lower dielectric structure over a substrate. A first dielectric layer is over the lower dielectric structure and includes sidewalls defining a plurality of openings extending through the first dielectric layer. A lower electrode is arranged along the sidewalls and over an upper surface of the first dielectric layer, a capacitor dielectric is arranged along sidewalls and an upper surface of the lower electrode, and an upper electrode is arranged along sidewalls and an upper surface of the capacitor dielectric. A spacer is along opposing outermost sidewalls of the upper electrode. The spacer has an outermost surface extending from a lowermost surface of the spacer to a top of the spacer. The outermost surface is substantially aligned with an outermost sidewall of the lower electrode.

Abstract: The present disclosure, in some embodiments, relates to a capacitor structure. The capacitor structure includes one or more lower interconnects disposed within a lower dielectric structure over a substrate. A lower electrode is arranged along sidewalls and an upper surface of the lower dielectric structure, a capacitor dielectric is arranged along sidewalls and an upper surface of the lower electrode, and an upper electrode is arranged along sidewalls and an upper surface of the capacitor dielectric. A spacer is arranged along outermost sidewalls of the upper electrode. The spacer includes a first upper surface arranged along a first side of the upper electrode and a second upper surface arranged along an opposing second side of the upper electrode. The first upper surface has a different width than the second upper surface.

Abstract: A method is provided for fabricating a semiconductor wafer having a device side, a back side opposite the device side and an outer periphery edge. Suitably, the method includes: forming a top conducting layer on the device side of the semiconductor wafer; forming a passivation layer over the top conducting layer, the passivation layer being formed so as not to extend to the outer periphery edge of the semiconductor wafer; and forming a protective layer over the passivation layer, the protective layer being spin coated over the passivation layer so as to have a smooth top surface at least in a region proximate to the outer periphery edge of the semiconductor wafer.

Abstract: According to an exemplary embodiments, the disclosure is directed to a memory circuit which includes not limited to a first half sense amplifier circuit connected to a first plurality of memory cells through a first bit line and configured to receive a unit of analog electrical signal from each of the first plurality of memory cells and to generate a first half sense amplifier output signal corresponding to the first bit line based on a first gain of the half sense amplifier and an accumulation of the units of analog signals, a locking code register circuit configured to receive a locking data and to generate a digital locking sequence, and a source selector circuit configured to receive the digital locking sequence and to generate a first adjustment signal to adjust the first half sense amplifier output signal corresponding to the first bit line by adjusting the first gain.

Abstract: A semiconductor device includes a substrate. A 2-D material channel layer is over the substrate, in which the 2-D material channel layer includes a channel region and source/drain regions on opposite sides of the channel region. Source/drain metals are over of the source/drain regions of the 2-D material channel layer. A gate metal is over the substrate and non-overlapping the 2-D material channel layer along a vertical direction, in which the gate metal is laterally separated from the 2-D material channel layer by an air gap.

Abstract: A method for performing operation mode transition control in a wireless communication system and associated apparatus are provided, where a non-access-point multi-link device (non-AP MLD) is wirelessly linking to a first access point multi-link device (AP MLD). The method includes: transmitting, by the non-AP MLD, a first operation mode notification in a first management frame to the first AP MLD, for a first target operation mode to which the non-AP MLD is going to transit, carrying at least information regarding the first target operation mode, wherein the information is carried in at least one subfield of the first operation mode notification; and transiting, by the non-AP MLD, to the first target operation mode without transmitting additional management information regarding the first target operation mode to the first AP MLD.

Abstract: A method for forming a semiconductor device structure includes forming a fin structure, and the fin structure has multiple sacrificial layers and multiple semiconductor layers laid out alternately. The method also includes forming a gate stack wrapped around the fin structure and forming a spacer layer extending along sidewalls of the fin structure and the gate stack. The method further includes partially removing the fin structure and the spacer layer to form a recess exposing side surfaces of the semiconductor layers and the sacrificial layers. A remaining portion of the spacer layer forms a gate spacer. In addition, the method includes forming an inner spacer layer along a sidewall and a bottom of the recess and partially removing the inner spacer layer using an isotropic etching process. Remaining portions of the inner spacer layers form multiple inner spacers. The method includes forming an epitaxial structure in the recess.

Abstract: A semiconductor device and a method of fabricating the semiconductor device are disclosed. The method includes forming a polysilicon structure on a substrate, depositing a first spacer layer on the polysilicon structure, depositing a second spacer layer on the first spacer layer, forming a S/D region on the substrate, removing the second spacer layer, depositing a third spacer layer on the first spacer layer and on the S/D region, depositing an ESL on the third spacer layer, depositing an ILD layer on the etch stop layer, and replacing the polysilicon structure with a gate structure surrounding the nanostructured layer.

Abstract: A variable aperture module includes a blade assembly, a positioning element, a driving part and pressing structures. The blade assembly includes movable blades disposed around an optical axis to form a light passable hole with an adjustable size. Each movable blade has a positioning hole and a movement hole adjacent thereto. The positioning element includes positioning structures disposed respectively corresponding to the positioning holes. The driving part includes a rotation element disposed corresponding to the movement holes and is rotatable with respect to the positioning element. The pressing structures are disposed respectively corresponding to the movable blades. Each pressing structure is at least disposed into at least one of the positioning hole and the movement hole of the corresponding movable blade. Each pressing structure at least presses against at least one of the corresponding one positioning structure and the rotation element.

Abstract: A light strip unplugging protection method includes: providing a light strip, wherein the light strip includes a plug including a power pin and a control pin; providing a socket corresponding to the plug, wherein the socket includes a power pin holder and at least one light strip control pin holder for electrically connecting with the power pin and the light strip control pin respectively; using a pulse-width modulation signal to drive the light strip on the light strip control pin holder to control the current passing therethrough; and when the pulse-width modulation signal is in a first state, detecting voltage or current of the light strip control pin holder; determining whether the light strip is unplugged according to the voltage or current; and when it is determined that the light strip is unplugged, power voltage on the power pin holder is turned off.

Abstract: A method includes forming a 2-D material semiconductor layer over a substrate; forming source/drain electrodes covering opposite sides of the 2-D material semiconductor layer, while leaving a portion of the 2-D material semiconductor layer exposed by the source/drain electrodes; forming a first gate dielectric layer over the portion of the 2-D material semiconductor layer by using a physical deposition process; forming a second gate dielectric layer over the first gate dielectric layer by using a chemical deposition process, in which a thickness of the first gate dielectric layer is less than a thickness of the second gate dielectric layer; and forming a gate electrode over the second gate dielectric layer.

Abstract: A liquid air assisted cooling system for cooling a component of an information handling system includes a liquid air assisted cooling module and a baseboard management controller. The baseboard management controller determines a quantity of coolant loss in the liquid air assisted cooling module.

Abstract: A device includes: a stack of nanostructures; a gate structure that wraps around the nanostructures; an isolation region between the stack of nanostructures and another stack of nanostructures adjacent thereto along a first direction; a source/drain region that abuts at least one of the nanostructures; and a spacer layer that is on sidewalls of the gate structure and on sidewalls of the source/drain region, the spacer layer covering an area between the source/drain region and a neighboring source/drain region of another transistor along the first direction.

Abstract: An electronic device is provided and includes a display panel, a light source, and a timing controller. The light source is disposed corresponding to the display panel. The timing controller is electrically connected to the display panel and the light source. The display panel refreshes a displayed content according to a first signal generated by the timing controller. The light source refreshes a brightness according to a second signal generated by the timing controller. The light source begins refreshing the brightness at a first time point. The display panel begins refreshing the displayed content at a second time point. The first time point is different from the second time point.

Abstract: A modular machine tool processing jig includes a base body having at least a positioning device and a movement adjusting device; at least a clamping positioning seat fixed on the base body through the positioning device and having at least a positioning clamping face, by which providing an efficient and accurate positioning effect; and at least a clamping adjusting seat disposed on the base body through the movement adjusting device, so as to adjust the interval between the clamping adjusting seat and the clamping positioning seat along an axial direction for different workpiece sizes. Therein, the clamping adjusting seat has at least a clamping assembly having at least a clamping face. The clamping assembly adjusts the interval between the clamping face and the positioning clamping face for clamping a to-be-processed workpiece.

Abstract: The embodiments of the disclosure provide an image quality adjusting method and a host. The method includes: providing, by a host, a visual content, wherein the visual content comprises a pass-through image; obtaining, by the host, a frame rate of the visual content and a loading of a graphic processing unit of the host; and dynamically adjusting, by the host, an image quality of the pass-through image based on the frame rate and the loading of the graphic processing unit of the host.

Abstract: An optical device package is provided. The optical device package includes a sensor and a light-transmitting region. The sensor includes a sensing region. The light-transmitting region is at least partially in the sensor, and the light-transmitting region allows an external light to transmit therethrough and reach the sensing region. A width of the light-transmitting region adjacent to a level of the sensing region is equal to or smaller than a width of the sensing region.

Abstract: The present invention discloses a shell of an electronic device and an electronic device. The shell includes a shell body, a matching member, and a fixing member. The shell body is provided with a concave groove and a first through hole communicated with the concave groove. The matching member is arranged on the shell body and provided with a second through hole corresponding to the first through hole. The fixing member penetrates through the second through hole and the first through hole to fix the matching member to the shell body, and the fixing member passes through the concave groove and forms a lanyard hole with a side wall of the concave groove.

Abstract: An optical device includes an optical component and an electrical component. The optical component has a sensing surface and a backside surface opposite to the sensing surface. The electrical component is disposed adjacent to the backside surface of the optical component and configured to support the optical component. A portion of the backside surface of the optical component is exposed from the electrical component.

Abstract: A liquid-tight structure includes a stepped fastener having a first shank and a second shank. The stepped fastener is threadingly engaged with an opening that includes a first step and a second step. A first diameter of the first shank is larger than a second diameter of the second shank. The liquid-tight structure includes a first seal seated on and in physical communication with a first top surface of the first step of the opening. The first seal is compressed between a first side of the opening and the first shank. The liquid-tight structure includes a second seal seated on and in physical communication with a second top surface of the second step of the opening. The second seal is compressed between a second side of the opening and the second shank.