Abstract: A semiconductor structures and a method for forming the same are provided. The semiconductor structure includes first nanostructures and second nanostructures spaced apart from the first nanostructures in a first direction. A left-most point of the first nanostructures and a left-most point of the second nanostructures has a first distance in the first direction. The semiconductor structure further includes first source/drain features attached to opposite sides of the first nanostructures in a second direction being orthogonal to the first direction and third nanostructures and fourth nanostructures spaced apart from the third nanostructures in the first direction. A left-most point of the third nanostructures and a left-most point of the fourth nanostructures has a second distance in the first direction. In addition, the third nanostructures are wider than the first nanostructures in the first direction, and the first distance is smaller than the second distance.

Abstract: A three-dimensional source contact structure and fabrication process method thereof are provided. A lithography process and shallow trench process are sequentially performed to form a metal contact window in a power device. A source heavily doped area is divided by the metal contact window into a first and second heavily doped region. A lateral etching process is applied to an inter-layer dielectric to form a first and a second dielectric layer, each of which is in a trapezoid shape. Meanwhile, a first and a second metal-source surface contact regions are exposed. A longitudinal surface exposed by the shallow trench process is beneficial to increase vertical contact when depositing a source contact metal, thereby a step-like three-dimensional source contact structure can be formed. The present invention achieves in reducing cell pitch effectively and can be widely applied to various power devices having MOSFET structure thereof.

Abstract: The present invention relates to extended recombinant polypeptide (XTEN) compositions, conjugate compositions comprising XTEN and XTEN linked to cross-linkers useful for conjugation to pharmacologically active payloads, methods of making highly purified XTEN, methods of making XTEN-linker and XTEN-payload conjugates, and methods of using the XTEN-cross-linker and XTEN-payload compositions.

Abstract: A radar signal processing system with a self-interference cancelling function includes an analog front end (AFE) processor, an analog to digital converter (ADC), an adaptive interference canceller (AIC), and a digital to analog converter (DAC). The AFE processor receives an original input signal and generates an analog input signal. The ADC converts the analog input signal to a digital input signal. The AIC generates a digital interference signal digital interference signal by performing an adaptive interference cancellation process according to the digital input signal. The DAC converts the digital interference signal to an analog interference signal. Finally, the analog interference signal is fed back to the AFE and cancelled from the original input signal in the AFE processor while performing the front end process, reducing the interference of the static interference from the leaking of a close-by transmitter during the front end process.

Abstract: An anti-surge resistor and a fabrication method thereof are provided. The current anti-surge resistor includes a substrate made by a varistor material, a resistance layer disposed on the substrate, a first terminal electrode, and a second terminal electrode. In the fabrication method of the current anti-surge resistor, at first, the substrate made by the varistor material is provided. Then, the resistance layer is formed on the substrate to provide a main body, in which the main body includes the substrate and the resistance layer, and has two opposite terminals. Thereafter, the first terminal electrode is formed on one terminal of the main body, and the second terminal electrode is formed on the other terminal of the main body.

Abstract: A method of a circuit signal enhancement of a circuit board comprises the following steps: forming a first substrate body with a first signal transmission circuit layer and a second substrate body with a second signal transmission circuit layer; forming a first signal enhancement circuit layer and a second signal enhancement circuit layer on the first substrate body and the second substrate body; forming a third substrate body with a third signal transmission circuit layer and a fourth substrate body with a fourth signal transmission circuit layer on the carrier; separating the third substrate body and the fourth substrate body from the carrier; combining the first signal transmission circuit layer and the third signal transmission circuit layer through the first signal enhancement circuit layer; and combining the second signal transmission circuit layer and the fourth signal transmission circuit layer through the second signal enhancement circuit layer.

Abstract: A semiconductor device includes a substrate and a semiconductor structure over the substrate. The semiconductor device also includes a first dielectric structure over the substrate, and the first dielectric structure has a first height. The semiconductor device further includes a second dielectric structure over the substrate, and the second dielectric structure has a second height. The second height is smaller than the first height. In addition, the semiconductor device includes a first gate stack wrapped around the first dielectric structure, and the semiconductor structure and the second dielectric structure are spaced apart from the first gate stack. The semiconductor device includes a second gate stack wrapped around the second dielectric structure and the semiconductor structure, and the second gate stack is electrically isolated from the first gate stack.

Abstract: A pharmaceutical composition containing a mixed polymeric micelle and a drug enclosed in the micelle, in which the mixed polymeric micelle, 1 to 1000 nm in size, includes an amphiphilic block copolymer and a lipopolymer. Also disclosed are preparation of the pharmaceutical composition and use thereof for treating cancer.

Abstract: Embodiments of the present application provide a case for a battery, a battery, a power consumption device, and a method and device for producing a battery. The case includes: a thermal management component configured to adjust temperature of a battery cell accommodated in the case; a first wall provided with a through hole, the through hole being configured to communicate a gas inside and outside the case; and a condensing component attached to the thermal management component, the condensing component being configured to shield the through hole so as to condense a gas flowing into the inside of the case through the through hole. According to the technical solutions of the embodiments of the present application, the safety of the battery can be enhanced.

Abstract: A semiconductor device according to embodiments of the present disclosure includes a first die including a first bonding layer and a second die including a second hybrid bonding layer. The first bonding layer includes a first dielectric layer and a first metal coil embedded in the first dielectric layer. The second bonding layer includes a second dielectric layer and a second metal coil embedded in the second dielectric layer. The second hybrid bonding layer is bonded to the first hybrid bonding layer such that the first dielectric layer is bonded to the second dielectric layer and the first metal coil is bonded to the second metal coil.

Abstract: Techniques for generating a schema transformation for application data to monitor and manage the application in a runtime environment are disclosed. A system runs an application plugin in a runtime environment to identify data generated by application modules in one or both of an application build process and an application execution process. The application plugin is a software program executed together with the application build process. The application plugin identifies a source schema associated with application data. The application plugin identifies a target schema associated with an analysis program or machine learning model. The application plugin generates a schema transformation to convert application runtime data into a target data set. The system applies the target data set to an analysis program, such as a machine learning model, to generate output analysis data associated with the application.

Abstract: A semiconductor structure, comprising a redistribution layer (RDL) including a dielectric layer and a conductive trace within the dielectric layer; a first conductive member disposed over the RDL and electrically connected with the conductive trace; a second conductive member disposed over the RDL and electrically connected with the conductive trace; a first die disposed over the RDL; a second die disposed over the first die, the first conductive member and the second conductive member; and a connector disposed between the second die and the second conductive member to electrically connect the second die with the conductive trace, wherein the first conductive member is electrically isolated from the second die.

Abstract: Embodiments of this application relate to the field of terminal technologies, and provides a millimeter wave module circuit and a terminal device. The first antenna array includes N first antennas, and the second antenna array includes M second antennas, where N is greater than M. The processing module includes a plurality of first processing units. Each of N first antennas is connected to each first processing unit. Each of M second antennas is separately connected to two different first processing units. The first processing unit includes a power amplifier. The processing module is configured to send, through differential feeding, a second signal to the second antenna by using two different first processing units. This can enable a signal coverage of the second antenna array to be increased, improving performance of a millimeter wave module in a coverage region of the second antenna array.

Abstract: Examples of an integrated circuit with gate cut features and a method for forming the integrated circuit are provided herein. In some examples, a workpiece is received that includes a substrate and a plurality of fins extending from the substrate. A first layer is formed on a side surface of each of the plurality of fins such that a trench bounded by the first layer extends between the plurality of fins. A cut feature is formed in the trench. A first gate structure is formed on a first fin of the plurality of fins, and a second gate structure is formed on a second fin of the plurality of fins such that the cut feature is disposed between the first gate structure and the second gate structure.

Abstract: A riding mowing device includes a frame; a cutting assembly; a traveling assembly configured to drive the riding mowing device to travel and including a first traveling assembly located on the front part of the riding mowing device and a second traveling assembly located on the rear part of the riding mowing device, where the first traveling assembly and the second traveling assembly are separately mounted on the frame; and a power supply assembly configured to supply power to at least the cutting assembly and the traveling assembly and mounted to the frame. The riding mowing device further includes one of a steering wheel assembly and an operating lever assembly, and one of the steering wheel assembly and the operating lever assembly is selectively mounted on the frame.

Abstract: A semiconductor structure includes a substrate that includes a base, a plurality of channel layers on the base, and an isolation layer between each of the channel layers. The semiconductor structure also includes a gate on the substrate, spanning a top and a portion of sidewalls of the channel layers. The semiconductor structure also includes a sidewall structure on sidewalls at two sides of the gate, a source/drain region in the substrate at two sides of the gate and the sidewall structure, a source/drain electrical connection layer on the source/drain region, and an isolation structure between the source/drain electrical connection layer and the gate. The isolation structure includes a cavity, including a first cavity region and a second cavity region located on the first cavity region. A width of the second cavity region is smaller than a width of the first cavity region.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first channel structure and a second channel structure over a substrate. The semiconductor device structure also includes a first gate stack over the first channel structure, and the first gate stack has a first width. The semiconductor device structure further includes a second gate stack over the second channel structure. The second gate stack has a protruding portion extending away from the second channel structures. The protruding portion of the second gate stack has a second width, and half of the first width is greater than the second width.

Abstract: The present invention relates to a hydrogen storage alloy, an electrode for a Ni-MH battery, a secondary battery, and a method for preparing the hydrogen storage alloy. The chemical composition of the hydrogen storage alloy is expressed by the general formula La(3.0˜3.2)xCexZrySm(1-(4.11˜4.2)x-y)NizCouMnvAlw, where x, y, z, u, v, w are molar ratios, and 0.14?x?0.17, 0.02?y?0.03, 4.60?z+u+v+w?5.33, 0.10?u?0.20, 0.25?v?0.30, and 0.30?w?0.40. The atomic ratio of the metal lanthanum (La) to the metal cerium (Ce) is fixed at 3.0 to 3.2, which satisfies the requirements of the overcharge performance of the electrode material. A side elements are largely substituted by samarium (Sm) element, that is, the atomic ratio of Sm on the A side is 25.6% to 42%, so as to solve the problem of shortened cycle life caused by the small amount of cobalt (Co) atoms.

Abstract: A semiconductor device and methods of forming the same are disclosed. The semiconductor device includes a substrate, first and second source/drain (S/D) regions, a channel between the first and second S/D regions, a gate engaging the channel, and a contact feature connecting to the first S/D region. The contact feature includes first and second contact layers. The first contact layer has a conformal cross-sectional profile and is in contact with the first S/D region on at least two sides thereof. In embodiments, the first contact layer is in direct contact with three or four sides of the first S/D region so as to increase the contact area. The first contact layer includes one of a semiconductor-metal alloy, an III-V semiconductor, and germanium.

Abstract: A smart acoustic information recognition-based welded weld impact quality determination method and system, comprising: controlling a tip of an ultrasonic impact gun (1) to perform impact treatment on a welded weld with different treatment pressures, treatment speeds, treatment angles and impact frequencies, obtaining acoustic signals during the impact treatment, calculating feature values of the acoustic signals, and constructing an acoustic signal sample set including various stress conditions; marking the acoustic signal sample set according to impact treatment quality assessment results for the welded weld; establishing a multi-weight neural network model, and using the marked acoustic signal sample set to train the multi-weight neural network model; obtaining feature values of welded weld impact treatment acoustic signals to be determined, inputting the feature values into the trained multi-weight neural network model, and outputting determination results for welded weld impact treatment quality to be det