Patents by Inventor Cheng Yang

Cheng Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190288084
    Abstract: Semiconductor device structures comprising a gate structure having different profiles at different portions of the gate structure are provided. In some examples, a semiconductor device includes a fin structure on a substrate, a source/drain structure on the fin structure, and a gate structure over the fin structure and along a sidewall of the fin. The source/drain structure is proximate the gate structure. The gate structure has a top portion having a first sidewall profile and a bottom portion having a second sidewall profile different from the first sidewall profile.
    Type: Application
    Filed: March 14, 2018
    Publication date: September 19, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ricky WANG, Chao-Cheng CHEN, Jr-Jung LIN, Chi-Wei YANG
  • Publication number: 20190287444
    Abstract: A display panel including a pixel array, a plurality of first shift registers, a plurality of second shift registers, a plurality of first discharge circuits, and a plurality of second discharge circuits is provided. The pixel array includes a plurality of gate lines. The shift registers provide a plurality of gate signals to the gate lines. Each of the first discharge circuits receives a third gate signal to discharge a same first gate line together with the corresponding first shift register. A rising edge of the third gate signal substantially matches a falling edge of the corresponding first gate signal. Each of the second discharge circuits receives a fourth gate signal to discharge a same second gate line together with the corresponding second shift register. A rising edge of the fourth gate signal substantially matches a falling edge of the corresponding second gate signal.
    Type: Application
    Filed: August 5, 2018
    Publication date: September 19, 2019
    Applicant: Au Optronics Corporation
    Inventors: Chun-Da Tu, Ming-Hsien Lee, Yi-Cheng Lin, Kai-Wei Hong, Chuang-Cheng Yang, Chun-Feng Lin
  • Publication number: 20190288068
    Abstract: The present disclosure relates generally to doping for conductive features in a semiconductor device. In an example, a structure includes an active region of a transistor. The active region includes a source/drain region, and the source/drain region is defined at least in part by a first dopant having a first dopant concentration. The source/drain region further includes a second dopant with a concentration profile having a consistent concentration from a surface of the source/drain region into a depth of the source/drain region. The consistent concentration is greater than the first dopant concentration. The structure further includes a conductive feature contacting the source/drain region at the surface of the source/drain region.
    Type: Application
    Filed: June 6, 2019
    Publication date: September 19, 2019
    Inventors: Su-Hao Liu, Huicheng Chang, Chia-Cheng Chen, Liang-Yin Chen, Kuo-Ju Chen, Chun-Hung Wu, Chang-Maio Liu, Huai-Tei Yang, Lun-Kuang Tan, Wei-Ming You
  • Publication number: 20190285627
    Abstract: The present invention relates to a method and kit for detecting bacteria in a sample. Substrate having a surface comprising an interdigitated Au electrode array and a plurality of siderophores specific to the bacteria and covalently attached to the surface. In one embodiment, the siderophore may contain a free OH (alcohol), amine, or carboxylic acid to which linker may be attached via ester (on the OH), amide (on the amine) or reverse the ester or amide using the siderophore carboxyl. The linker chain can then be short or long with and without heteroatom substitution to improve solubility as needed. The linker can terminate with a thiol which will react with a gold surface. Alternatively, the linker can terminate with another alcohol, amine or acid which can then be attached to corresponding functionality on the surface of choice.
    Type: Application
    Filed: October 18, 2018
    Publication date: September 19, 2019
    Applicant: UNIVERSITY OF NOTRE DAME DU LAC
    Inventors: Marvin J. Miller, Cheng Ji, Paul Bohn, Sean Branagan, Yang Yang
  • Patent number: 10418002
    Abstract: Aspects of the disclosure provide a method for merging compressed access units according to compression rates and/or positions of the respective compressed access units. The method can include receiving a sequence of compressed access units corresponding to a sequence of raw access units partitioned from an image or a video frame and corresponding to a sequence of memory spaces in a frame buffer, determining a merged access unit including at least two consecutive compressed access units based on compression rates and/or positions of the sequence of compressed access units. The merged access unit is to be stored in the frame buffer with a reduced gap between the at least two consecutive compressed access units compared with storing the at least two consecutive compressed access units in corresponding memory spaces in the sequence of memory spaces.
    Type: Grant
    Filed: October 17, 2017
    Date of Patent: September 17, 2019
    Assignee: MEDIATEK INC.
    Inventors: Ping Chao, Ting-An Lin, Tung-Hsing Wu, Kung-Tsun Yang, Wan-Yu Chen, Chuang-Chi Chiou, Ping-yao Wang, Wei-Gen Wu, Hsin-Hao Chung, Chih-Ming Wang, Han-Liang Chou, Chung Hsien Lee, Yung-Chang Chang, Chi-Cheng Ju
  • Patent number: 10417994
    Abstract: An RGB format adjustment method includes: obtaining subpixel values having interleaved positions from four pixels in unadjusted RGB format; obtaining subpixel values of a first pixel in an adjusted RGB format according to the obtained subpixel values, wherein the R subpixel value of the adjusted first pixel is equal to an R subpixel value of the unadjusted first pixel, the G subpixel value of the adjusted first pixel is equal to an R subpixel value of a fourth pixel in the unadjusted RGB format, and the B subpixel value of the adjusted first pixel is equal to a B subpixel value of the unadjusted first pixel; and obtaining R subpixel values, G subpixel values and B subpixel values of a second pixel, a third pixel and the fourth pixel according to the obtained subpixel values and the obtained R, G and B subpixel values of the adjusted first pixel.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: September 17, 2019
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Jar-Ferr Yang, Kuan-Cheng Chen
  • Publication number: 20190281116
    Abstract: A data transmission method, apparatus, and system the method including obtaining, in response to target data being received, and by a network device in a data transmission system comprising a user equipment, a server, and the network device, target context information from the server, where the server stores the target context information of the user equipment, and where the target data is associated with the user equipment, forwarding, by the network device, the target data according to the target context information, and deleting the target context information.
    Type: Application
    Filed: May 28, 2019
    Publication date: September 12, 2019
    Inventors: Fei Yang, Rui Meng, Cheng Chen
  • Publication number: 20190279928
    Abstract: A semiconductor structure is provided and includes a base substrate including a device region and a peripheral region surrounding the device region, the base substrate including a base interconnection structure formed in each of the device region and the peripheral region; a medium layer on the base substrate; a first interconnection structure through the medium layer and on the base interconnection structure in the device region; and a second interconnection structure through the medium layer and on the base interconnection structure in the peripheral region. The first interconnection structure includes: a first portion over the base interconnection structure, and a second portion partially on the first portion and partially on a portion of the medium layer.
    Type: Application
    Filed: May 24, 2019
    Publication date: September 12, 2019
    Inventors: Cheng Long ZHANG, Qi Yang HE, Yan WANG
  • Publication number: 20190273083
    Abstract: The present invention provides a dynamic random access memory structure, comprising a substrate defining a cell region and a peripheral region on the substrate, a shallow trench isolation structure located in the peripheral region adjacent to the cell region, wherein the shallow trench isolation structure has a concave top surface, a first dummy bit line gate located within the shallow trench isolation structure of the peripheral area, and a second dummy bit line gate located in the cell region and adjacent to the first dummy bit line gate, wherein a top surface of the first dummy bit line gate is lower than a top surface of the second dummy bit line gate.
    Type: Application
    Filed: March 26, 2018
    Publication date: September 5, 2019
    Inventors: En-Chiuan Liou, Yu-Cheng Tung, Chih-Wei Yang, Sho-Shen Lee
  • Publication number: 20190271659
    Abstract: An electrochemical device for identifying electroactive analytes. The device includes a substrate; a sample region; a counter electrode; a reference electrode; a working electrode disposed in communication with the substrate, and the working electrode may be an electron conducting fiber. Further, the counter electrode, reference electrode, and working electrode are partially disposed in the sample region configured to be exposed to the electroactive analyte. Further yet, a counter electrode channel, reference electrode channel, and working electrode channel are disposed in the substrate configured to: accommodate each of the counter electrode, reference electrode, and working electrode, respectively, for placement in the respective channels.
    Type: Application
    Filed: November 10, 2017
    Publication date: September 5, 2019
    Applicant: University of Virginia Patent Foundation
    Inventors: Cheng Yang, B. Jill Venton
  • Publication number: 20190270116
    Abstract: A phosphor device of an illumination system emitting a first waveband light includes a substrate and a phosphor layer formed on the substrate. The phosphor layer includes a first phosphor agent and a second phosphor agent. The first waveband light is converted into a first color light by the first phosphor agent. The second phosphor agent is distributed over the first phosphor agent and mixed with the first phosphor agent, and the first waveband light is converted into a second color light by the second phosphor agent. The first color light and the second color light are integrated into the second waveband light. The difference between the first wavelength peak of the first color light and the second wavelength peak of the second color light is 50 to 100 nanometers. Therefore, the advantages of increasing the purity, the luminance and the luminous intensity of specific color light are achieved.
    Type: Application
    Filed: April 22, 2019
    Publication date: September 5, 2019
    Inventors: Keh-Su Chang, Jih-Chi Li, Li-Cheng Yang
  • Patent number: 10400015
    Abstract: HIV-1 Env ectodomain trimers stabilized in a prefusion mature closed conformation and methods of their use and production are disclosed. In several embodiments, the HIV-1 Env ectodomain trimers and/or nucleic acid molecules can be used to generate an immune response to HIV-1 in a subject. In additional embodiments, the therapeutically effective amount of the HIV-1 Env ectodomain trimers can be administered to a subject in a method of treating or preventing HIV-1 infection.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: September 3, 2019
    Assignee: The United States of America, as represented by the Secretary, Department of Health and Human Services
    Inventors: Peter Kwong, Marie Pancera, Tongqing Zhou, Ivelin Georgiev, Michael Gordon Joyce, Priyamvada Acharya, Jason Gorman, Yongping Yang, Aliaksandr Druz, Guillaume Stewart-Jones, Rita Chen, Gwo-Yu Chuang, Ulrich Baxa, John Mascola, Rebecca Lynch, Baoshan Zhang, Cheng Cheng
  • Publication number: 20190267373
    Abstract: A manufacturing method of a semiconductor device includes the following steps. A semiconductor substrate including at least one fin structure is provided. A gate material layer is formed on the semiconductor substrate, and the fin structure is covered by the gate material layer. A trench is formed partly in the gate material layer and partly in the fin structure. An isolation structure is formed partly in the trench and partly outside the trench. At least one gate structure is formed straddling the fin structure by patterning the gate material layer after the step of forming the isolation structure. A top surface of the isolation structure is higher than a top surface of the gate structure in a vertical direction for enhancing the isolation performance of the isolation structure. A sidewall spacer is formed on sidewalls of the isolation structure, and there is no gate structure formed on the isolation structure.
    Type: Application
    Filed: May 9, 2019
    Publication date: August 29, 2019
    Inventors: En-Chiuan Liou, Yu-Cheng Tung, Chih-Wei Yang
  • Publication number: 20190262527
    Abstract: Dialysis is enhanced by using nanoclay sorbents to better absorb body wastes in a flow-through system. The nanoclay sorbents, using montmorillonite, bentonite, and other clays, absorb significantly more ammonium, phosphate, and creatinine, and the like, than conventional sorbents. The montmorillonite, the bentonite, and the other clays may be used in wearable systems, in which a dialysis fluid is circulated through a filter with the nanoclay sorbents. Waste products are absorbed by the montmorillonite, the bentonite, and the other clays and the dialysis fluid is recycled to a patient's peritoneum. Using an ion-exchange capability of the montmorillonite, the bentonite, and the other clays, waste ions in the dialysis fluid are replaced with desirable ions, such as calcium, magnesium, and bicarbonate. The nanoclay sorbents are also useful for refreshing a dialysis fluid used in hemodialysis and thus reducing a quantity of the dialysis fluid needed for the hemodialysis.
    Type: Application
    Filed: May 15, 2019
    Publication date: August 29, 2019
    Inventors: Rosa H. Yeh, Wei Xie, Hsinjin E. Yang, Michael T.K. Ling, Ying-Cheng Lo
  • Publication number: 20190268893
    Abstract: A method of default uplink beam determination after a beam failure recovery (BFR) procedure in a beamforming system is proposed. For uplink (UL) transmission, the BS provides physical uplink control channel (PUCCH) resource configuration to UE. The configuration includes spatial relation information that indicates the spatial filter to be used by UE for the corresponding PUCCCH transmission. After BFR procedure is completed and before the first spatial relation information indication for a PUCCH resource is received by UE, a default UE TX beam for the PUCCH resource can be determined based on the UE TX beam used during the BFR procedure, e.g., the UE TX beam used to transmit a beam failure recovery request (BFRQ) during the BFR procedure.
    Type: Application
    Filed: February 22, 2019
    Publication date: August 29, 2019
    Inventors: Cheng-Rung Tsai, Ming-Po Chang, Chia-Hao Yu, Weidong Yang, Jiann-Ching Guey
  • Publication number: 20190268961
    Abstract: A method of default uplink beam determination after radio resource control (RRC) connection reestablishment in a beamforming system is proposed. For uplink (UL) transmission, the BS provides dedicated physical uplink control channel (PUCCH) resource configuration to UE. The configuration includes spatial relation information that indicates the spatial domain transmission filter to be used by UE for the corresponding PUCCH transmission. After RRC connection re-establishment and before a dedicated PUCCH configuration is received, a default UE TX beam can be determined based on the UE TX beam used during the RRC connection re-establishment procedure, e.g., the UE TX beam used to transmit MSG3 in a four-step random-access channel (RACH) procedure triggered by the RRC connection re-establishment procedure.
    Type: Application
    Filed: February 22, 2019
    Publication date: August 29, 2019
    Inventors: Cheng-Rung Tsai, Ming-Po Chang, Chia-Hao Yu, Weidong Yang, Jiann-Ching Guey
  • Patent number: 10396191
    Abstract: A semiconductor device, including: a channel layer formed on a substrate; a top barrier layer formed on the channel layer, wherein a first heterojunction is formed between the channel layer and the top barrier layer so that a first two-dimensional electron gas is generated in the channel layer; a buffer structure formed between the substrate and the channel layer; a back barrier layer formed between the buffer structure and the channel layer, wherein a second heterojunction is formed between the buffer structure and the back barrier layer so that a second two-dimensional electron gas is generated in the buffer structure; and a source electrode, a drain electrode, and a gate electrode formed on the top barrier layer, respectively; wherein a sheet carrier density of the second two-dimensional electron gas is less than 8E+10 cm?2.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: August 27, 2019
    Assignee: Epistar Corporation
    Inventors: Ya-Yu Yang, Chia-Cheng Lui, Shang-Ju Tu
  • Patent number: 10396196
    Abstract: A semiconductor device includes a substrate, a semiconductor layer, a doped region, a device region, a first isolation structure, a second isolation structure and a terminal. The semiconductor layer is disposed over the substrate. The doped region is disposed in the semiconductor layer. The device region is disposed on the doped region and includes a source, a drain and a gate. The first isolation structure is disposed in the semiconductor layer and surrounds the doped region. The second isolation structure surrounds the first isolation structure and is spaced apart from the first isolation structure. The terminal is disposed between the first isolation structure and the second isolation structure, and is equipotential with the source.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: August 27, 2019
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Jui-Chun Chang, Shih-Kai Wu, Cheng-Yu Wang, Li-Yang Hong, Chia-Ming Hsu
  • Patent number: 10395997
    Abstract: The present disclosure relates to a semiconductor process, which includes: (a) providing a semiconductor element; (b) attaching the semiconductor element to a carrier by an adhesive layer, so that the adhesive layer is sandwiched between the semiconductor element and the carrier; and (c) cutting the semiconductor element to form a plurality of semiconductor units. Thereby, the gaps between the semiconductor units are fixed after the cutting process, so as to facilitate testing the semiconductor units.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: August 27, 2019
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yu-Cheng Tsao, Cheng-Hung Wang, Chun-Chieh Lin, Hsiu-Hsiung Yang, Yu-Pin Tsai
  • Patent number: 10396171
    Abstract: The present invention provides a method for forming a semiconductor structure, including the following steps: first, a substrate is provided, an interlayer dielectric (ILD) is formed on the substrate, a first dummy gate is formed in the ILD, wherein the first dummy gate includes a dummy gate electrode and two spacers disposed on two sides of the dummy gate electrode respectively. Next, two contact holes are formed in the ILD at two sides of the first dummy gate respectively. Afterwards, the dummy gate electrode is removed, so as to form a gate recess in the ILD, a first material layer is filled in the gate recess and a second material layer is filled in the two contact holes respectively, and an anneal process is performed on the first material layer and the second material layer, to bend the two spacers into two inward curving spacers.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: August 27, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: En-Chiuan Liou, Yu-Cheng Tung, Rung-Yuan Lee, Chih-Wei Yang