Abstract: The embodiments of the present disclosure provide a video display method and apparatus, an electronic device and a storage medium. The method comprising: in response to a first media item comprising a first preset object being played, determining whether a second preset object associated with the first media item meets a preset condition; in response to the second preset object associated with the first media item meeting the preset condition, displaying a preset identifier on a playing screen of the first media item; and in response to a triggering acting on the preset identifier, displaying at least one second media item, wherein the at least one second media item is at least one media item associated with the first preset object, which is determined based on associated information of the first media item.

Abstract: A semiconductor structure and method of forming the same are provided. The semiconductor structure includes a circuit structure, an interlayer structure and a memory structure. The circuit structure includes a substrate having semiconductor devices formed thereon; a dielectric structure disposed over the semiconductor devices; and an interconnect layer embedded in the dielectric structure and connected to the semiconductor devices. The interlayer structure is disposed over the circuit structure. The memory structure is disposed over the interlayer structure and physically separated from the circuit structure by the interlayer structure.

Abstract: A film thickness measurement device includes a spectroscopic ellipsometer, and the spectroscopic ellipsometer includes a projection module and a light receiving module. The projection module is configured to project a multi-wavelength polarized light onto a thin film. The projection module includes a light source and a polarization state generator. The light receiving module includes a polarization analyzer and an optical detector. The polarization analyzer is configured to screen out a multi-wavelength polarized reflection light according to reflection of the multi-wavelength polarized light by the thin film. The optical detector is configured to receive the multi-wavelength polarized reflection light. The optical detector includes at least one optical splitting unit, at least two optical filtering units and at least two optical detection units.

Abstract: A transistor includes an insulating layer, a source region, a drain region, a channel layer, a ferroelectric layer, and a gate electrode. The source region and the drain region are respectively disposed on and in physical contact with two opposite sidewalls of the insulating layer. A thickness of the source region, a thickness of the drain region, and a thickness of the insulating layer are substantially the same. The channel layer is disposed on the insulating layer, the source region, and the drain region. The ferroelectric layer is disposed over the channel layer. The gate electrode is disposed on the ferroelectric layer.

Abstract: A transistor including a channel layer including an oxide semiconductor material and methods of making the same. The transistor includes a channel layer having a first oxide semiconductor layer having a first oxygen concentration, a second oxide semiconductor layer having a second oxygen concentration and a third oxide semiconductor layer having a third oxygen concentration. The second oxide semiconductor layer is located between the first semiconductor oxide layer and the third oxide semiconductor layer. The second oxygen concentration is lower than the first oxygen concentration and the third oxygen concentration.

Abstract: A sequence time window amplitude-phase-frequency characteristics analysis method and system for underwater vehicle power frequency electromagnetic field disturbance are provided. The method includes: establishing a power grid dipole group model, emulating and calculating to obtain background field intensity data of a test location, and constructing an emulated background field database; acquiring measured background field data, comparing the emulated data with the measured data, and providing a relative error; calculating a background field intensity and underwater vehicle target disturbance under the action of the above dipole group, and establishing a measured target signal database; and performing actual measurement according to an underwater vehicle motion and detection topology, performing a Fourier transform and Fourier sliding window decomposition after acquiring original data, and acquiring an amplitude spectrum and a spectrogram of an underwater vehicle target disturbance signal.

Abstract: A memory device including a word line, a source line, a bit line, a memory layer, a channel material layer is described. The word line extends in a first direction, and liner layers disposed on a sidewall of the word line. The memory layer is disposed on the sidewall of the word line between the liner layers and extends along sidewalls of the liner layers in the first direction. The liner layers are spaced apart by the memory layer, and the liner layers are sandwiched between the memory layer and the word line. The channel material layer is disposed on a sidewall of the memory layer. A dielectric layer is disposed on a sidewall of the channel material layer. The source line and the bit line are disposed at opposite sides of the dielectric layer and disposed on the sidewall of the channel material layer. The source line and the bit line extend in a second direction perpendicular to the first direction. A material of the liner layers has a dielectric constant lower than that of a material of the memory layer.

Abstract: A urine collecting and analyzing apparatus for a toilet. the apparatus including a housing with a seat riser that mounts to the toilet rim and a measurement chamber that extends downwardly into the bowl. a urine collecting basin. a flushing system to clean the apparatus. and a controller for data processing and transmission. The basin has a bowl shape to collect urine for testing and is composed of two side panels or two side panels and a front panel. The panels are moved between a storage position along the housing and a collecting position forming the basin by a motorized mechanism. A transfer tube with a flow rate sensor and pump connects the basin to the measurement chamber. The flushing system feeds water through a flushing tube into the basin through an array of nozzles and cleans the entire surface of the basin.

Abstract: An electronic device is provided. The electronic device includes a panel, a protective substrate, and a first light-shielding structure. The panel has an active area and a peripheral area. The peripheral area is adjacent to the active area. The protective substrate is disposed opposite to the panel. The first light-shielding structure is disposed on a surface of the protective substrate and corresponds to the peripheral area. A portion of the first light-shielding structure that overlaps the peripheral area has at least one opening.

Abstract: Use of insect prevention is provided in some embodiments of the present disclosure, including: providing an insect prevention item, in which a plurality of repeating patterns and a plurality of spacer patterns are represented on a surface of the insect prevention item, each of the plurality of repeating patterns is spaced apart by each of the plurality of spacer pattern, and a viewing angle of one of the plurality of repeating patterns and a spacer pattern neighboring to one of plurality of the repeating patterns represents on a plurality of ommatidias of the flying insect is less than twice of an inter-ommatidial angle of each of the plurality of ommatidias of the flying insect; and disposing the insect prevention item on an outer site of a target item.

Abstract: A method for preparing a polyester modified material from a recycled release film includes continuously performing the following steps at an elevated temperature: subjecting the recycled release film to a first melting treatment to form a low-viscosity polyester; subjecting the low-viscosity polyester to a polymerization treatment to form a high-viscosity polyester, wherein a viscosity of the high-viscosity polyester is greater than a viscosity of the low-viscosity polyester; and adding a modifier to the high-viscosity polyester to perform a second melting treatment to form the polyester modified material.

Abstract: An electrochemical device for identifying electroactive analytes. The device includes a substrate; a sample region; a counter electrode; a reference electrode; a working electrode disposed in communication with the substrate, and the working electrode may be an electron conducting fiber. Further, the counter electrode, reference electrode, and working electrode are partially disposed in the sample region configured to be exposed to the electroactive analyte. Further yet, a counter electrode channel, reference electrode channel, and working electrode channel are disposed in the substrate configured to: accommodate each of the counter electrode, reference electrode, and working electrode, respectively, for placement in the respective channels.

Abstract: A method includes forming a semiconductor fin protruding higher than top surfaces of isolation regions. A top portion of the semiconductor fin is formed of a first semiconductor material. A semiconductor cap layer is formed on a top surface and sidewalls of the semiconductor fin. The semiconductor cap layer is formed of a second semiconductor material different from the first semiconductor material. The method further includes forming a gate stack on the semiconductor cap layer, forming a gate spacer on a sidewall of the gate stack, etching a portion of the semiconductor fin on a side of the gate stack to form a first recess extending into the semiconductor fin, recessing the semiconductor cap layer to form a second recess directly underlying a portion of the gate spacer, and performing an epitaxy to grow an epitaxy region extending into both the first recess and the second recess.

Abstract: A semiconductor device and methods of forming the semiconductor device are described herein and are directed towards forming a source/drain contact plug for adjacent finFETs. The source/drain regions of the adjacent finFETs are embedded in an interlayer dielectric and are separated by an isolation region of a cut-metal gate (CMG) structure isolating gate electrodes of the adjacent finFETs The methods include recessing the isolation region, forming a contact plug opening through the interlayer dielectric to expose portions of a contact etch stop layer disposed over the source/drain regions through the contact plug opening, the contact etch stop layer being a different material from the material of the isolation region. Once exposed, the portions of the CESL are removed and a conductive material is formed in the contact plug opening and in contact with the source/drain regions of the adjacent finFETs and in contact with the isolation region.

Abstract: A memory device includes a first etch stop layer, an etch stop pattern, a second etch stop layer, a plurality of stacks and a first conductive pillar. The etch stop pattern is disposed in the first etch stop layer. The second etch stop layer is disposed on the first etch stop layer and the etch stop pattern, wherein a material of the etch stop pattern is different from a material of the first etch stop layer and a material of the second etch stop layer. The stacks are disposed on the second etch stop layer. The first conductive pillar is disposed between the stacks, wherein the first conductive pillar extends along the stacks and the second etch stop layer to be in physical contact with the etch stop pattern.

Abstract: A package structure and a method for forming the same are disclosed. In the method for forming the package structure, a first bonding layer and a plurality of protruded metal pillars are formed on an upper surface of a carrier plate; a first chip including a first functional face and a first back face that are opposite to each other is provided, where a plurality of first external connection terminals are arranged on the first functional face, and a second bonding layer is arranged on the first back face; the second bonding layer is bonded to the first bonding layer; a first molding layer configured to mold the first chip and the metal pillars is provided; a second chip including a second functional face and a second back face that are opposite to each other is provided, and the second chip is flip-mounted on the first molding layer.

Abstract: The present application discloses a display panel and a display device. The display panel includes substrate, a plurality of pixel driving circuits, and a light-shielding layer. By disposing the light-shielding layer in a transition display region of the display panel, disposing the light-shielding layer between the substrate and an active layer of each of transistors of the pixel driving circuits, and configuring an orthographic projection of light-shielding portions on the substrate to cover an orthographic projection of overlapping portions on the substrate, the light-shielding layer can shield infrared light emitted by the transmitting sensor, thereby preventing the transistors from an interference of the infrared light.

Abstract: An overlay mark includes a previous layer mark and a current layer mark. The previous layer mark includes a plurality of first work zones. Each first working zone includes a first sub-region and a second sub-region, wherein the first sub-region is closer to a center point of the previous layer mark than the second sub-region. The previous layer mark includes a first mark and an auxiliary mark respectively in the first sub-region and the second sub-region of each first working zone. The current layer mark includes a plurality of second working zones. Each second working zone includes a first sub-region and a second sub-region. The current layer mark includes a second mark disposed in the second sub-region of each second working zone. The overlay mark may be applied in the process of manufacturing a 3D NAND flash memory with high capacity and high performance.

Abstract: An alloy material of polycarbonate-polyethylene terephthalate includes the following components: a polycarbonate, a polyethylene terephthalate, a transesterification inhibitor, and a compatibilizer.

Abstract: A packaging structure includes an intermediary board including opposed a first bonding surface and a second bonding surface, one or more device chips bonded on the first bonding surface of the intermediary board, and an interconnection chip bonded on the second bonding surface of the intermediary board. The intermediary board includes a plurality of interconnection unit areas, and the adjacent interconnection unit areas are spaced apart from each other. An interconnection structure is formed within the interconnection unit area. The device chips are electrically connected to the interconnection structures. The interconnection chip is disposed on the intermediary board between the adjacent interconnection unit areas and electrically connected to the interconnection structures of the adjacent interconnection unit areas.