Patents by Inventor Cheng-Yen Tsai

Cheng-Yen Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240139301
    Abstract: The disclosure provides a method of active immunotherapy for a cancer patient, comprising administering vaccines against Globo series antigens (i.e., Globo H, SSEA-3 and SSEA-4). Specifically, the method comprises administering Globo H-CRM197 (OBI-833/821) in patients with cancer. The disclosure also provides a method of selecting a cancer patient who is suitable as treatment candidate for immunotherapy. Exemplary immune response can be characterized by reduction of the severity of disease, including but not limited to, prevention of disease, delay in onset of disease, decreased severity of symptoms, decreased morbidity and delayed mortality.
    Type: Application
    Filed: November 19, 2021
    Publication date: May 2, 2024
    Inventors: Ming-Tain LAI, Cheng-Der Tony YU, I-Ju CHEN, Wei-Han LEE, Chueh-Hao YANG, Chun-Yen TSAO, Chang-Lin HSIEH, Chien-Chih OU, Chen-En TSAI
  • Patent number: 11971493
    Abstract: An indoor positioning method based on image visual features is disclosed. A Wi-Fi signal strength value of a Wi-Fi tag is matched with a signal strength list to obtain a first location of a first Wi-Fi tag with the greatest matching degree. A SURF descriptor of an image of the Wi-Fi tag is matched with SURF descriptors recorded in the signal strength list to discover an image of a Wi-Fi tag with the greatest matching degree, thereby obtaining a second location of a second Wi-Fi tag corresponding to the image of the Wi-Fi tag with the greatest matching degree. A three location of a three Wi-Fi tag is obtained according to a homography matrix corresponding to the image of the Wi-Fi tag with the largest matching degree. Positioning information of the mobile device is obtained according to the first location, the second location and the third location.
    Type: Grant
    Filed: May 9, 2023
    Date of Patent: April 30, 2024
    Assignee: Nanning FuLian FuGui Precision Industrial Co., Ltd.
    Inventor: Cheng-Yen Tsai
  • Publication number: 20240113071
    Abstract: An integrated circuit package including electrically floating metal lines and a method of forming are provided. The integrated circuit package may include integrated circuit dies, an encapsulant around the integrated circuit dies, a redistribution structure on the encapsulant, a first electrically floating metal line disposed on the redistribution structure, a first electrical component connected to the redistribution structure, and an underfill between the first electrical component and the redistribution structure. A first opening in the underfill may expose a top surface of the first electrically floating metal line.
    Type: Application
    Filed: January 5, 2023
    Publication date: April 4, 2024
    Inventors: Chung-Shi Liu, Mao-Yen Chang, Yu-Chia Lai, Kuo-Lung Pan, Hao-Yi Tsai, Ching-Hua Hsieh, Hsiu-Jen Lin, Po-Yuan Teng, Cheng-Chieh Wu, Jen-Chun Liao
  • Publication number: 20240111138
    Abstract: A catadioptric optical membrane, which is disposed on a surface of a substrate, includes a reflection membrane and a matting membrane. The reflection membrane is disposed on an effective optical path area of the substrate and includes a reflection metal membrane and a reflection oxidation membrane. The reflection oxidation membrane includes a first reflection oxidation membrane and a second reflection oxidation membrane. The reflection metal membrane is farther away from the substrate than the first reflection oxidation membrane. The second reflection oxidation membrane is farther away from the substrate than the reflection metal membrane. The matting membrane is disposed on a non-effective optical path area of the substrate. The matting membrane includes a deep-color membrane and a first anti-reflection membrane. The deep-color membrane includes a deep-color metal membrane and a deep-color oxidation membrane. The deep-color membrane is farther away from the substrate than the first anti-reflection membrane.
    Type: Application
    Filed: September 27, 2023
    Publication date: April 4, 2024
    Inventors: Wen-Yu TSAI, Shih-Han CHEN, Chun-Yen CHEN, Cheng-Yu TSAI, Chun-Hung TENG
  • Publication number: 20240105664
    Abstract: A package structure includes a first RDL, an adhesive layer and a first electronic component. Upper bumps and conductive pads are provided on a first upper surface and a first lower surface of the first RDL, respectively. The adhesive layer is located on the first upper surface of the first RDL and surrounds the upper bumps. The first electronic component is mounted on the adhesive layer and includes conductors which are visible from an active surface of the first electronic component and joined to the upper bumps, the active surface of the first electronic component faces toward the first upper surface of the first RDL. Two adhesive surfaces of the adhesive layer are adhered to the first upper surface of the first RDL and the active surface of the first electronic component, respectively.
    Type: Application
    Filed: August 16, 2023
    Publication date: March 28, 2024
    Inventors: Yu-Chung Huang, Hsin-Yen Tsai, Fa-Chung Chen, Cheng-Fan Lin, Chen-Yu Wang
  • Patent number: 11942451
    Abstract: A semiconductor structure includes a functional die, a dummy die, a redistribution structure, a seal ring and an alignment mark. The dummy die is electrically isolated from the functional die. The redistribution structure is disposed over and electrically connected to the functional die. The seal ring is disposed over the dummy die. The alignment mark is between the seal ring and the redistribution structure, wherein the alignment mark is electrically isolated from the dummy die, the redistribution structure and the seal ring. The insulating layer encapsulates the functional die and the dummy die.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mao-Yen Chang, Yu-Chia Lai, Cheng-Shiuan Wong, Ting Hao Kuo, Ching-Hua Hsieh, Hao-Yi Tsai, Kuo-Lung Pan, Hsiu-Jen Lin
  • Patent number: 11935957
    Abstract: Semiconductor device structures having gate structures with tunable threshold voltages are provided. Various geometries of device structure can be varied to tune the threshold voltages. In some examples, distances from tops of fins to tops of gate structures can be varied to tune threshold voltages. In some examples, distances from outermost sidewalls of gate structures to respective nearest sidewalls of nearest fins to the respective outermost sidewalls (which respective gate structure overlies the nearest fin) can be varied to tune threshold voltages.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Chiang Wu, Wei-Chin Lee, Shih-Hang Chiu, Chia-Ching Lee, Hsueh Wen Tsau, Cheng-Yen Tsai, Cheng-Lung Hung, Da-Yuan Lee, Ching-Hwanq Su
  • Publication number: 20240088023
    Abstract: An interconnect structure includes a dielectric layer, a first conductive feature, a hard mask layer, a conductive layer, and a capping layer. The first conductive feature is disposed in the dielectric layer. The hard mask layer is disposed on the first conductive feature. The conductive layer includes a first portion and a second portion, the first portion of the conductive layer is disposed over at least a first portion of the hard mask layer, and the second portion of the conductive layer is disposed over the dielectric layer. The hard mask layer and the conductive layer are formed by different materials. The capping layer is disposed on the dielectric layer and the conductive layer.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: Shao-Kuan LEE, Kuang-Wei YANG, Cherng-Shiaw TSAI, Cheng-Chin LEE, Ting-Ya LO, Chi-Lin TENG, Hsin-Yen HUANG, Hsiao-Kang CHANG, Shau-Lin SHUE
  • Patent number: 11855098
    Abstract: In an embodiment, a method includes: forming a gate dielectric layer on an interface layer; forming a doping layer on the gate dielectric layer, the doping layer including a dipole-inducing element; annealing the doping layer to drive the dipole-inducing element through the gate dielectric layer to a first side of the gate dielectric layer adjacent the interface layer; removing the doping layer; forming a sacrificial layer on the gate dielectric layer, a material of the sacrificial layer reacting with residual dipole-inducing elements at a second side of the gate dielectric layer adjacent the sacrificial layer; removing the sacrificial layer; forming a capping layer on the gate dielectric layer; and forming a gate electrode layer on the capping layer.
    Type: Grant
    Filed: November 14, 2022
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Yen Tsai, Ming-Chi Huang, Zoe Chen, Wei-Chin Lee, Cheng-Lung Hung, Da-Yuan Lee, Weng Chang, Ching-Hwanq Su
  • Publication number: 20230280478
    Abstract: An indoor positioning method based on image visual features is disclosed. A Wi-Fi signal strength value of a Wi-Fi tag is matched with a signal strength list to obtain a first location of a first Wi-Fi tag with the greatest matching degree. A SURF descriptor of an image of the Wi-Fi tag is matched with SURF descriptors recorded in the signal strength list to discover an image of a Wi-Fi tag with the greatest matching degree, thereby obtaining a second location of a second Wi-Fi tag corresponding to the image of the Wi-Fi tag with the greatest matching degree. A three location of a three Wi-Fi tag is obtained according to a homography matrix corresponding to the image of the Wi-Fi tag with the largest matching degree. Positioning information of the mobile device is obtained according to the first location, the second location and the third location.
    Type: Application
    Filed: May 9, 2023
    Publication date: September 7, 2023
    Inventor: CHENG-YEN TSAI
  • Patent number: 11698467
    Abstract: An indoor positioning method based on image visual features. A Wi-Fi signal strength value of a Wi-Fi tag closest to a current location of a mobile device is matched with a signal strength list in a map database to obtain a first location of a first Wi-Fi tag with the greatest matching degree. A SURF descriptor of an image of the Wi-Fi tag closest to the current location of the mobile device is matched with SURF descriptors recorded in the signal strength list in the map database to discover an image of a Wi-Fi tag with the greatest matching degree, thereby obtaining a second location of a second Wi-Fi tag corresponding to the image of the Wi-Fi tag with the greatest matching degree. A three location of a three Wi-Fi tag is obtained according to a homography matrix corresponding to the image of the Wi-Fi tag with the largest matching degree and an empirical value of a positioning error.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: July 11, 2023
    Assignee: Nanning FuLian FuGui Precision Industrial Co., Ltd.
    Inventor: Cheng-Yen Tsai
  • Publication number: 20230205317
    Abstract: An embedded system and a vibration driving method are provided. The embedded system includes a vibration module, a Bluetooth module, a storage module, and a microcontroller unit. The vibration module includes a plurality of actuators. The Bluetooth module is configured to receive a Bluetooth signal provided by an external device. The storage module is configured to store a vibration type database. The microcontroller unit is coupled to the vibration module, the Bluetooth module, and the storage module. The microcontroller unit generates vibration type data according to the Bluetooth signal and the vibration type database. The microcontroller unit drives at least one of the plurality of actuators according to the vibration type data.
    Type: Application
    Filed: July 4, 2022
    Publication date: June 29, 2023
    Applicant: Industrial Technology Research Institute
    Inventors: Hsuan-Yu Lin, Cheng-Yen Tsai
  • Publication number: 20230106314
    Abstract: A method for providing a pre-deposition treatment (e.g., of a work-function layer) to accomplish work function tuning. In various embodiments, a gate dielectric layer is formed over a substrate, and a work-function metal layer is deposited over the gate dielectric layer. In some embodiments, a first in-situ process including a pre-treatment process of the work-function metal layer is performed. By way of example, the pre-treatment process removes an oxidized layer of the work-function metal layer to form a treated work-function metal layer. In some embodiments, after performing the first in-situ process, a second in-situ process including a deposition process of another metal layer over the treated work-function metal layer is performed.
    Type: Application
    Filed: December 7, 2022
    Publication date: April 6, 2023
    Inventors: Cheng-Yen TSAI, Hsin-Yi LEE, Chung-Chiang WU, Da-Yuan LEE, Weng CHANG, Ming-Hsing TSAI
  • Publication number: 20230073400
    Abstract: In an embodiment, a method includes: forming a gate dielectric layer on an interface layer; forming a doping layer on the gate dielectric layer, the doping layer including a dipole-inducing element; annealing the doping layer to drive the dipole-inducing element through the gate dielectric layer to a first side of the gate dielectric layer adjacent the interface layer; removing the doping layer; forming a sacrificial layer on the gate dielectric layer, a material of the sacrificial layer reacting with residual dipole-inducing elements at a second side of the gate dielectric layer adjacent the sacrificial layer; removing the sacrificial layer; forming a capping layer on the gate dielectric layer; and forming a gate electrode layer on the capping layer.
    Type: Application
    Filed: November 14, 2022
    Publication date: March 9, 2023
    Inventors: Cheng-Yen Tsai, Ming-Chi Huang, Zoe Chen, Wei-Chin Lee, Cheng-Lung Hung, Da-Yuan Lee, Weng Chang, Ching-Hwanq Su
  • Publication number: 20230063176
    Abstract: An indoor positioning method based on image visual features. A Wi-Fi signal strength value of a Wi-Fi tag closest to a current location of a mobile device is matched with a signal strength list in a map database to obtain a first location of a first Wi-Fi tag with the greatest matching degree. A SURF descriptor of an image of the Wi-Fi tag closest to the current location of the mobile device is matched with SURF descriptors recorded in the signal strength list in the map database to discover an image of a Wi-Fi tag with the greatest matching degree, thereby obtaining a second location of a second Wi-Fi tag corresponding to the image of the Wi-Fi tag with the greatest matching degree. A three location of a three Wi-Fi tag is obtained according to a homography matrix corresponding to the image of the Wi-Fi tag with the largest matching degree and an empirical value of a positioning error.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Inventor: CHENG-YEN TSAI
  • Patent number: 11591221
    Abstract: This present invention provides a microporous carbon nanospheres, method for synthesizing and activating thereof, the method comprising: adding and mixing well deionized water, absolute ethanol, triblock copolymer, ammonia solution, resorcinol and formaldehyde solution; separating solid and liquid of the mixture solution, then drying the separated solid substrate to have a dried solid substrate; sintering the dried solid substrate surrounding by nitrogen twice and collecting microporous carbon nanospheres after cooling down. Further sintering to activate these microporous carbon nanospheres surrounding by carbon dioxide, and collecting activated microporous carbon nanospheres after cooling down. Microporous carbon nanospheres and activated microporous carbon nanospheres synthesized by this present invention have spherical structure, small size and high the specific surface area, and the process is simplified, cost-effective and environment-friendly.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: February 28, 2023
    Assignee: NATIONAL CHUNG CHENG UNIVERSITY
    Inventors: Yuan-Yao Li, Cheng-Yen Tsai, Li-Ming Chiang
  • Patent number: 11522909
    Abstract: A method for preventing denial of service attacks which are distributed attacks is applied in a target service provider server, a platform server, and a botnet service provider server. The target service provider server determines a first SDN controller according to an attack protection request, and issues a first flow rule. The target service provider server directs data flow of a network equipment to a first cleaning center and controls the first cleaning center to identify the attacking or malicious element in the data flow according to the first flow rule. The platform server receives the attacking element in the data flow sent by the target service provider server, and regards the same as malicious traffic. The platform server generates an attack report, and sends the attack report to the botnet service provider server to notify the botnet service provider server to clean or filter out the malicious traffic.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: December 6, 2022
    Assignee: Nanning FuLian FuGui Precision Industrial Co., Ltd.
    Inventor: Cheng-Yen Tsai
  • Patent number: 11502080
    Abstract: In an embodiment, a method includes: forming a gate dielectric layer on an interface layer; forming a doping layer on the gate dielectric layer, the doping layer including a dipole-inducing element; annealing the doping layer to drive the dipole-inducing element through the gate dielectric layer to a first side of the gate dielectric layer adjacent the interface layer; removing the doping layer; forming a sacrificial layer on the gate dielectric layer, a material of the sacrificial layer reacting with residual dipole-inducing elements at a second side of the gate dielectric layer adjacent the sacrificial layer; removing the sacrificial layer; forming a capping layer on the gate dielectric layer; and forming a gate electrode layer on the capping layer.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: November 15, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Yen Tsai, Ming-Chi Huang, Zoe Chen, Wei-Chin Lee, Cheng-Lung Hung, Da-Yuan Lee, Weng Chang, Ching-Hwanq Su
  • Publication number: 20220262685
    Abstract: Embodiments disclosed herein relate to a pre-deposition treatment of materials utilized in metal gates of different transistors on a semiconductor substrate. In an embodiment, a method includes exposing a first metal-containing layer of a first device and a second metal-containing layer of a second device to a reactant to form respective monolayers on the first and second metal-containing layers. The first and second devices are on a substrate. The first device includes a first gate structure including the first metal-containing layer. The second device includes a second gate structure including the second metal-containing layer different from the second metal-containing layer. The monolayers on the first and second metal-containing layers are exposed to an oxidant to provide a hydroxyl group (—OH) terminated surface for the monolayers. Thereafter, a third metal-containing layer is formed on the —OH terminated surfaces of the monolayers on the first and second metal-containing layers.
    Type: Application
    Filed: May 2, 2022
    Publication date: August 18, 2022
    Inventors: Cheng-Yen Tsai, Chung-Chiang Wu, Tai-Wei Hwang, Hung-Chin Chung, Wei-Chin Lee, Da-Yuan Lee, Ching-Hwanq Su, Yin-Chuan Chuang, Kuan-Ting Liu
  • Patent number: 11322411
    Abstract: Embodiments disclosed herein relate to a pre-deposition treatment of materials utilized in metal gates of different transistors on a semiconductor substrate. In an embodiment, a method includes exposing a first metal-containing layer of a first device and a second metal-containing layer of a second device to a reactant to form respective monolayers on the first and second metal-containing layers. The first and second devices are on a substrate. The first device includes a first gate structure including the first metal-containing layer. The second device includes a second gate structure including the second metal-containing layer different from the second metal-containing layer. The monolayers on the first and second metal-containing layers are exposed to an oxidant to provide a hydroxyl group (—OH) terminated surface for the monolayers. Thereafter, a third metal-containing layer is formed on the —OH terminated surfaces of the monolayers on the first and second metal-containing layers.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: May 3, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Yen Tsai, Chung-Chiang Wu, Tai-Wei Hwang, Hung-Chin Chung, Wei-Chin Lee, Da-Yuan Lee, Ching-Hwanq Su, Yin-Chuan Chuang, Kuan-Ting Liu