Abstract: Implementation manners of the present disclosure provide an audio interaction method, apparatus, and system. The method includes: determining a user attribute tag, and grouping users into N groups based on the user attribute tag, N being a positive integer that at least is 2; recording an audio file of a user, and extracting decibel information of the audio file of the user from the recorded audio file of the user; and comparing the extracted decibel information of the audio file of the user with decibel information of a user in another group different from a group the user is in, and presenting a comparison result. In the implementation manners of the present disclosure, interaction between grouped users is achieved in an audio manner, therefore, interactive effect is better, and interactive efficiency is improved.

Abstract: A clock generator is provided that is immune to skew between bits in digital words generated by a multi-phase receiver.

Abstract: System and method for testing a high speed data path without generating a high speed bit clock, includes selecting a first high speed data path from a plurality of data paths for testing. Coherent clock data patterns are driven on one or more of remaining data paths of the plurality of data paths, wherein the coherent clock data patterns are in coherence with a low speed base clock. The first high speed data path is sampled by the coherent clock data patterns to generate a sampled first high speed data path, which is then tested at a speed of the low speed base clock.

Abstract: Disclosed are a method and a system for detecting a vehicle position by employing a polarization image. The method comprises a step of capturing a polarization image by using a polarization camera; a step of acquiring two road shoulders in the polarization image based on a difference between a road surface and each of the two road shoulders in the polarization image, and determining a part between the two road shoulders as the road surface; a step of detecting at least one vehicle bottom from the road surface based on a significant pixel value difference between each wheel and the road surface in the polarization image; and a step of generating a vehicle position from the vehicle bottom based on a pixel value difference between a vehicle outline corresponding to the vehicle bottom and background in the polarization image.

Abstract: A memory device includes a core array that includes memory cells. The memory device also includes a headswitch coupled to the core array and a positive supply voltage. The headswitch reduces leakage current from the core array by disconnecting the core array from the positive supply voltage. Additionally, head switches are added for pre-charge devices to further reduce leakage current.

Abstract: A differential voltage mode driver for implementing symmetric single ended termination includes an output driver circuitry having a predefined termination impedance. The differential voltage mode driver also includes an output driver replica having independently controlled first and second portions. The first and second portions are independently controlled to establish a substantially equal on-resistance of the first and the second portions. The output driver replica controls the predefined termination impedance of the output driver circuitry.

Abstract: In a particular embodiment, an electronic device includes a direct current (DC) voltage source coupled to a DC interface. The electronic device includes a receiver sense circuit configured to detect a connection of the electronic device to a sink device via a connector without consuming power from the DC voltage source. The electronic device further includes a controller coupled to a hot plug detect (HPD) interface. The controller is configured to receive a detection signal from the receiver sense circuit, selectively control a switch to enable and disable the DC voltage source based on the detection signal, detect an HPD signal at the HPD interface after enabling the DC voltage source, and disable the receiver sense circuit in response to detecting the HPD signal.

Abstract: System and method for testing a high speed data path without generating a high speed bit clock, includes selecting a first high speed data path from a plurality of data paths for testing. Coherent clock data patterns are driven on one or more of remaining data paths of the plurality of data paths, wherein the coherent clock data patterns are in coherence with a low speed base clock. The first high speed data path is sampled by the coherent clock data patterns to generate a sampled first high speed data path, which is then tested at a speed of the low speed base clock.

Abstract: Power saving for hot plug detect (HPD) is disclosed. In a particular embodiment, a method includes detecting, at a source device that is connectable to a sink device, a connection of the source device to the sink device via a connector. The source device includes a DC voltage source and the connection is detected without consuming power from the DC voltage source.

Abstract: A night-scene light source detecting device includes a pixel value obtaining unit configured to obtain a pixel value of each pixel in an input image; a night-scene-feature extraction unit provided for extracting a zone area of a mean corrected-brightness value and a high corrected-brightness value of the input image as two night-scene features based on the pixel value of each pixel in the input image; a night-scene image detection unit provided for determining whether the input image is a night-scene image or not based on the two night-scene features; a specific color detection unit provided for detecting whether each pixel belongs to specific color or not; and a night-scene light source determining unit provided for determining whether the night-scene image is picked up under irradiation by the specific light sources in a night scene or not based on the result of the specific color detection.

Abstract: System and method for testing a high speed data path without generating a high speed bit clock, includes selecting a first high speed data path from a plurality of data paths for testing. Coherent clock data patterns are driven on one or more of remaining data paths of the plurality of data paths, wherein the coherent clock data patterns are in coherence with a low speed base clock. The first high speed data path is sampled by the coherent clock data patterns to generate a sampled first high speed data path, which is then tested at a speed of the low speed base clock.

Abstract: A circuit includes a controllable oscillator and a controller coupled to the controllable oscillator. The controller is configured to provide a current control and a gain control to the controllable oscillator. The gain control is configured to change a gain of the controllable oscillator during a calibration process.

Abstract: A circuit includes a first path including a first transistor and a first current source. The first transistor is responsive to a tuning voltage. The circuit also includes a tuning voltage range extension circuit responsive to the tuning voltage. The tuning voltage range extension circuit is configured to selectively change current supplied by the first path as the tuning voltage exceeds a capacity threshold of the first transistor.

Abstract: A method includes tracking a tuning voltage at a first circuit coupled to a first drain node of a first supply of a charge pump. The method also includes tracking the tuning voltage at a second circuit coupled to a second drain node of a second supply of the charge pump. The method further includes stabilizing a first voltage of the first drain node and a second voltage of the second drain node responsive to the tuning voltage.

Abstract: A pseudo-dual port memory address multiplexing system includes a control circuit operative to identify a read request and a write request to be accomplished during a single clock cycle. A self time tracking circuit monitors a read operation and generates a switching signal when the read operation is determined to be complete. A multiplexer is responsive to the switching signal for selectively providing a read address and a write address to a memory address unit at the proper time.

Abstract: A method includes tracking a tuning voltage at a first circuit coupled to a first drain node of a first supply of a charge pump. The method also includes tracking the tuning voltage at a second circuit coupled to a second drain node of a second supply of the charge pump. The method further includes stabilizing a first voltage of the first drain node and a second voltage of the second drain node responsive to the tuning voltage.

Abstract: A circuit includes a first path including a first transistor and a first current source. The first transistor is responsive to a tuning voltage. The circuit also includes a tuning voltage range extension circuit responsive to the tuning voltage. The tuning voltage range extension circuit is configured to selectively change current supplied by the first path as the tuning voltage exceeds a capacity threshold of the first transistor.

Abstract: A differential voltage mode driver for implementing symmetric single ended termination includes an output driver circuitry having a predefined termination impedance. The differential voltage mode driver also includes an output driver replica having independently controlled first and second portions. The first and second portions are independently controlled to establish a substantially equal on-resistance of the first and the second portions. The output driver replica controls the predefined termination impedance of the output driver circuitry.

Abstract: Disclosed are a method and a system for detecting a vehicle position by employing a polarization image. The method comprises a step of capturing a polarization image by using a polarization camera; a step of acquiring two road shoulders in the polarization image based on a difference between a road surface and each of the two road shoulders in the polarization image, and determining a part between the two road shoulders as the road surface; a step of detecting at least one vehicle bottom from the road surface based on a significant pixel value difference between each wheel and the road surface in the polarization image; and a step of generating a vehicle position from the vehicle bottom based on a pixel value difference between a vehicle outline corresponding to the vehicle bottom and background in the polarization image.

Abstract: A circuit includes a controllable oscillator and a controller coupled to the controllable oscillator. The controller is configured to provide a current control and a gain control to the controllable oscillator. The gain control is configured to change a gain of the controllable oscillator during a calibration process.