Abstract: System and method for testing a high speed data path without generating a high speed bit clock, includes selecting a first high speed data path from a plurality of data paths for testing. Coherent clock data patterns are driven on one or more of remaining data paths of the plurality of data paths, wherein the coherent clock data patterns are in coherence with a low speed base clock. The first high speed data path is sampled by the coherent clock data patterns to generate a sampled first high speed data path, which is then tested at a speed of the low speed base clock.

Abstract: In a particular embodiment, a memory device is disclosed that includes a memory cell including a resistance-based memory element coupled to an access transistor. The access transistor has a first oxide thickness to enable operation of the memory cell at an operating voltage. The memory device also includes a first amplifier configured to couple the memory cell to a supply voltage that is greater than a voltage limit to generate a data signal based on a current through the memory cell. The first amplifier includes a clamp transistor that has a second oxide thickness that is greater than the first oxide thickness. The clamp transistor is configured to prevent the operating voltage at the memory cell from exceeding the voltage limit.

Abstract: A night-scene light source detecting device includes a pixel value obtaining unit configured to obtain a pixel value of each pixel in an input image; a night-scene-feature extraction unit provided for extracting a zone area of a mean corrected-brightness value and a high corrected-brightness value of the input image as two night-scene features based on the pixel value of each pixel in the input image; a night-scene image detection unit provided for determining whether the input image is a night-scene image or not based on the two night-scene features; a specific color detection unit provided for detecting whether each pixel belongs to specific color or not; and a night-scene light source determining unit provided for determining whether the night-scene image is picked up under irradiation by the specific light sources in a night scene or not based on the result of the specific color detection.

Abstract: Disclosed are a system and a method for detecting a multi-view human face. The system comprises an input device configured to input image data; a hybrid classifier including a non-human-face rejection classifier configured to roughly detect non-human-face image data and plural angle tag classifiers configured to add an angle tag into the image data having a human face; and plural cascade angle classifiers. Each of the plural cascade angle classifiers corresponds to a human face angle. One of the plural cascade angle classifiers receives the image data with the angle tag output from the corresponding angle tag classifier, and further detects whether the received image data with the angle tag includes the human face.

Abstract: A system and method to read and write data in magnetic random access memories are disclosed. In a particular embodiment, a device includes a spin transfer torque magnetic tunnel junction (STT-MTJ) element and a transistor with a first gate and a second gate coupled to the STT-MTJ element.

Abstract: Disclosed are a backlight detection device and a backlight detection method. The device comprises a pixel value acquiring unit used to acquire a pixel value of each of pixels in an image; a focal position determination unit used to determine a focal position in the image; a subject area determination unit used to determine, based on the pixel values of the pixels in the image, a subject area starting from the focal position by using an area growth processing so as to divide the image into the subject area and a background area; a brightness difference calculation unit used to calculate a brightness difference between the subject area and the background area; and a backlight determination unit used to determine, based on the brightness difference, whether the image is in the backlight state so that the image in the backlight state can be detected.

Abstract: Disclosed are an apparatus and a method for determining a multi-view specific object. The apparatus comprises an input device for inputting image data; and cascade classifiers formed of stage classifiers corresponding to a same detection angle, the stage classifiers corresponding to different features. Each cascade classifier is for calculating a degree of confidence of the image data of a specific object corresponding to the detection angle based on the aspect of the corresponding feature, and determining whether the image data belongs to the specific object based on the degree of confidence. A self-adaptive posture prediction device is disposed between two stage classifiers in each cascade classifier, and is used to determine whether the image data enters the cascade classifiers corresponding to the detection angles and located after the self-adaptive posture prediction device.

Abstract: In a particular embodiment, a memory device includes a first memory cell and a second memory cell. The memory device also includes a first bit line associated with the first memory cell and a second bit line associated with the second memory cell. The memory device also includes a source line coupled to the first memory cell and coupled to the second memory cell.

Abstract: A circuit device includes a first input to receive a reset control signal and a second input coupled to an output of a latch. The circuit device also includes a logic circuit adapted to conditionally reset the latch based on a state of the output in response to receiving the reset control signal.

Abstract: Circuits, apparatuses, and methods of interposing a selectable delay in reading a magnetic random access memory (MRAM) device are disclosed. In a particular embodiment, a circuit includes a sense amplifier, having a first input, a second input, and an enable input. A first amplifier coupled to an output of a magnetic resistance-based memory cell and a second amplifier coupled to a reference output of the cell also are provided. The circuit further includes a digitally-controllable amplifier coupled to a tracking circuit cell. The tracking circuit cell includes at least one element that is similar to the cell of the magnetic resistance-based memory. The first input of the sense amplifier is coupled to the first amplifier, the second input of the sense amplifier is coupled to the second amplifier, and the enable input is coupled to the third digitally-controllable amplifier via a logic circuit.

Abstract: Power saving for hot plug detect (HPD) is disclosed. In a particular embodiment, a method includes detecting, at a source device that is connectable to a sink device, a connection of the source device to the sink device via a connector. The source device includes a DC voltage source and the connection is detected without consuming power from the DC voltage source.

Abstract: A pseudo-dual port memory address multiplexing system includes a control circuit operative to identify a read request and a write request to be accomplished during a single clock cycle. A self time tracking circuit monitors a read operation and generates a switching signal when the read operation is determined to be complete. A multiplexer is responsive to the switching signal for selectively providing a read address and a write address to a memory address unit at the proper time.

Abstract: A memory device includes a core array that includes memory cells. The memory device also includes a headswitch coupled to the core array and a positive supply voltage. The headswitch reduces leakage current from the core array by disconnecting the core array from the positive supply voltage. Additionally, head switches are added for pre-charge devices to further reduce leakage current.

Abstract: A pseudo-dual port memory address multiplexing system includes a control circuit operative to identify a read request and a write request to be accomplished during a single clock cycle. A self time tracking circuit monitors a read operation and generates a switching signal when the read operation is determined to be complete. A multiplexer is responsive to the switching signal for selectively providing a read address and a write address to a memory address unit at the proper time.

Abstract: A system and method to read and write data in magnetic random access memories are disclosed. In a particular embodiment, a device includes a spin transfer torque magnetic tunnel junction (STT-MTJ) element and a transistor with a first gate and a second gate coupled to the STT-MTJ element.

Abstract: A cell culture system for directing growth of cells is provided. The cell culture system includes a substrate, a culture layer and a culture medium. The culture layer is located on the substrate. The culture layer includes at least one carbon nanotube film including a plurality of carbon nanotubes orientated primarily along a same direction. The culture medium covers the culture layer and includes at least one growth factor.

Abstract: Circuits, apparatuses, and methods of interposing a selectable delay in reading a magnetic random access memory (MRAM) device are disclosed. In a particular embodiment, a circuit includes a sense amplifier, having a first input, a second input, and an enable input. A first amplifier coupled to an output of a magnetic resistance-based memory cell and a second amplifier coupled to a reference output of the cell also are provided. The circuit further includes a digitally-controllable amplifier coupled to a tracking circuit cell. The tracking circuit cell includes at least one element that is similar to the cell of the magnetic resistance-based memory. The first input of the sense amplifier is coupled to the first amplifier, the second input of the sense amplifier is coupled to the second amplifier, and the enable input is coupled to the third digitally-controllable amplifier via a logic circuit.

Abstract: The present invention discloses a clutch mechanism to adjust eccentricity in a power tool. The clutch mechanism comprises an outer race mounted radially on an annular main body which is mounted on an eccentric shaft. At least one first connecting member is disposed between the outer race and the annular main body. At least one second connecting member is disposed between the annular main body and the eccentric shaft. The first connecting member makes the outer race and the annular main body rotate relative to each other at one way. The second connecting member makes the annular main body and the eccentric shaft rotate relative to each other at one way. The annular main body has an axial projection formed thereon to connect with an eccentric mechanism in the power tool. With this type of clutch mechanism, the adjusted eccentricity will not change during working and torque can be transferred stably.

Abstract: In a particular embodiment, a memory device is disclosed that includes a memory cell including a resistance-based memory element coupled to an access transistor. The access transistor has a first oxide thickness to enable operation of the memory cell at an operating voltage. The memory device also includes a first amplifier configured to couple the memory cell to a supply voltage that is greater than a voltage limit to generate a data signal based on a current through the memory cell. The first amplifier includes a clamp transistor that has a second oxide thickness that is greater than the first oxide thickness. The clamp transistor is configured to prevent the operating voltage at the memory cell from exceeding the voltage limit.

Abstract: Systems and methods of selectively applying negative voltage to word lines during memory device read operation are disclosed. In an embodiment, a memory device includes a word line logic circuit coupled to a plurality of word lines and adapted to selectively apply a positive voltage to a selected word line coupled to a selected memory cell that includes a magnetic tunnel junction (MTJ) device and to apply a negative voltage to unselected word lines.