Patents by Inventor Chi Chu

Chi Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250096495
    Abstract: a combination socket comprises a socket surface that can accommodate multiple different specifications of IEC plugs. This socket surface has recessed grooves, socket cores, and socket holes; the surface of the socket core is equipped with live wire socket holes, neutral wire socket holes, and ground wire socket holes; the grooves include a wide groove located in front of the socket core and a narrow groove located behind the socket core.
    Type: Application
    Filed: September 14, 2023
    Publication date: March 20, 2025
    Inventors: KUANG HAO LEE, Ming Tsai Wang, Chi Chu, Wei Chi Chih
  • Patent number: 8115771
    Abstract: A system for multilevel simulation of an animation cloth is provided. The system includes a multilevel area generation module, a curvature calculation module, a curvature comparison module, and a dynamic simulation module. The multilevel area generation module divides a plurality of grid units of the animation cloth into a plurality of level sub-areas based on a multilevel technique, wherein each of the level sub-areas is generated by dividing an upper level sub-area. The curvature calculation module calculates the curvatures of the level sub-areas according to the plane vectors of the grid units in a frame. The curvature comparison module compares the curvatures of the level sub-areas with a flatness threshold. The dynamic simulation module calculates the plane vector of each grid unit in a next frame through different method according to the comparison result of the curvature comparison module.
    Type: Grant
    Filed: December 27, 2007
    Date of Patent: February 14, 2012
    Assignee: Institute for Information Industry
    Inventors: Chia-Ying Chi, Chi Chu, Zen-Chung Shih, Wei-Te Lin
  • Publication number: 20090141030
    Abstract: A system for multilevel simulation of an animation cloth is provided. The system includes a multilevel area generation module, a curvature calculation module, a curvature comparison module, and a dynamic simulation module. The multilevel area generation module divides a plurality of grid units of the animation cloth into a plurality of level sub-areas based on a multilevel technique, wherein each of the level sub-areas is generated by dividing an upper level sub-area. The curvature calculation module calculates the curvatures of the level sub-areas according to the plane vectors of the grid units in a frame. The curvature comparison module compares the curvatures of the level sub-areas with a flatness threshold. The dynamic simulation module calculates the plane vector of each grid unit in a next frame through different method according to the comparison result of the curvature comparison module.
    Type: Application
    Filed: December 27, 2007
    Publication date: June 4, 2009
    Applicant: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Chia-Ying Chi, Chi Chu, Zen-Chung Shih, Wei-Te Lin
  • Publication number: 20050082656
    Abstract: A Stackable package module comprises a plurality of semiconductor devices in stack. One of the semiconductor devices includes a chip with an active surface and a corresponding back surface, a plurality of solder bumps and a plurality of stud bumps. The solder bumps are formed on the active surface. The stud bumps are formed on the back surface. Each stud bump has a bump body and a protruding trail by wire-bonding and cutting. Bumps of another package are bonded on the stub bumps for replacing known intermediate substrate in conventional stacked package module.
    Type: Application
    Filed: September 7, 2004
    Publication date: April 21, 2005
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi Chu, Cheng-Yin Lee, Gwo-Liang Weng, Shih-Chang Lee
  • Patent number: 6603893
    Abstract: An optical switching method and apparatus. In one aspect of the present invention, the disclosed apparatus includes first and second multi-mode interference (MMI) splitting devices in a semiconductor substrate. First and second outputs of the first MMI splitting device are optically coupled to first and second inputs, respectively, of the second MMI splitting device. First and second phase control devices are included in the semiconductor substrate. The first input of the second MMI splitting device is optically coupled to the first output of the first MMI splitting device through the first phase control device. The second input of the second MMI splitting device is optically coupled to the second output of the first MMI splitting device through the second phase control device. The first input of the first MMI splitting device is selectively optically coupled to the first and second outputs of the second MMI splitting device in response to the first and second phase control devices.
    Type: Grant
    Filed: March 27, 2001
    Date of Patent: August 5, 2003
    Assignee: Intel Corporation
    Inventors: Ansheng Liu, Mario J. Paniccia, Dean A. Samara-Rubio, Chi Chu