Abstract: The present disclosure relates to a CMOS image sensor having a multiple deep trench isolation (MDTI) structure, and an associated method of formation. In some embodiments, the image sensor comprises a boundary deep trench isolation (BDTI) structure disposed at boundary regions of a pixel region surrounding a photodiode. The BDTI structure has a ring shape from a top view and two columns surrounding the photodiode with the first depth from a cross-sectional view. A multiple deep trench isolation (MDTI) structure is disposed at inner regions of the pixel region overlying the photodiode, the MDTI structure extending from the back-side of the substrate to a second depth within the substrate smaller than the first depth. The MDTI structure has three columns with the second depth between the two columns of the BDTI structure from the cross-sectional view. The MDTI structure is a continuous integral unit having a ring shape.

Abstract: A high-speed, uniform and high-quality surface treatment apparatus is described. The surface treatment apparatus includes a fixed hollow cylindrical chamber body and a rotatable polygonal prism inside the chamber body. Several flat-substrate holders are symmetrically disposed on the prism surface. The substrate holders revolve as the prism rotates. On the fixed chamber wall, several gas inlet channels, pumping channels and processing units are installed according to the symmetric configuration of the substrate holders. Then, as the substrate holders revolve, the surface treatment processes will occur periodically, including the injection of gas reactants into, the activation of gases in, and the pumping of after-reaction gases out of the processing spaces, defined by the substrate holders and the chamber wall. The substrates will therefore undergo many cycles of periodic surface treatment processes.

Abstract: A package structure includes a first substrate, a second substrate disposed on the first substrate, a third substrate disposed on the second substrate, and multiple chips mounted on the third substrate. A second coefficient of thermal expansion (CTE) of the second substrate is less than a first CTE of the first substrate. The third substrate includes a first sub-substrate, a second sub-substrate in the same level with the first sub-substrate, a third sub-substrate in the same level with the first sub-substrate. A CTE of the first sub-substrate, a CTE of the second sub-substrate, and a CTE of the third sub-substrate are less than the second CTE of the second substrate.

Abstract: A package includes a substrate having a conductive layer, and the conductive layer comprises an exposed portion. A die stack is disposed over the substrate and electrically connected to the conductive layer. A high thermal conductivity material is disposed over the substrate and contacting the exposed portion of the conductive layer. The package further includes a contour ring over and contacting the high thermal conductivity material.

Abstract: A source-network-load-storage coordination dispatching method in a background of a coupling of renewable energy sources, including: taking an expectation of a minimum grid operating cost in a dispatching cycle as an objective function; generating an approximate value function of an output of a set for generating electricity from renewable energy sources and a user load, and constructing a source-network-load-storage coordination dispatching model with combination of the objective function; obtaining forecast data of the output of a set for generating electricity from renewable energy sources and the user load, and inputting the forecast data into the dispatching model for solving; performing iterative updating on the approximate value function, importing the approximate value function after the iterative updating into the dispatching model for iterative solving, and terminating an iterative process until a solving result satisfies a preset convergence condition; and using a solving result of a last iteration

Abstract: The present disclosure relates to a secondary battery manufacturing system having a multi-packaging unit, in which multiple packaging units of a secondary battery manufacturing facility are provided and a transfer box on which an electrode assembly is accommodated is transferred to each packaging unit by a transfer unit, wherein the secondary battery manufacturing system includes: an electrode supply unit equipped with a plurality of stacking devices for supplying an electrode assembly in which a plurality of battery cells are stacked; a tab-welding unit; at least one packaging unit; at least one temporary buffer; and a transfer unit.

Abstract: The present disclosure relates to a secondary battery manufacturing system in which a packaging unit of a secondary battery manufacturing facility are configured to have multiple packaging units, and having a multipackaging unit such that a transfer box in which an electrode assembly is seated is transferred to each of the packaging units by a transfer unit, and including an electrode supply unit having a plurality of stacking devices supplying an electrode assembly in which a plurality of battery cells are stacked, a tab welding unit, at least one packaging unit, at least one temporary buffer, and a transfer unit.

Abstract: A method of manufacturing a semiconductor device includes forming a multi-layer stack of alternating first layers of a first semiconductor material and second layers of a second semiconductor material on a semiconductor substrate, forming a first recess through the multi-layer stack, and laterally recessing sidewalls of the second layers of the multi-layer stack. The sidewalls are adjacent to the first recess. The method further includes forming inner spacers with respective seams adjacent to the recessed second layers of the multi-layer stack and performing an anneal treatment on the inner spacers to close the respective seams.

Abstract: A method for performing access management of a memory device with aid of serial number assignment timing control and associated apparatus are provided. The method includes: managing a plurality of spare blocks with a spare pool; popping a first block from the spare pool to be a host data block, and performing first subsequent operations, wherein the host data block is arranged to receive data from a host device, and serial number assignment of the host data block corresponds to a timing of fully programing the host data block; and popping a second block from the spare pool to be a garbage collection (GC) destination block, and performing second subsequent operations, wherein the GC destination block is arranged to receive data from a GC source block during a GC procedure, and serial number assignment of the GC destination block corresponds to a timing of starting using the GC destination block.

Abstract: A motor controller comprises a switch circuit and a control unit. The switch circuit is coupled to a motor for driving the motor. The control unit is configured to generate a control signal to control the switch circuit. The motor controller is configured to generate a current signal and a voltage signal. When a current phase of the current signal is at a predetermined crossing phase, the motor controller calculates a difference value between the current phase of the current signal and a voltage phase of the voltage signal, where the motor controller is configured to control the difference value. The motor controller may stabilize the motor and avoid noise by modulating the difference value. The motor controller may modulate the difference value, such that the difference value is equal to a predetermined phase difference.

Abstract: A motor controller comprises a switch circuit and a driving circuit. The switch circuit is coupled to a motor for driving the motor. The driving circuit generates a plurality of control signals to control the switch circuit. The motor controller is configured to crop a first waveform into a second waveform, where the first waveform is transformed into the second waveform gradually. Moreover, the motor controller is configured to transform the second waveform into the first waveform, where the second waveform is transformed into the first waveform gradually. The first waveform may be an M-shaped waveform, a W-shaped waveform, or a sinusoidal waveform. The second waveform may be a trapezoidal waveform.

Abstract: An optical device package includes a substrate, a light emitting device, a light detecting device, one or more electronic chips, a clear encapsulation layer and a patterned reflective layer. The substrate has a surface. The light emitting device is disposed on the surface of the substrate, the light detecting device is disposed on the surface of the substrate, and the light emitting device and the light detecting device have a gap. The one or more electronic chips are at least partially embedded in the substrate, and electrically connected to the light emitting device and the light detecting device. The clear encapsulation layer is disposed on the surface of the substrate and encapsulates the light emitting device and the light detecting device. The patterned reflective layer is disposed on an upper surface of the clear encapsulation layer and at least overlaps the gap between the light emitting device and the light detecting device in a projection direction perpendicular to the surface of the substrate.

Abstract: A method of a flash memory controller used to be externally coupled to a host device and a flash memory, comprising: providing a multi-processor having a plurality of processing units; receiving a trim command and a logical block address (LBA) range sent from the host device; separating multiple operations of the trim command into N threads according to at least one of a number of the processing units, types of the multiple operations, numbers of execution cycles of the multiple operations, and portions of the LBA range; using the processing units to execute the N threads individually; and maximizing a number of execution cycles during which the processing units are busy.

Abstract: A method and apparatus for a gap-fill in semiconductor devices are provided. The method includes forming a metal seed layer on an exposed surface of the substrate, wherein the substrate has features in the form of trenches or vias formed in a top surface of the substrate, the features having sidewalls and a bottom surface extending between the sidewalls. A gradient oxidation process is performed in a first process chamber to oxidize exposed portions of the metal seed layer to form a metal oxide, wherein the gradient oxidation process preferentially oxidizes a field region of the substrate over the bottom surface of the features. An etch back process is performed in the first process chamber removes or reduces the oxidized portion of the seed layer. A metal gap-fill process fills or partially fills the features with a gap fill material.

Abstract: A method for performing access management of a memory device with aid of serial number assignment timing control and associated apparatus are provided. The method includes: managing a plurality of spare blocks with a spare pool; popping a first block from the spare pool to be a host data block, and performing first subsequent operations, wherein the host data block is arranged to receive data from a host device, and serial number assignment of the host data block corresponds to a timing of fully programing the host data block; and popping a second block from the spare pool to be a garbage collection (GC) destination block, and performing second subsequent operations, wherein the GC destination block is arranged to receive data from a GC source block during a GC procedure, and serial number assignment of the GC destination block corresponds to a timing of starting using the GC destination block.

Abstract: A screen is manipulated to display content whose reflection is not captured by a sensor. In an embodiment, the screen inserts a black frame between screen content frames, displaying the black frame during a particular time. A sensor captures a video frame during the particular time. The video frame does not include a screen reflection and is considered a clean frame. In another embodiment, the screen displays screen content with a particular polarization during a particular time. A sensor captures a video frame with another polarization during the same time. The polarizations are selected such that the sensor is unable to capture screen reflections. The video frame is considered a clean frame. The clean frame is used to generate a masking frame, which is applied to target video frames to remove screen reflection. A modified target video, including the reflection-removed target video frame, and/or the clean frame itself, is generated.

Abstract: A method of a flash memory controller used to be externally coupled to a host device and a flash memory, comprising: providing a multi-processor having a plurality of processing units; receiving a trim command and a logical block address (LBA) range sent from the host device; separating multiple operations of the trim command into N threads according to at least one of a number of the processing units, types of the multiple operations, numbers of execution cycles of the multiple operations, and portions of the LBA range; using the processing units to execute the N threads individually; and maximizing a number of execution cycles during which the processing units are busy.

Abstract: A screen is manipulated to display content whose reflection is not captured by a sensor. In an embodiment, the screen inserts a black frame between screen content frames, displaying the black frame during a particular time. A sensor captures a video frame during the particular time. The video frame does not include a screen reflection and is considered a clean frame. In another embodiment, the screen displays screen content with a particular polarization during a particular time. A sensor captures a video frame with another polarization during the same time. The polarizations are selected such that the sensor is unable to capture screen reflections. The video frame is considered a clean frame. The clean frame is used to generate a masking frame, which is applied to target video frames to remove screen reflection. A modified target video, including the reflection-removed target video frame, and/or the clean frame itself, is generated.

Abstract: Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate for MRAM applications. In one embodiment, a magnetic tunnel junction (MTJ) device structure includes a junction structure disposed on a substrate, the junction structure comprising a first ferromagnetic layer and a second ferromagnetic layer sandwiching a tunneling barrier layer, a dielectric capping layer disposed on the junction structure, a metal capping layer disposed on the junction structure, and a top buffer layer disposed on the metal capping layer.

Abstract: A deposition system, and a method of operation thereof, includes: a cathode; a shroud below the cathode; a rotating shield below the cathode for exposing the cathode through the shroud and through a shield hole of the rotating shield; and a rotating pedestal for producing a material to form a carrier over the rotating pedestal, wherein the material having a non-uniformity constraint of less than 1% of a thickness of the material and the cathode having an angle between the cathode and the carrier.