Patents by Inventor Chi-I Lang
Chi-I Lang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20130342230Abstract: Measuring current-voltage (I-V) characteristics of a solar cell using a lamp that emits light, a substrate that includes a plurality of solar cells, a positive electrode attached to the solar cells, and a negative electrode peripherally deposited around each of the solar cells and connected to a common ground, an articulation platform coupled to the substrate, a multi-probe switching matrix or a Z-stage device, a programmable switch box coupled to the multi-probe switching matrix or Z-stage device and selectively articulating the probes by raising the probes until in contact with at least one of the positive electrode and the negative electrode and lowering the probes until contact is lost with at least one of the positive electrode and the negative electrode, a source meter coupled to the programmable switch box and measuring the I-V characteristics of the substrate.Type: ApplicationFiled: August 20, 2013Publication date: December 26, 2013Applicant: Intermolecular, IncInventors: Yun Wang, Tony P. Chiang, Chi-I Lang
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Patent number: 8614787Abstract: Simultaneous measurement of an internal quantum efficiency and an external quantum efficiency of a solar cell using an emitter that emits light; a three-way beam splitter that splits the light into solar cell light and reference light, wherein the solar cell light strikes the solar cell; a reference detector that detects the reference light; a reflectance detector that detects reflectance light, wherein the reflectance light comprises a portion of the solar cell light reflected off the solar cell; a source meter operatively coupled to the solar cell; a multiplexer operatively coupled to the solar cell, the reference detector, and the reflectance detector; and a computing device that simultaneously computes the internal quantum efficiency and the external quantum efficiency of the solar cell.Type: GrantFiled: November 23, 2010Date of Patent: December 24, 2013Assignee: Intermolecular, Inc.Inventors: Yun Wang, Tony P. Chiang, Chi-I Lang
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Publication number: 20130338305Abstract: Methods of modifying a patterned semiconductor substrate are presented including: providing a patterned semiconductor substrate surface including a dielectric region and a conductive region; and applying an amphiphilic surface modifier to the dielectric region to modify the dielectric region. In some embodiments, modifying the dielectric region includes modifying a wetting angle of the dielectric region. In some embodiments, modifying the wetting angle includes making a surface of the dielectric region hydrophilic. In some embodiments, methods further include applying an aqueous solution to the patterned semiconductor substrate surface. In some embodiments, the conductive region is selectively enhanced by the aqueous solution. In some embodiments, methods further include providing the dielectric region formed of a low-k dielectric material. In some embodiments, applying the amphiphilic surface modifier modifies an interaction of the low-k dielectric region with a subsequent process.Type: ApplicationFiled: August 20, 2013Publication date: December 19, 2013Applicant: Intermolecular, Inc.Inventors: Anh Duong, Tony Chiang, Zachary M. Fresco, Nitin Kumar, Chi-I Lang, Jinhong Tong, Anna Tsizelmon
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Publication number: 20130334491Abstract: Methods for forming a NiO film on a substrate for use with a resistive switching memory device are presenting including: preparing a nickel ion solution; receiving the substrate, where the substrate includes a bottom electrode, the bottom electrode utilized as a cathode; forming a Ni(OH)2 film on the substrate, where the forming the Ni(OH)2 occurs at the cathode; and annealing the Ni(OH)2 film to form the NiO film, where the NiO film forms a portion of a resistive switching memory element. In some embodiments, methods further include forming a top electrode on the NiO film and before the forming the Ni(OH)2 film, pre-treating the substrate. In some embodiments, methods are presented where the bottom electrode and the top electrode are a conductive material such as: Ni, Pt, Ir, Ti, Al, Cu, Co, Ru, Rh, a Ni alloy, a Pt alloy, an Ir alloy, a Ti alloy, an Al alloy, a Cu alloy, a Co alloy, a Ru alloy, and an Rh alloy.Type: ApplicationFiled: August 21, 2013Publication date: December 19, 2013Applicant: Intermolecular Inc.Inventors: Zhi-Wen Wen Sun, Tony P. Chiang, Chi-I Lang, Jinhong Tong
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Patent number: 8609475Abstract: Methods for forming a NiO film on a substrate for use with a resistive switching memory device are presenting including: preparing a nickel ion solution; receiving the substrate, where the substrate includes a bottom electrode, the bottom electrode utilized as a cathode; forming a Ni(OH)2 film on the substrate, where the forming the Ni(OH)2 occurs at the cathode; and annealing the Ni(OH)2 film to form the NiO film, where the NiO film forms a portion of a resistive switching memory element. In some embodiments, methods further include forming a top electrode on the NiO film and before the forming the Ni(OH)2 film, pre-treating the substrate. In some embodiments, methods are presented where the bottom electrode and the top electrode are a conductive material.Type: GrantFiled: September 4, 2012Date of Patent: December 17, 2013Assignee: Intermolecular, Inc.Inventors: Zhi-Wen Sun, Tony Chiang, Chi-I Lang, Jinhong Tong
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Patent number: 8580584Abstract: A system and method of increasing productivity of OLED material screening includes providing a substrate that includes an organic semiconductor, processing regions on the substrate by combinatorially varying parameters associated with the OLED device production on the substrate, performing a first characterization test on the processed regions on the substrate to generate first results, processing regions on the substrate in a combinatorial manner by varying parameters associated with the OLED device production on the substrate based on the first results of the first characterization test, performing a second characterization test on the processed regions on the substrate to generate second results, and determining whether the substrate meets a predetermined quality threshold based on the second results.Type: GrantFiled: September 21, 2012Date of Patent: November 12, 2013Assignee: Intermolecular, Inc.Inventors: Yun Wang, Tony P. Chiang, Chi-I Lang
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Patent number: 8580697Abstract: The present invention meets these needs by providing improved methods of filling gaps. In certain embodiments, the methods involve placing a substrate into a reaction chamber and introducing a vapor phase silicon-containing compound and oxidant into the chamber. Reactor conditions are controlled so that the silicon-containing compound and the oxidant are made to react and condense onto the substrate. The chemical reaction causes the formation of a flowable film, in some instances containing Si—OH, Si—H and Si—O bonds. The flowable film fills gaps on the substrates. The flowable film is then converted into a silicon oxide film, for example by plasma or thermal annealing. The methods of this invention may be used to fill high aspect ratio gaps, including gaps having aspect ratios ranging from 3:1 to 10:1.Type: GrantFiled: February 18, 2011Date of Patent: November 12, 2013Assignee: Novellus Systems, Inc.Inventors: Chi-I Lang, Judy H. Huang, Michael Barnes, Sunil Shanker
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Patent number: 8580344Abstract: This disclosure provides methods, devices and systems for using a stamp to enhance selectivity between surface layers of a substrate, and to facilitate functionalizing selected layers. An array of flat stamps may be used to concurrently stamp multiple regions of a substrate to transfer one or more substances to the topmost layer or layers of the substrate. If desired, the affected regions of the substrate may be isolated from each other through the use of a reactor plate that, when clamped to the substrate's surface, forms reaction wells in the area of stamping. The stamp area can, if desired, be configured for stamping the substrate after the reactor plate has been fitted, with the individual stamps sized and arranged in a manner that permits stamping within each reaction well.Type: GrantFiled: March 16, 2009Date of Patent: November 12, 2013Assignee: Intermolecular, Inc.Inventors: Nikhil D. Kalyankar, Zachary Fresco, Chi-I Lang
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Patent number: 8575021Abstract: Methods for substrate processing are described. The methods include forming a material layer on a substrate. The methods include selecting constituents of a molecular masking layer (MML) to remove an effect of variations in the material layer as a result of substrate processing. The methods include normalizing the surface characteristics of the material layer by selectively depositing the MML on the material layer.Type: GrantFiled: March 14, 2013Date of Patent: November 5, 2013Assignee: Intermolecular, Inc.Inventors: Thomas R. Boussie, Tony P. Chiang, Anh Duong, Zachary Fresco, Nitin Kumar, Chi-I Lang, Sandra G. Malhotra, Jinhong Tong
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Patent number: 8552755Abstract: Measuring current-voltage (I-V) characteristics of a solar cell using a lamp that emits light, a substrate that includes a plurality of solar cells, a positive electrode attached to the solar cells, and a negative electrode peripherally deposited around each of the solar cells and connected to a common ground, an articulation platform coupled to the substrate, a multi-probe switching matrix or a Z-stage device, a programmable switch box coupled to the multi-probe switching matrix or Z-stage device and selectively articulating the probes by raising the probes until in contact with at least one of the positive electrode and the negative electrode and lowering the probes until contact is lost with at least one of the positive electrode and the negative electrode, a source meter coupled to the programmable switch box and measuring the I-V characteristics of the substrate.Type: GrantFiled: March 25, 2013Date of Patent: October 8, 2013Assignee: Intermolecular, Inc.Inventors: Yun Wang, Tony P. Chiang, Chi-I Lang
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Patent number: 8551560Abstract: Methods for improving selective deposition of a capping layer on a patterned substrate are presented, the method including: receiving the patterned substrate, the patterned substrate including a conductive region and a dielectric region; forming a molecular masking layer (MML) on the dielectric region; preparing an electroless (ELESS) plating bath, where the ELESS plating bath includes: a cobalt (Co) ion source: a complexing agent: a buffer: a tungsten (W) ion source: and a reducing agent; and reacting the patterned substrate with the ELESS plating bath for an ELESS period at an ELESS temperature and an ELESS pH so that the capping layer is selectively formed on the conductive region. In some embodiments, methods further include a pH adjuster for adjusting the ELESS pH to a range of approximately 9.0 pH to 9.2 pH. In some embodiments, the pH adjuster is tetramethylammonium hydroxide (TMAH). In some embodiments, the MML is hydrophilic.Type: GrantFiled: May 22, 2009Date of Patent: October 8, 2013Assignee: Intermolecular, Inc.Inventors: Jinhong Tong, Zhi-Wen Sun, Chi-I Lang, Nitin Kumar, Bob Kong, Zachary Fresco
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Publication number: 20130260508Abstract: Resistive switching memory elements are provided that may contain electroless metal electrodes and metal oxides formed from electroless metal. The resistive switching memory elements may exhibit bistability and may be used in high-density multi-layer memory integrated circuits. Electroless conductive materials such as nickel-based materials may be selectively deposited on a conductor on a silicon wafer or other suitable substrate. The electroless conductive materials can be oxidized to form a metal oxide for a resistive switching memory element. Multiple layers of conductive materials can be deposited each of which has a different oxidation rate. The differential oxidization rates of the conductive layers can be exploited to ensure that metal oxide layers of desired thicknesses are formed during fabrication.Type: ApplicationFiled: June 4, 2013Publication date: October 3, 2013Inventors: Nitin Kumar, Tony P. Chiang, Chi-I Lang, Zhi-Wen Wen Sun, Jinhong Tong
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Patent number: 8535972Abstract: Methods of modifying a patterned semiconductor substrate are presented including: providing a patterned semiconductor substrate surface including a dielectric region and a conductive region; and applying an amphiphilic surface modifier to the dielectric region to modify the dielectric region. In some embodiments, modifying the dielectric region includes modifying a wetting angle of the dielectric region. In some embodiments, modifying the wetting angle includes making a surface of the dielectric region hydrophilic. In some embodiments, methods further include applying an aqueous solution to the patterned semiconductor substrate surface. In some embodiments, the conductive region is selectively enhanced by the aqueous solution. In some embodiments, methods further include providing the dielectric region formed of a low-k dielectric material. In some embodiments, applying the amphiphilic surface modifier modifies an interaction of the low-k dielectric region with a subsequent process.Type: GrantFiled: July 11, 2008Date of Patent: September 17, 2013Assignee: Intermolecular, Inc.Inventors: Zachary M. Fresco, Chi-I Lang, Jinhong Tong, Anh Duong, Nitin Kumar, Anna Tsimelzon, Tony Chiang
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Publication number: 20130230962Abstract: Methods for forming a NiO film on a substrate for use with a resistive switching memory device are presenting including: preparing a nickel ion solution; receiving the substrate, where the substrate includes a bottom electrode, the bottom electrode utilized as a cathode; forming a Ni(OH)2 film on the substrate, where the forming the Ni(OH)2 occurs at the cathode; and annealing the Ni(OH)2 film to form the NiO film, where the NiO film forms a portion of a resistive switching memory element. In some embodiments, methods further include forming a top electrode on the NiO film and before the forming the Ni(OH)2 film, pretreating the substrate. In some embodiments, methods are presented where the bottom electrode and the top electrode are a conductive material.Type: ApplicationFiled: September 4, 2012Publication date: September 5, 2013Applicant: Intermolecular, Inc.Inventors: Zhi-Wen Sun, Jinhong Tong, Chi-I Lang, Tony Chiang
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Patent number: 8481403Abstract: Methods of this invention relate to filling gaps on substrates with a solid dielectric material by forming a flowable film in the gap. The flowable film provides consistent, void-free gap fill. The film is then converted to a solid dielectric material. In this manner gaps on the substrate are filled with a solid dielectric material. According to various embodiments, the methods involve reacting a dielectric precursor with an oxidant to form the dielectric material. In certain embodiments, the dielectric precursor condenses and subsequently reacts with the oxidant to form dielectric material. In certain embodiments, vapor phase reactants react to form a condensed flowable film.Type: GrantFiled: January 4, 2011Date of Patent: July 9, 2013Assignee: Novellus Systems, Inc.Inventors: Vishal Gauri, Raashina Humayun, Chi-I Lang, Judy H. Huang, Michael Barnes, Sunil Shanker
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Publication number: 20130171350Abstract: A metal-organic chemical vapor deposition (MOCVD) system is provided for high throughput processing. The system comprises a chamber containing a substrate support system comprising a plurality of substrate support planets operable to support one or more substrates, and a gas emission system operable to provide a plurality of isolated environments suitable for depositing uniform layers on the substrates. The MOCVD system is operable to independently vary one or more process parameters in each isolated environment, and to provide common process parameters to all substrates for depositing one or more layers on all substrates. Methods of forming uniform layers on a substrate are provided wherein at least one of the layers is deposited in an isolated environment.Type: ApplicationFiled: December 29, 2011Publication date: July 4, 2013Applicant: Intermolecular Inc.Inventors: Philip A. Kraus, Tony P. Chiang, Timothy Joseph Franklin, Chi-I Lang, Sandeep Nijhawan
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Publication number: 20130167773Abstract: Apparatuses and methods for high-deposition-rate sputtering for depositing layers onto a substrate are disclosed. The apparatuses generally comprise a process chamber; one or more sputtering sources disposed within the process chamber, wherein each sputtering source comprises a sputtering target; a substrate support disposed within the process chamber; a shield positioned between the sputtering sources and the substrate, the shield comprising an aperture positioned under each sputtering source; and a transport system connected to the substrate support capable of positioning the substrate such that one of a plurality of site-isolated regions on the substrate can be exposed to sputtered material through the aperture positioned under each of the sputtering sources; wherein the spacing between the sputtering target and the substrate is less than 100 mm. The apparatus enables high deposition rate sputtering onto site-isolated regions on the substrate.Type: ApplicationFiled: December 29, 2011Publication date: July 4, 2013Applicant: Intermolecular Inc.Inventors: Hong Sheng Yang, Zhendong Hong, Chi-I Lang
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Patent number: 8476107Abstract: Resistive switching memory elements are provided that may contain electroless metal electrodes and metal oxides formed from electroless metal. The resistive switching memory elements may exhibit bistability and may be used in high-density multi-layer memory integrated circuits. Electroless conductive materials such as nickel-based materials may be selectively deposited on a conductor on a silicon wafer or other suitable substrate. The electroless conductive materials can be oxidized to form a metal oxide for a resistive switching memory element. Multiple layers of conductive materials can be deposited each of which has a different oxidation rate. The differential oxidization rates of the conductive layers can be exploited to ensure that metal oxide layers of desired thicknesses are formed during fabrication.Type: GrantFiled: April 28, 2011Date of Patent: July 2, 2013Assignee: Intermolecular, Inc.Inventors: Nitin Kumar, Chi-I Lang, Tony Chiang, Zhi-Wen Sun, Jinhong Tong
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Publication number: 20130162995Abstract: A method of measuring the thickness of a one or more layers using ellipsometry is presented which overcomes problems with fitting a model to data collected in the presence of a top surface having a surface roughness (peak-to-trough) greater than about 100 ?. Prior to measurement, the top layer is pretreated to form an oxide layer of thickness between about 15 ? and about 30 ?. Ellipsometry data as a function of wavelength is then collected, and the ellipsometry data is fitted to a model including the oxide layer. For layers of doped polycrystalline silicon layers with a rough surface, the model comprises a layer consisting of a mixture of polycrystalline silicon and amorphous silicon and a top layer consisting of a mixture of polycrystalline silicon and silicon dioxide, and the pretreatment can be performed for about 10 minutes at 600 C in an oxygen atmosphere.Type: ApplicationFiled: December 27, 2011Publication date: June 27, 2013Applicant: Intermolecular, Inc.Inventors: Shuogang Huang, Chi-I Lang, Jeffrey Chih-Hou Lowe, Wen-Guang Yu
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Publication number: 20130146442Abstract: In one aspect of the invention, a sputter source is provided. The sputter source includes a target source affixed to a bottom plate of the sputter source. A plurality of magnets spaced apart from each other is included. The plurality of magnets is disposed above a surface of the bottom plate, wherein a surface of the target source is profiled such that the target source has a minimum thickness aligned with an axis of each of the plurality of magnets and a maximum thickness aligned with an axis of a gap defined between each of the plurality of magnets. A method of processing a substrate is also included.Type: ApplicationFiled: December 9, 2011Publication date: June 13, 2013Applicant: INTERMOLECULAR, INC.Inventors: HONG SHENG YANG, CHI-I LANG