Abstract: A multi-layered complementary conductive line structure, a manufacturing method thereof and a manufacturing method of a TFT (thin film transistor) display array are provided. The process of TFT having multi-layered complementary conductive line structures does not need to increase the mask number in comparison with the currently process and is able to solve the resistance problem of the lines inside a display.

Abstract: A multi-layered wire structure includes a substrate, a plurality of first conductive lines formed in a first layer over the substrate extending in parallel to each other in a first direction, a plurality of second conductive lines formed in a second layer over the first layer extending in parallel to each other in a second direction orthogonal to the first direction, a plurality of sets of third conductive lines formed in the second layer extending in the first direction, each set of third conductive lines corresponding to one of the first conductive lines, and a plurality of sets of conductive paths formed between the first layer and the second layer, each set of conductive paths corresponding to one of the first conductive lines and one set of third conductive lines and electrically connecting the corresponding first conductive line to the corresponding set of third conductive lines.

Abstract: A method for manufacturing a flexible panel is disclosed, which has the following steps. First, a first substrate having a plurality of functional switches or conducting lines thereon is provided. Then, a second substrate is bonded on the functional switches or conducting lines, and the first substrate is thinned to a predetermined thickness subsequently. Afterwards, a flexible third substrate is adhered on the first substrate, wherein the first substrate is sandwiched between the second substrate and the third substrate. Finally, the second substrate is removed.

Abstract: A method for manufacturing a flexible panel is disclosed, which has the following steps. First, a first substrate having a plurality of functional switches or conducting lines thereon is provided. Then, a second substrate is bonded on the functional switches or conducting lines, and the first substrate is thinned to a predetermined thickness subsequently. Afterwards, a flexible third substrate is adhered on the first substrate, wherein the first substrate is sandwiched between the second substrate and the third substrate. Finally, the second substrate is removed.

Abstract: A method of forming poly-silicon thin film transistors is described. An amorphous silicon thin film transistor is formed on a substrate, and then the Infrared (IR) heating process is used. A gate metal and source/drain metal are heated rapidly, and conduct heat energy to an amorphous silicon layer. Next, crystallization occurs in the amorphous silicon layer to form poly-silicon. Therefore a poly-silicon thin film transistor is produced.

Abstract: A method of forming poly-silicon thin film transistors is described. An amorphous silicon thin film transistor is formed on a substrate, and then the Infrared (IR) heating process is used. A gate metal and source/drain metal are heated rapidly, and conduct heat energy to an amorphous silicon layer. Next, crystallization occurs in the amorphous silicon layer to form poly-silicon. Therefore a poly-silicon thin film transistor is produced.

Abstract: An amorphous silicon (a-Si) layer is first formed on a substrate, and the a-Si layer is next patterned to form silicon islands for defining device active regions. Then, a single shot laser beam with long pulse is utilized to irradiate each silicon island, and lateral growth crystallization is induced in each silicon island for transforming a-Si into polycrystalline silicon (poly-Si). Finally, the general subsequent processes for thin film transistor (TFT) fabrication are performed in turn to fabricate poly-Si TFTs.

Abstract: A method of fabricating a thin film transistor (TFT) array involves ion replacement by oxidation-reduction processes for implementing the metal wiring layout of TFT-LCDs. This can overcome metal etching difficulties and achieve automatic alignment. The method of the invention replaces traditional lithographic etching techniciues.

Abstract: An amorphous silicon layer and at least a heat-retaining layer are formed on a substrate in turn. Wherein, the heat-retaining layer is controlled to have an anti-reflective thickness for reducing the threshold laser energy to effect the melting of the amorphous silicon layer. Then, a laser irradiation process is performed to transform the amorphous silicon layer into a polycrystalline silicon layer. During the laser irratiation process, a portion of the laser energy transmits the heat-retaining layer to effect the melting of the amorphous silicon layer, and another portion of the laser energy is absorbed by the heat-retaining layer.

Abstract: A buffer layer, a protective layer and a poly-silicon layer are formed on a substrate in turn, and the poly-silicon layer is then patterned to form island active regions. Next, n-type ions are implanted into portions of the poly-silicon layer to form source/drain regions. Then, a dilute buffer oxide etchant is utilized to micro-etch the poly-silicon layer to change the surface morphology of the poly-silicon. Finally, a laser annealing process is performed to partially melt the poly-silicon for forming a smooth surface and activating the source/drain region of the poly-silicon simultaneously.

Abstract: A method for planarizing polysilicon comprises providing a substrate, forming a dielectric layer on the substrate, forming an amorphous silicon film on the dielectric layer, etching the amorphous silicon film to remove native oxide formed on a surface of the amorphous silicon film, exposing the surface of the amorphous silicon film to a first radiation source to polycrystallize the amorphous silicon film into a polysilicon film, etching the polysilicon film to remove weak bonded silicon formed on a surface of the polysilicon film, and exposing the surface of the polysilicon film to a second radiation source to reflow the polysilicon film.

Abstract: An amorphous silicon layer is formed on a substrate, and then a protective layer and a reflective layer are formed in turn to form a film stack on portions of the amorphous silicon layer. The reflective layer is a metal material with reflectivity of laser, and the protective layer is able to prevent metal diffusion. When an excimer laser heats the amorphous silicon layer to crystallize the amorphous silicon, nucleation sites are formed in the amorphous silicon layer under the film stack of the protective layer and the reflective layer. Next, laterally expanding crystallization occurs in the amorphous silicon layer to form poly-silicon having crystal grains with size of micrometers and high grain order.

Abstract: The present invention relates to a heating plate crystallization method used in the crystallization process for the poly-silicon thin-film transistor, and more particularly, the present invention relates to a heating plate crystallization method by using a pulsed rapid thermal annealing process (PRTP). By means of the characteristic provided by the present invention, namely, the heating plate area has a better absorption rate to the infrared rays and has a high thermal stability. The heating plate area is used for absorbing the infrared rays, and after the heating, the energy is indirectly transferred to the amorphous layer via a thermal conduction method so that the amorphous layer will be rapidly crystallized to form the poly-silicon. Furthermore, the present invention uses the pulsed rapid thermal annealing process (PRTP) using the infrared rays to instantly heat, to selectively heat the materials by taking the advantage that different materials have different absorption rates to the infrared rays.

Abstract: A multi-layered wire structure includes a substrate, a plurality of first conductive lines formed in a first layer over the substrate extending in parallel to each other in a first direction, a plurality of second conductive lines formed in a second layer over the first layer extending in parallel to each other in a second direction orthogonal to the first direction, a plurality of sets of third conductive lines formed in the second layer extending in the first direction, each set of third conductive lines corresponding to one of the first conductive lines, and a plurality of sets of conductive paths formed between the first layer and the second layer, each set of conductive paths corresponding to one of the first conductive lines and one set of third conductive lines and electrically connecting the corresponding first conductive line to the corresponding set of third conductive lines.

Abstract: An amorphous silicon layer is formed on a substrate, and then a protective layer and a reflective layer are formed in turn to form a film stack on portions of the amorphous silicon layer. The reflective layer is a metal material with reflectivity of laser, and the protective layer is able to prevent metal diffusion. When an excimer laser heats the amorphous silicon layer to crystallize the amorphous silicon, nucleation sites are formed in the amorphous silicon layer under the film stack of the protective layer and the reflective layer. Next, laterally expanding crystallization occurs in the amorphous silicon layer to form poly-silicon having crystal grains with size of micrometers and high grain order.

Abstract: A method for manufacturing a flexible panel is disclosed, which has the following steps. First, a first substrate having a plurality of functional switches or conducting lines thereon is provided. Then, a second substrate is bonded on the functional switches or conducting lines, and the first substrate is thinned to a predetermined thickness subsequently. Afterwards, a flexible third substrate is adhered on the first substrate, wherein the first substrate is sandwiched between the second substrate and the third substrate. Finally, the second substrate is removed.

Abstract: A heat sink layer is formed on portions of a substrate, and then an amorphous silicon layer is formed thereon. The heat coefficient of the heat sink layer is greater than that of the substrate. When an excimer laser heats the amorphous silicon layer to crystallize the amorphous silicon, nucleation sites are formed in the amorphous silicon layer on the heat sink layer. Next, laterally expanding crystallization occurs in the amorphous silicon layer on the substrate to form polysilicon having a crystal size of a micrometer.

Abstract: A method of forming poly-silicon thin film transistors is described. An amorphous silicon thin film transistor is formed on a substrate, and then the Infrared (IR) heating process is used. A gate metal and source/drain metal are heated rapidly, and conduct heat energy to an amorphous silicon layer. Next, crystallization occurs in the amorphous silicon layer to form poly-silicon. Therefore a poly-silicon thin film transistor is produced.

Abstract: A multi-layered complementary wire structure and a manufacturing method thereof are disclosed, comprising a first wire and a second wire. Each of the first and the second wires comprises a main line and a plurality of branch lines located in a different layer from the main line. A plurality contact holes are formed in an insulating layer between the first wire and the second wire to connect the main line of the first wire and the branch lines of the first wire, and connect the main line of the second wire and the branch lines of the second wire. The main line of the first wire is insulated and crossed with the main line of the second wire. The main line of the first wire and the branch lines of the second wire are insulated with each other and located in the same layer. The main line of the second wire and the branch lines of the first wire are insulated with each other and located in the same layer.

Abstract: A method of fabricating thin film transistor TFT array discloses ions of desired-plated metal and the graphs of the desired-plated area are made by oxidation-reduction materials processes ion replacement for implementing the metal wiring layout of the TFT-LCDs. This, therefore, can overcome the problem of uneasy metal etching thereto achieves the purpose of an automatic alignment. The method uses the ability of the oxidation-reduction reaction to implement the replacement for alternating the lithography etching process in the metal wiring layout as presented in the traditional technique.