Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a substrate having one or more devices formed thereon, one or more bonding pads disposed over the substrate, and a first passivation layer disposed over the one or more bonding pads. The first passivation layer includes a first passivation sublayer having a first dielectric material, a second passivation sublayer disposed over the first passivation sublayer, and the second passivation sublayer has a second dielectric material different from the first dielectric material. The first passivation layer further includes a third passivation sublayer disposed over the second passivation sublayer, and the third passivation sublayer has a third dielectric material different from the second dielectric material. At least two of the first, second, and third passivation sublayers each includes a nitride.

Abstract: A semiconductor device structure is provided. The device includes a dielectric layer over a substrate. The substrate has a fin structure, and the dielectric layer has a trench exposing a portion of the fin structure. The includes a gate material layer in the trench. The gate material has a topmost surface that is highly planar.

Abstract: In an embodiment, a method includes: forming a first fin extending from a substrate; forming a second fin extending from the substrate, the second fin being spaced apart from the first fin by a first distance; forming a metal gate stack over the first fin and the second fin; depositing a first inter-layer dielectric over the metal gate stack; and forming a gate contact extending through the first inter-layer dielectric to physically contact the metal gate stack, the gate contact being laterally disposed between the first fin and the second fin, the gate contact being spaced apart from the first fin by a second distance, where the second distance is less than a second predetermined threshold when the first distance is greater than or equal to a first predetermined threshold.

Abstract: In order to reduce the incidence of stress concentration areas in an etched opening, a thinner polyimide layer is deposited to minimize gap formation therein, and a descum process is then performed to increase the angle of the presented layer surface. Reduction of the stress in this manner reduces the incidence of cracking of the later formed metal contact, which improves the overall pass rates of semiconductor devices so manufactured.

Abstract: Embodiments of the present disclosure relate to a CMP tool and methods for planarization a substrate. Particularly, embodiments of the present disclosure relate to an in-situ defect data analyzer to identify CMP induced defects during polishing processing and cleaning processing performed in the CMP tool. In some embodiments, the CMP tool includes an AI (artificial intelligence)-assisted defect database. The defect database may be used to identify and classify CMP related defects, such as scratch, fall-on slurry residuals, during polishing or cleaning process. As a result, defect warning cycle time for a CMP process is improved significantly.

Abstract: A manufacturing method of a package structure including the following steps is provided. A carrier is provided. An anti-warpage structure is formed on the carrier. And a redistribution layer is formed on the carrier. In the normal direction of the carrier, a warpage trend of the anti-warpage structure is opposite to a warpage trend of the redistribution layer.

Abstract: An electronic device with a flash function and a driving method of a flash are provided. The electronic device includes a flash, an image sensor, and a processor. The flash has a red light source, a green light source, and a blue light source. The image sensor is configured to obtain a preview image of a current scene and outputting the raw data of the preview image. The processor obtains a red ratio value and a blue ratio value according to the current scene, and the processor determines the green brightness value, red brightness value and blue brightness value according to the red ratio value, the blue ratio value and an exposure sensitivity for obtaining the preview image. The processor drives the flash according to the calculated red brightness value, the calculated green brightness value, and the calculated blue brightness value.

Abstract: The present invention relates to compositions and methods for selectively etching silicon nitride in the presence of silicon oxide, polysilicon and/or metal silicides at a high etch rate and with high selectivity. Additives are described that can be used at various dissolved silica loading windows to provide and maintain the high selective etch rate and selectivity.

Abstract: The present disclosure generally provides an apparatus and method for gas diffuser support structure for a vacuum chamber. The gas diffuser support structure comprises a backing plate having a central bore, and a gas deflector having a length and a width unequal to the length coupled to the backing plate by a plurality of outward fasteners coupled to a plurality of outward threaded holes formed in the backing plate, in which a spacer is disposed between the backing plate and the gas deflector, and in which a length to width ratio of the gas deflector is about 0.1:1 to about 10:1.

Abstract: The present invention belongs to the technical field of antibacterial drugs, and discloses a pyrrolylacylpiperidylamine compound and use thereof. The present invention in particular relates to a pyrrolylacylpiperidylamine compound and a pharmaceutically acceptable salt thereof, and use thereof in the preparation of a medicament for resisting infections with bacteria, mycoplasma or chlamydia.

Abstract: A plasma flood gun includes a filament to emit first electrons based on a first filament current induced in the filament to heat the filament to a first temperature at a first time. The first electrons interact with an inert gas in an arc plasma chamber to generate a first plasma. A filament resistance meter measures a first filament resistance of the filament, in-situ, during generation of the first plasma. A filament current source adjusts, based on the first filament resistance, the first filament current induced in the filament at the first time to a second filament current induced in the filament at a second time to generate a second plasma in the arc plasma chamber at the second time.

Abstract: Systems and techniques are described herein for modifying the scale and/or position of objects in images. For instance, a system can obtain a two-dimensional (2D) input image from a camera and a three-dimensional (3D) representation of the 2D input image. The system can further determine a first portion of the 3D representation of the 2D input image corresponding to a target object in the 2D input image. The system can adjust a pose of the first portion of the 3D representation of the 2D input image corresponding to the target object. The system can further generate a 2D output image having a modified version of the target object based on the adjusted pose of the first portion of the 3D representation of the 2D input image corresponding to the target object to be output on a display.

Abstract: An integrated circuit includes a semiconductor substrate, an isolation region extending into, and overlying a bulk portion of, the semiconductor substrate, a buried conductive track comprising a portion in the isolation region, and a transistor having a source/drain region and a gate electrode. The source/drain region or the gate electrode is connected to the buried conductive track.

Abstract: Account delegation is provided. A request for access to a secure system using an owner's account is received from an applier via a browser supplement module on the applier's computing device. The request is communicated to the account owner via a browser supplement module on the account owner's computing device. Approval of the request is received from the account owner. The secure system is logged into using the account owner's credential. A connection to the applier's computing device is established to act as a proxy for communication between the secure system and the applier's computing device. Further provided herein are a computer system and a computer program product for performing the method.

Abstract: A method for preparing high-toughness heat-resistant aluminum alloy armature material, comprises: heating and melting an aluminum ingot into an aluminum liquid; adding the following elements to the aluminum solution in mass percent: Ce 6-12%, Y 5-9.5%, Zr 0.5-3%, Mg 0.1-2.5%, X 0.15-2.5%, Fe 0.15-0.25%, Mn 0.05-0.15%, and Si 0.1-0.5%; forming an alloy solution and casting same into an alloy ingot; processing the alloy ingot into spherical alloy powder; subjecting the spherical alloy powder to selective laser melting and solidification forming to produce nano-scale Al11Ce3, Al3(Y, Zr), and/or Al3X intermetallic compounds distributed in a net-like skeleton structure in an aluminum matrix. The material of the present disclosure has low density, high-temperature resistance, high energy absorption rate and excellent electrical conductivity, and excellent mechanical properties at room temperature and high temperature.

Abstract: An LDMOS transistor device includes a stepped isolation structure over a substrate, a gate electrode disposed over a portion of the stepped isolation structure, a source region disposed in the substrate, and a drain region disposed in the substrate. The stepped isolation structure includes a first portion having a first thickness, and a second portion having a second thickness greater than the first thickness. The second portion includes dopants. The drain region is adjacent to the stepped isolation structure.

Abstract: The present disclosure provides a photonic integrated circuit chip. The photonic integrated circuit chip comprises a plurality of connection ports, multiple polarization beam splitting structures, a photodetector structure, an interleaver and a modulator. The plurality of connection ports are used to receive a plurality of first optical signals to the photonic integrated circuit chip. The multiple polarization beam splitting structures each are used to split the first optical signal passing through the polarization beam splitting structure into a first mode optical signal and a second mode optical signal. The photodetector structure comprises a first component for split beam and a second component for split beam. The interleaver is used to transfer the first mode optical signal or the second mode optical signal to the second component for split beam. The modulator is used to transfer second optical signals with different wavelengths to the interleaver.

Abstract: A light-curing resin composition, a three-dimensional object containing the same, and a manufacturing method of the three-dimensional object are provided. The light-curing resin composition includes a photoinitiator, an acrylic oligomer, an acrylic monomer, and expandable particles with hollow spherical shell structures. The acrylic monomer is a monofunctional monomer, a difunctional monomer, or a combination thereof.

Abstract: Solutions for selective removal of polymer chains from layers of block copolymers and related methods are provided. A layer of a block copolymer comprises a plurality of polymer domains, each of the polymer domains comprise a first region and a second region. The first region comprises first polymer chains. The second region comprises second polymer chains. The solution is configured to remove a greater proportion of the second polymer chains than the first polymer chains, sufficient to increase or rectify at least one dimension of the plurality of polymer domains.