Patents by Inventor Chi Wu

Chi Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11848445
    Abstract: A rechargeable transition metal battery includes a negative electrode, a positive electrode and an electrolyte. The negative electrode includes a negative electrode material which is a transition metal or an alloy of the transition metal. The positive electrode is electrically connected to the negative electrode and includes a host material and a positive electrode material. The host material includes a carbon. The positive electrode material is connected to the host material, and the positive electrode material is a compound of a metal, an elemental chalcogen or an elemental halogen. The electrolyte is disposed between the positive electrode and the negative electrode.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: December 19, 2023
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Yu-Lun Chueh, Shu-Chi Wu
  • Patent number: 11848971
    Abstract: A data sharing method includes logging in a first account through a communication interface by a first receiver for establishing a link between the first receiver and a server corresponding to the communication interface, logging in a second account through the communication interface by a second receiver for establishing a link between the second receiver and the server corresponding to the communication interface, and transmitting image data from a first transmitter to the second receiver through the first receiver and the server for sharing the image data. The first receiver is linked to a first display. The second receiver is linked to a second display. The image data is shared with the first display and the second display.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: December 19, 2023
    Assignee: BenQ Corporation
    Inventors: Chen-Chi Wu, Chin-Fu Chiang, Chia-Nan Shih, Lin-Yuan You, Jung-Kun Tseng, Chuang-Wei Wu
  • Patent number: 11849253
    Abstract: A transmitter device applied to a conference system is disclosed. The conference system further includes a receiver device. The receiver device wirelessly receives an image signal transmitted by the transmitter device, and a display coupled to the receiver device displays the image signal. The transmitter device includes a memory storing an identity information corresponding to an authority of the transmitter device. When the transmitter device is coupled to an information processing device, the transmitter device transmits the identity information to the information processing device. An application driver of the information processing device determines the authority of the transmitter device according to the identity information.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: December 19, 2023
    Assignee: BENQ CORPORATION
    Inventors: Cheng-Pu Lin, Chen-Chi Wu, Chia-Nan Shih, Chin-Fu Chiang, Jung-Kun Tseng, Chuang-Wei Wu
  • Patent number: 11849156
    Abstract: A data sharing method includes providing a receiver and at least one transmitter, changing a first hardware registration identification code of the at least one transmitter to a second hardware registration identification code of a virtual camera device corresponding to at least one communication software program by the receiver, and using the virtual camera device for converting at least one image data signal transmitted from the at least one transmitter to video stream data supported by the at least one communication software program after the receiver receives the at least one image data signal.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: December 19, 2023
    Assignee: BenQ Corporation
    Inventors: Chen-Chi Wu, Chia-Nan Shih, Chin-Fu Chiang, Chuang-Wei Wu, Jung-Kun Tseng
  • Publication number: 20230402398
    Abstract: An electronic package is provided, in which a package module and a shielding member are disposed on a carrier structure, such that the shielding member covers a top surface and side surfaces of the package module to block the radiation outward from the package module and prevent problem that other electronic components on the carrier structure cannot be transmitted signals normally due to the electromagnetic interference of the package module.
    Type: Application
    Filed: August 29, 2022
    Publication date: December 14, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Che-Chi Wu, Chien-Tang Li
  • Publication number: 20230395689
    Abstract: A method for fabricating a semiconductor component includes forming an interlayer dielectric (ILD) layer on a substrate, forming a trench in the interlayer dielectric layer, forming a metal gate in the trench, removing a portion of the metal gate protruding from the ILD layer, reacting a reducing gas with the metal gate, and removing a top portion of the metal gate.
    Type: Application
    Filed: July 25, 2023
    Publication date: December 7, 2023
    Inventors: Po-Chi Wu, Chai-Wei Chang, Jung-Jui Li, Ya-Lan Chang, Yi-Cheng Chao
  • Publication number: 20230387111
    Abstract: An integrated circuit (IC) with active and dummy device cell arrays and a method of fabricating the same are discloses. The IC includes a substrate, an active device cell, and a dummy device cell. The active device cell includes an array of source/drain (S/D) regions of a first conductivity type disposed on or within the substrate and an array of gate structures with a first gate fill material disposed on the substrate. The dummy device cell includes a first array of S/D regions of the first conductivity type disposed on or within the substrate, a second array of S/D regions of a second conductivity type disposed on or within the substrate, and an array of dual gate structures disposed on the substrate. Each of the dual gate structures includes the first gate fill material and a second gate fill material that is different from the first gate fill material.
    Type: Application
    Filed: August 9, 2023
    Publication date: November 30, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kai-Chi WU, Ching-Hung Kao, Meng-I Kang, Kuo-Fang Ting
  • Publication number: 20230389231
    Abstract: The present disclosure provides an immersion cooling system for a server cabinet including a plurality of server boxes, a cooling tank and a plurality of liquid connecting pipes. Each server box includes an electronic device immersed in the cooling liquid, and the electronic device generates a thermal energy so that part of the cooling liquid evaporates into a hot vapor. The cooling tank is connected to the plurality of server boxes and includes a condenser and a storage part. The condenser is connected to each server box and condenses the hot vapor to form the cooling liquid. The storage part storages the cooling liquid from the condenser. Two ends of the liquid connecting pipe is connected to the storage part and the server box respectively. The cooling liquid in the storage part and the cooling liquid of each server box are maintained in a same liquid level.
    Type: Application
    Filed: August 8, 2022
    Publication date: November 30, 2023
    Inventors: Li-Hsiu Chen, Ming-Tang Yang, Wei-Chih Lin, Peng-Yuan Chen, Sheng-Chi Wu, Ren-Chun Chang, Wen-Yin Tsai
  • Publication number: 20230387107
    Abstract: A method includes: etching a trench on a surface of a substrate; filling the trench with a dielectric material to form a first isolation region; depositing a patterned mask layer on the substrate, the patterned mask layer comprising an opening exposing the substrate; implanting oxygen into the substrate through the opening to form an implant region; generating a second isolation region from the implant region; and forming a transistor on the substrate. The transistor includes a channel laterally surrounding the second isolation region.
    Type: Application
    Filed: May 26, 2022
    Publication date: November 30, 2023
    Inventors: YUAN-CHENG YANG, YUN-CHI WU, TSU-HSIU PERNG, SHIH-JUNG TU, CHENG-BO SHU, CHIA-CHEN CHANG
  • Publication number: 20230387150
    Abstract: An image sensor with high quantum efficiency is provided. In some embodiments, a semiconductor substrate includes a non-porous semiconductor layer along a front side of the semiconductor substrate. A periodic structure is along a back side of the semiconductor substrate. A high absorption layer lines the periodic structure on the back side of the semiconductor substrate. The high absorption layer is a semiconductor material with an energy bandgap less than that of the non-porous semiconductor layer. A photodetector is in the semiconductor substrate and the high absorption layer. A method for manufacturing the image sensor is also provided.
    Type: Application
    Filed: August 3, 2023
    Publication date: November 30, 2023
    Inventors: Chien-Chang Huang, Chien Nan Tu, Ming-Chi Wu, Yu-Lung Yeh, Ji Heng Jiang
  • Patent number: 11830892
    Abstract: An image sensor with high quantum efficiency is provided. In some embodiments, a semiconductor substrate includes a non-porous semiconductor layer along a front side of the semiconductor substrate. A periodic structure is along a back side of the semiconductor substrate. A high absorption layer lines the periodic structure on the back side of the semiconductor substrate. The high absorption layer is a semiconductor material with an energy bandgap less than that of the non-porous semiconductor layer. A photodetector is in the semiconductor substrate and the high absorption layer. A method for manufacturing the image sensor is also provided.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: November 28, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Chang Huang, Chien Nan Tu, Ming-Chi Wu, Yu-Lung Yeh, Ji Heng Jiang
  • Publication number: 20230369009
    Abstract: A plasma flood gun includes a filament to emit first electrons based on a first filament current induced in the filament to heat the filament to a first temperature at a first time. The first electrons interact with an inert gas in an arc plasma chamber to generate a first plasma. A filament resistance meter measures a first filament resistance of the filament, in-situ, during generation of the first plasma. A filament current source adjusts, based on the first filament resistance, the first filament current induced in the filament at the first time to a second filament current induced in the filament at a second time to generate a second plasma in the arc plasma chamber at the second time.
    Type: Application
    Filed: May 12, 2022
    Publication date: November 16, 2023
    Inventors: Kai-Yun Yang, Chen Chi Wu, Ching I Li, Min-Chang Ching, Hung-Ta Huang
  • Patent number: 11818503
    Abstract: A conference system with low standby power consumption includes a transmitter, an image data source, a receiver, and a display device. The transmitter includes a battery for providing power, at least one link port for accessing data, and a processor coupled to the battery and the at least one link port. The image data source is used for transmitting the image data to the transmitter. The receiver is linked to the transmitter for receiving the image data. The display device is linked to the receiver for displaying the image data. When the transmitter and the image data source are electrically coupled, the processor ceases to use the battery of the transmitter and controls the image data source for providing power to the transmitter. When the transmitter and the image data source are separated, the processor uses the battery of the transmitter for driving firmware of the transmitter.
    Type: Grant
    Filed: June 8, 2022
    Date of Patent: November 14, 2023
    Assignee: BenQ Corporation
    Inventors: Chia-Nan Shih, Chen-Chi Wu, Chin-Fu Chiang, Chuang-Wei Wu, Jung-Kun Tseng
  • Patent number: 11810923
    Abstract: A pixel array substrate includes data lines, first gate lines, pixel structures, first common lines, and conductive line sets. The conductive line sets are arranged in a first direction. Each of the conductive line sets includes first conductive line groups and a second conductive line group sequentially arranged in the first direction. Each of the first conductive line groups includes second gate lines and a second common line. The second conductive line group includes first auxiliary lines and a second common line. An arrangement order of the second gate lines and the second common line of each of the first conductive line groups in the first direction are the same as an arrangement order of the first auxiliary lines and the second common line of the second conductive line group in the first direction, respectively.
    Type: Grant
    Filed: February 22, 2023
    Date of Patent: November 7, 2023
    Assignee: AUO Corporation
    Inventors: Ping-Wen Chen, Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Yueh-Chi Wu, Shu-Wen Liao, Ti-Kuei Yu, Ya-Ling Hsu, Chen-Hsien Liao
  • Publication number: 20230343648
    Abstract: An improved work function layer and a method of forming the same are disclosed. In an embodiment, the method includes forming a semiconductor fin extending from a substrate; depositing a dielectric layer over the semiconductor fin; depositing a first work function layer over the dielectric layer; and exposing the first work function layer to a metastable plasma of a first reaction gas, a metastable plasma of a generation gas, and a metastable plasma of a second reaction gas, the first reaction gas being different from the second reaction gas.
    Type: Application
    Filed: June 30, 2023
    Publication date: October 26, 2023
    Inventors: Shao-Jyun Wu, Hung-Chi Wu, Chia-Ching Lee, Pin-Hsuan Yeh, Hung-Chin Chung, Hsien-Ming Lee, Chien-Hao Chen, Sheng-Liang Pan, Huan-Just Lin
  • Patent number: 11798836
    Abstract: A semiconductor isolation structure includes a silicon-on-insulator wafer, a first deep trench isolation structure and a second deep trench isolation structure. The silicon-on-insulator wafer includes a semiconductor substrate, a buried insulation layer disposed on the semiconductor substrate, and a semiconductor layer disposed on the buried insulation layer. The semiconductor layer has a functional region. The first deep trench isolation structure penetrates the semiconductor layer and the buried insulation layer, and surrounds the functional region. The second deep trench isolation structure penetrates semiconductor layer and the buried insulation layer, and surrounds the first deep trench isolation structure.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: October 24, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsung-Yu Yang, Po-Wei Liu, Yun-Chi Wu, Yu-Wen Tseng, Chia-Ta Hsieh, Ping-Cheng Li, Tsung-Hua Yang, Yu-Chun Chang
  • Publication number: 20230335751
    Abstract: The present invention provides an auxiliary film comprising a body and a plurality of microstructures formed on a first surface of the body, the microstructures include a concave-convex appearance on the first surface, and the microstructures have two ends extending to the periphery of the first surface respectively. When the auxiliary film is attached to a pre-protected surface of a substrate, the microstructures and the surface of the substrate form several open air channels to increase the separation efficiency of the main body from the substrate and reduce the overall process time.
    Type: Application
    Filed: April 14, 2023
    Publication date: October 19, 2023
    Inventors: SZU-NAN YANG, CHEN-CHI WU, HUNG-LIANG HSU, CHIH-YUAN LIN, CHIH-LUNG HSIAO, MING-YUEH HSU
  • Publication number: 20230335469
    Abstract: Semiconductor structures and methods for manufacturing the same are provided. The method includes a gate structure formed over a substrate, and a source/drain (S/D) structure formed adjacent to the gate structure. The semiconductor structure includes a dielectric layer formed over the S/D structure, and an S/D contact structure formed over the S/D structure. The S/D contact structure is through the dielectric layer. The semiconductor structure includes a gate contact structure formed through the dielectric layer and landing on the gate structure, and the gate contact structure is in direct contact with the gate structure. The semiconductor structure includes a bridging contact structure covering the gate contact structure and the S/D contact structure, and the bottommost surface of the bridging contact structure is in direct contact with the topmost surface of the S/D contact structure.
    Type: Application
    Filed: April 15, 2022
    Publication date: October 19, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jia-Heng WANG, Pang-Chi WU, Chao-Hsun WANG, Fu-Kai YANG, Mei-Yun WANG
  • Publication number: 20230321016
    Abstract: Provided is a method for treating cancer by administering to a subject in need thereof with a pharmaceutical composition including a benzenesulfonamide derivative and at least one other therapeutic agents in a different classification of anticancer agents.
    Type: Application
    Filed: March 20, 2023
    Publication date: October 12, 2023
    Inventors: Chuan-Ching YANG, Shun-Chi WU, Shu-Ying CHENG, Mao-Yuan LIN, Geng-Ruei CHANG
  • Publication number: 20230326804
    Abstract: In an embodiment, a method includes: forming a first fin extending from a substrate; forming a second fin extending from the substrate, the second fin being spaced apart from the first fin by a first distance; forming a metal gate stack over the first fin and the second fin; depositing a first inter-layer dielectric over the metal gate stack; and forming a gate contact extending through the first inter-layer dielectric to physically contact the metal gate stack, the gate contact being laterally disposed between the first fin and the second fin, the gate contact being spaced apart from the first fin by a second distance, where the second distance is less than a second predetermined threshold when the first distance is greater than or equal to a first predetermined threshold.
    Type: Application
    Filed: June 15, 2023
    Publication date: October 12, 2023
    Inventors: Shih-Chieh Wu, Pang-Chi Wu, Kuo-Yi Chao, Mei-Yun Wang, Hsien-Huang Liao, Tung-Heng Hsieh, Bao-Ru Young