Patents by Inventor Chi Yang

Chi Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11315862
    Abstract: A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a redistribution structure, a circuit substrate, and an insulating encapsulation. The redistribution structure includes a first under-bump metallization (UBM) pattern covered by a first dielectric layer, and the first UBM pattern includes a surface substantially leveled with a surface of the first dielectric layer. The circuit substrate is electrically coupled to the redistribution structure through a conductive joint disposed on the surface of the first UBM pattern. The insulating encapsulation is disposed on the redistribution structure to cover the circuit substrate.
    Type: Grant
    Filed: June 29, 2020
    Date of Patent: April 26, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Lin Ho, Chin-Liang Chen, Jiun-Yi Wu, Chi-Yang Yu, Yu-Min Liang, Wei-Yu Chen
  • Publication number: 20220123126
    Abstract: In an embodiment, a structure includes: a semiconductor substrate; a fin extending from the semiconductor substrate; a gate stack over the fin; an epitaxial source/drain region in the fin adjacent the gate stack; and a gate spacer disposed between the epitaxial source/drain region and the gate stack, the gate spacer including a plurality of silicon oxycarbonitride layers, each of the plurality of silicon oxycarbonitride layers having a different concentration of silicon, a different concentration of oxygen, a different concentration of carbon, and a different concentration of nitrogen.
    Type: Application
    Filed: January 3, 2022
    Publication date: April 21, 2022
    Inventors: Chien-Chih Lin, Yen-Ting Chen, Wen-Kai Lin, Szu-Chi Yang, Shih-Hao Lin, Tsung-Hung Lee, Ming-Lung Cheng
  • Publication number: 20220082770
    Abstract: The present disclosure provides a photonic integrated circuit chip. The photonic integrated circuit chip comprises a plurality of connection ports, multiple polarization beam splitting structures, a photodetector structure, an interleaver and a modulator. The plurality of connection ports are used to receive a plurality of first optical signals to the photonic integrated circuit chip. The multiple polarization beam splitting structures each are used to split the first optical signal passing through the polarization beam splitting structure into a first mode optical signal and a second mode optical signal. The photodetector structure comprises a first component for split beam and a second component for split beam. The interleaver is used to transfer the first mode optical signal or the second mode optical signal to the second component for split beam. The modulator is used to transfer second optical signals with different wavelengths to the interleaver.
    Type: Application
    Filed: September 3, 2021
    Publication date: March 17, 2022
    Applicant: Molex, LLC
    Inventors: Li-Chi YANG, Bing-Hao SHIH, Chih-Chung WU, Zuon-Min CHUANG
  • Patent number: 11269080
    Abstract: A tracking method, an electronic device using the same, and a tracking system using the same are provided. The electronic device includes a wireless communication unit, an azimuth detection unit, a storage unit, and a processing unit. The wireless communication unit detects an external wireless communication signal to generate a current RSSI. The azimuth detection unit detects a current azimuth of the electronic device. The storage unit stores pattern strength indicators and a previous azimuth. The processing unit obtains an RSSI adjustment value according to the current azimuth, the previous azimuth, and the pattern strength indicators, and the processing unit further obtains an RSSI corrected value according to the RSSI adjustment value and the current RSSI.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: March 8, 2022
    Assignee: Chicony Electronics Co., Ltd.
    Inventors: Yen-Ching Lee, Chi-Yang Chiu, Chien-Tsung Chen
  • Patent number: 11267135
    Abstract: An item with fibers may be picked up and placed using a tool head with hooks that engage the fibers. The tool head may comprise at least one hook portion and at least one contact surface adjacent to the hook portion. The hooks that engage the fibers may extend from the hook portion. The tool head may be actuatable between at least a first configuration that permits the hooks to engage the fibers and a second configuration that does not permit the hooks to engage the fibers. An item may be picked up at a starting location with a tool head in the first configuration and placed at a placement location by moving the tool head and then actuating the tool head to the second configuration.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: March 8, 2022
    Assignee: NIKE, Inc.
    Inventors: Feng-Ming Ou, Yu-Hsi Hsing, Chia-Chi Yang
  • Patent number: 11264304
    Abstract: A method for manufacturing a semiconductor structure is disclosed. The method includes: providing a semiconductor substrate having a plurality of dies thereon; dispensing an underfill material and a molding compound to fill spaces beneath and between the dies; disposing a temporary carrier over the dies; thinning a thickness of the semiconductor substrate; performing back side metallization upon the thinned semiconductor substrate; removing the temporary carrier; and attaching a plate over the dies. An associated semiconductor structure is also disclosed.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: March 1, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chin-Liang Chen, Chi-Yang Yu, Kuan-Lin Ho, Yu-Min Liang
  • Publication number: 20220052683
    Abstract: An integrated circuit with a power-on-reset circuit includes an inverter circuit connected between the first and second supply node, a cascode-connected series of transistors MCn, for n going from 1 to N, connected between the first supply node and the input node of the inverter, and a resistive element connected between the input node of the inverter and the second supply node. The transistors in the cascode-connected series of transistors MCn pull up the input node voltage above a trip point voltage when the voltage between the input node and the first supply node is more than a threshold of the cascode-connected series. A circuit connected between the first and second supply nodes is responsive to a POR pulse output by the inverter.
    Type: Application
    Filed: March 26, 2021
    Publication date: February 17, 2022
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Shang-Chi YANG, Jhen-Sheng CHIH, Jian-Syu LIN
  • Patent number: 11244879
    Abstract: A semiconductor package including a first semiconductor device, a second semiconductor device, an insulating encapsulant, a redistribution structure and a supporting element is provided. The insulating encapsulant encapsulates the first semiconductor device and the second semiconductor device. The redistribution structure is over the first semiconductor device, the second semiconductor device and the insulating encapsulant. The redistribution structure is electrically connected to the first semiconductor device and the second semiconductor device. The supporting element is embedded in one of the insulating encapsulant and the redistribution structure.
    Type: Grant
    Filed: January 20, 2020
    Date of Patent: February 8, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Yang Yu, Chien-Hsun Lee, Jung-Wei Cheng, Tsung-Ding Wang, Yu-Min Liang
  • Patent number: 11239900
    Abstract: Disclosed is an interference canceller capable of generating a cancellation signal for reducing cross port alien near-end (XPAN) crosstalk of a reception signal received by a receiver of a network device.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: February 1, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Liang-Wei Huang, Chin-Chi Yang
  • Patent number: 11239832
    Abstract: A circuit to generate complementary signals comprises a first string of inverters with two inverters in series to produce a true signal in response to an input signal, and a second string of inverters with three inverters in series to produce a complement signal in response to the input signal. A compensation capacitance circuit is connected to a node in the first string of inverters. The compensation capacitance circuit can add capacitance to the node to increase a resistance-capacitance RC delay at the node in a manner which emulates the delay across PVT conditions an inverter in the second string of inverters.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: February 1, 2022
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Shang-Chi Yang, Jhen-Sheng Chih
  • Publication number: 20220019254
    Abstract: Systems, methods, circuits, devices, and apparatus including computer-readable mediums for managing reference voltages, e.g., with current compensation, in memory systems, e.g., non-volatile memory systems. In one aspect, an integrated circuit includes: an operational amplifier configured to receive input voltages and a supply voltage and output a control voltage based on the input voltages and the supply voltage; an output circuitry configured to receive the control voltage from the operational amplifier and the supply voltage, provide the input voltages to the operational amplifier, and output a reference voltage; and a compensation circuitry coupled to the output circuitry and configured to output a compensation current to compensate the output circuitry such that the reference voltage is substantially constant. The output circuitry is configured to generate the reference voltage based on the control voltage and the compensation current.
    Type: Application
    Filed: December 28, 2020
    Publication date: January 20, 2022
    Inventors: Shang-Chi Yang, Jian-Syu Lin
  • Publication number: 20220015815
    Abstract: The disclosure provides a flexible cryoablation needle device resistant to a low temperature and a high pressure, a threaded part is arranged on the outer wall of a liner pipe to enhance a connection strength between the liner pipe and a flexible pipe structure. Since an annular protrusion portion is arranged on the outer wall of the liner pipe, further leakage of a gas coming from a pressure relief process is prevented and the connection strength is enhanced as well. Air tightness and connection strength are further guaranteed by radial extrusion of extruding pipes. And an inner cavity in a cutter head is directly subjected to pressure relief through a cutter head vent, a pressure relief intermediate cavity, a liner vent, a flexible pipe vent and a pressure relief gap.
    Type: Application
    Filed: March 7, 2019
    Publication date: January 20, 2022
    Inventors: Chi YANG, Binkai XU, Yinlong WU, Rui ZHANG
  • Publication number: 20220010059
    Abstract: A polyhydroxyalkanoates extraction system comprises a pretreatment subsystem, an extraction subsystem and a recycling subsystem. The pretreatment subsystem comprises a fermentation device and an activation device so as to carry out a microorganism acclimation process. The extraction subsystem comprises a freezing device, a pretreatment device and an extraction device. The extraction subsystem is used for receiving a third sludge so that the third sludge is subjected to a freezing process, a pretreatment process, an extraction process and a purification process in the freezing device to form a polyhydroxyalkanoates mixture, and the extraction device performs a precipitation process to generate polyhydroxyalkanoates precipitate. The recycling subsystem comprises an aerobic sludge digestion device and a sequencing batch reactor activated sludge treatment device so as to carry out an aerobic sludge digestion process and a sequencing batch reactor activated sludge process.
    Type: Application
    Filed: September 21, 2020
    Publication date: January 13, 2022
    Inventors: Yung-Pin TSAI, Ku-Fan CHEN, Meng-Shan LU, Chih-Chi YANG, Hao SHIU
  • Patent number: 11217679
    Abstract: In an embodiment, a structure includes: a semiconductor substrate; a fin extending from the semiconductor substrate; a gate stack over the fin; an epitaxial source/drain region in the fin adjacent the gate stack; and a gate spacer disposed between the epitaxial source/drain region and the gate stack, the gate spacer including a plurality of silicon oxycarbonitride layers, each of the plurality of silicon oxycarbonitride layers having a different concentration of silicon, a different concentration of oxygen, a different concentration of carbon, and a different concentration of nitrogen.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: January 4, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Chih Lin, Yen-Ting Chen, Wen-Kai Lin, Szu-Chi Yang, Shih-Hao Lin, Tsung-Hung Lee, Ming-Lung Cheng
  • Publication number: 20210393042
    Abstract: An electric bed capable of being assembled and dismantled without the need of using a tool is disclosed. The electric bed includes left and right modules, front and rear transverse beams having two ends bare-handed detachably mounted with the left and right modules respectively, and back, buttock, thigh and lower leg supporting units bare-handed detachably mounted with the left and right modules, respectively. A front actuator has two ends bare-handed detachably and pivotally connected with the front transverse beam and the back supporting unit, respectively. A rear actuator has two ends bare-handed detachably and pivotally connected with the rear transverse beam and the thigh supporting unit, respectively. As such, the electric bed can be easily and conveniently assembled and dismantled in accordance with the user's requirement and can be packed with minimized volume of packing material to reduce the transportation cost.
    Type: Application
    Filed: June 17, 2021
    Publication date: December 23, 2021
    Inventors: Chuan-Hang SHIH, Yu-Chi YANG
  • Patent number: 11204556
    Abstract: A method of controlling a feedback system with a data matching module of an extreme ultraviolet (EUV) radiation source is disclosed. The method includes obtaining a slit integrated energy (SLIE) sensor data and diffractive optical elements (DOE) data. The method performs a data match, by the data matching module, of a time difference of the SLIE sensor data and the DOE data to identify a mismatched set of the SLIE sensor data and the DOE data. The method also determines whether the time difference of the SLIE sensor data and the DOE data of the mismatched set is within an acceptable range. Based on the determination, the method automatically validates a configurable data of the mismatched set such that the SLIE sensor data of the mismatched set is valid for a reflectivity calculation.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: December 21, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Chih Huang, Chi Yang, Che-Chang Hsu, Li-Jui Chen, Po-Chung Cheng
  • Publication number: 20210389678
    Abstract: A system for controlling plasma position in extreme ultraviolet lithography light sources may include a vacuum chamber, a droplet generator to dispense a stream of droplets into the vacuum chamber, wherein the droplets are formed from a metal material, a laser light source to fire a plurality of laser pulses, including at least a first pulse and a second pulse, into the vacuum chamber, a sensor to detect an observed plasma position within the chamber, wherein the observed plasma position comprises a position at which the plurality of laser pulses vaporizes a droplet of the stream of droplets to produce a plasma that emits extreme ultraviolet radiation, and a first feedback loop connecting the sensor to the laser light source, wherein the first feedback loop adjusts a time delay between the first and second pulses to minimize a difference between the observed plasma position and a target plasma position.
    Type: Application
    Filed: June 12, 2020
    Publication date: December 16, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ssu-Yu CHEN, Hsin-Feng CHEN, Chi YANG, Li-Jui CHEN
  • Publication number: 20210387957
    Abstract: Compounds having a structure of Formula I: or a pharmaceutically acceptable salt, tautomer or stereoisomer thereof, wherein R1, R2, R3, R11a, R11b, R11c, R11d, and X, are as defined herein, are provided. Uses of such compounds for modulating androgen receptor activity, imaging diagnostics in cancer and therapeutics, and methods for treatment of subjects in need thereof, including prostate cancer are also provided.
    Type: Application
    Filed: August 17, 2021
    Publication date: December 16, 2021
    Inventors: Raymond J. Andersen, Marianne Dorothy Sadar, Kunzhong Jian, Nasrin R. Mawji, Jun Wang, Carmen Adriana Banuelos, Yu-Chi Yang
  • Publication number: 20210364934
    Abstract: An extreme ultraviolet (EUV) lithography system includes a vane bucket module. The vane bucket module includes a temperature adjusting pack and a collecting tank inserted into the temperature adjusting pack. The temperature adjusting pack has a plurality of inlets. The collecting tank has a cover and the cover includes a plurality of through holes. The inlets of the temperature adjusting pack are aligned with the through holes of the cover. Thicknesses of edges of the cover is different from a thickness of a center of the cover.
    Type: Application
    Filed: August 6, 2021
    Publication date: November 25, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ssu-Yu Chen, Po-Chung Cheng, Li-Jui Chen, Che-Chang Hsu, Chi Yang
  • Patent number: D940729
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: January 11, 2022
    Assignee: FISHER & PAYKEL HEALTHCARE LIMITED
    Inventors: Christopher Harding Campbell, Peter Chi-Yang Hsu, Hamish Chan, Simei Gomes Wysoski, David Robin Whiting, Malik Tivanka Rajiv Peiris