Patents by Inventor Chi Yang

Chi Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230077368
    Abstract: A motor commutation waveform generating circuit is provided. The motor commutation waveform generating circuit includes: an edge detection circuit, configured to receive sensing signals of the motor and derive a clock signal indicating a commutation switching point of the motor; an angle cutting circuit, controlled by the clock signal to generate an angle indication pulse indicating a rotation angle of the motor; a synthetic wave generating circuit, using the angle indication pulse to sequentially change waveform voltages corresponding to required angles and output them in segments; and a signal combining circuit, controlled by the clock signal to combine waveform voltage signals generated by the synthetic wave generating circuit, thereby obtaining a plurality of synthetic waveforms provided to a drive control system of the motor for drive control after pulse width modulation.
    Type: Application
    Filed: December 3, 2021
    Publication date: March 16, 2023
    Inventors: Chi-Yang CHEN, Min-Fu HSIEH
  • Patent number: 11605406
    Abstract: A sense amplifying device includes a bit line bias voltage adjuster and a sense amplifying circuit. The bit line bias voltage adjuster receives a power voltage to be an operation voltage. The bit line bias voltage adjuster includes a first amplifier, a first transistor and a first current source. The first amplifier, based on the power voltage, generates an adjusted reference bit line voltage according to a reference bit line voltage and a feedback voltage. The first transistor receives the adjusted reference bit line voltage and generates the feedback voltage, wherein the first transistor is a native transistor. The sense amplifying circuit receives the power voltage to be the operation voltage, and generates a sensing result according to the adjusted reference bit line voltage.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: March 14, 2023
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yen-Ning Chiang, Shang-Chi Yang
  • Publication number: 20230056175
    Abstract: A surgical pad can comprise a flexible pad portion configured to be positioned over an opening in a target tissue. A plurality of elongate ribs can be distributed across a surface of the flexible pad portion oriented away from the target tissue and can be coupled to the flexible pad portion. A surgical pad can comprise a central opening configured to be aligned with an opening in a target tissue, and a plurality of edge openings distributed around an outer edge portion. A method can comprise positioning a spacer between a target tissue and a surgical pad to adjust the tension of surgical cords secured to surgical pad. A method can comprise positioning a spacer between a surface of a surgical pad oriented away from a target tissue and portions of surgical cords secured over the surface of the surgical pad, to adjust the tension of the surgical cords.
    Type: Application
    Filed: October 19, 2022
    Publication date: February 23, 2023
    Inventors: Jingjia Han, Austin Engelbrecht, Yin Fang, Hui-Chi Yang, Felino V. Cortez, JR., Megan Cortez, Luke Anthony Zanetti
  • Publication number: 20230055579
    Abstract: An antenna device includes a casing, a circuit board, and an antenna. The casing has a positioning structure. The circuit board is disposed in the casing. The antenna is disposed in the casing and includes a main body portion and a connection portion connected to each other. The connection portion is connected to a surface of the circuit board. The main body portion is extended on a plane defined by a first axial direction and a second axial direction. The first axial direction is perpendicular to the surface and the second axial direction is parallel to the surface. The main body portion is positioned on the positioning structure and separated from the circuit board.
    Type: Application
    Filed: June 23, 2022
    Publication date: February 23, 2023
    Applicant: Chicony Electronics Co., Ltd.
    Inventors: Chi-Yang Chiu, Jung-Hsiu Lee, Yen-Ching Lee
  • Patent number: 11581226
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary method comprises forming first and second semiconductor fins in first and second regions of a substrate, respectively; forming first and second dummy gate stacks over the first and second semiconductor fins, respectively, and forming a spacer layer over the first and the second dummy gate stacks; forming a first pattern layer with a thickness along the spacer layer in the first region; form a first source/drain (S/D) trench along the first pattern layer and epitaxially growing a first epitaxial feature therein; removing the first pattern layer to expose the spacer layer; forming a second pattern layer with a different thickness along the spacer layer in the second region; form a second S/D trench along the second pattern layer and epitaxially growing a second epitaxial feature therein; and removing the second pattern layer to expose the spacer layer.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: February 14, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Hao Lin, Tzu-Hsiang Hsu, Chong-De Lien, Szu-Chi Yang, Hsin-Wen Su, Chih-Hsiang Huang
  • Publication number: 20230041979
    Abstract: The present invention relates to a container. More specifically, it relates to a container having a lower portion with a bottom and a plurality of walls defining an interior space. The container also includes a cover attached to one of the walls via a hinge and configured to move between a closed position and a fully open position, wherein in said closed position, access to the interior space is prohibited, and in said fully open position, access to the interior space is permitted and the cover is at an angle (?) of greater than or equal to 90 degrees with respect to the lower portion.
    Type: Application
    Filed: August 3, 2022
    Publication date: February 9, 2023
    Inventors: Shun-Chi YANG, Hui-Ling TENG, Ching-Yi TU, ChihChiang LEE, Bennett G. RECORDS, Wan-Chiang WANG
  • Publication number: 20230037585
    Abstract: Systems, methods, circuits, and apparatus including computer-readable mediums for managing page buffer circuits in memory devices are provided. In one aspect, a memory device includes a memory cell array, memory cell lines connecting respective lines of memory cells, and a page buffer circuit including page buffers coupled to the memory cell lines. Each page buffer includes a sensing latch circuit and a storage latch circuit. The sensing latch circuit includes a sensing transistor coupled to a sensing node and at least one sensing latch unit having a first node coupled to the sensing node and a second node coupled to a first terminal of the sensing transistor. The storage latch circuit includes at least one storage latch unit having third and fourth nodes coupled to the sensing node and a gate terminal of the sensing transistor. A second terminal of the sensing transistor is coupled to a ground.
    Type: Application
    Filed: February 17, 2022
    Publication date: February 9, 2023
    Applicant: Macronix International Co., Ltd.
    Inventors: Shang-Chi Yang, Hui-Yao Kao
  • Patent number: 11573495
    Abstract: A control system includes a plurality of pressure sensors, each to detect a pressure in a respective dynamic gas lock (DGL) nozzle control region of a plurality of DGL nozzle control regions. Each DGL nozzle control region includes one or more DGL nozzles. The control system includes a plurality of mass flow controllers (MFCs). Each MFC of the plurality of MFCs is to control a flow velocity in a respective DGL nozzle control region of the plurality of DGL nozzle control regions. The control system includes a controller to selectively cause one or more MFCs of the plurality of MFCs to adjust flow velocities in one or more DGL nozzle control regions of the plurality of DGL nozzle control regions based on pressures detected by the plurality of pressure sensors in DGL nozzle control regions of the plurality of DGL nozzle control regions.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: February 7, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Kai Chang, Yu Sheng Chiang, Yu De Liou, Chi Yang, Ching-Juinn Huang, Po-Chung Cheng
  • Publication number: 20230033935
    Abstract: A sense amplifying device includes a bit line bias voltage adjuster and a sense amplifying circuit. The bit line bias voltage adjuster receives a power voltage to be an operation voltage. The bit line bias voltage adjuster includes a first amplifier, a first transistor and a first current source. The first amplifier, based on the power voltage, generates an adjusted reference bit line voltage according to a reference bit line voltage and a feedback voltage. The first transistor receives the adjusted reference bit line voltage and generates the feedback voltage, wherein the first transistor is a native transistor. The sense amplifying circuit receives the power voltage to be the operation voltage, and generates a sensing result according to the adjusted reference bit line voltage.
    Type: Application
    Filed: July 30, 2021
    Publication date: February 2, 2023
    Applicant: MACRONIX International Co., Ltd.
    Inventors: Yen-Ning Chiang, Shang-Chi Yang
  • Publication number: 20230024298
    Abstract: An electronic rotary encoder is configured to be disposed on a vertical rotary shaft in a rotary object to obtain two encoded signals: a phase A signal and a phase B signal for calculating a rotational speed and a position. The electronic rotary encoder includes: at least one Hall element outputting Hall signals used as a square wave of the phase A signal; two capacitors, to respectively obtain a first voltage and a second voltage; two buffer gates, to respectively output waveform signals of a first X voltage and a second X voltage; two comparators outputting, a control signal through a latch; and an exclusive OR gate, where a direction signal and the control signal outputted through the latch are inputted to the exclusive OR gate, to obtain the phase B signal.
    Type: Application
    Filed: October 27, 2021
    Publication date: January 26, 2023
    Inventors: Chi-Yang CHEN, Min-Fu HSIEH
  • Publication number: 20230009553
    Abstract: Provided are a package structure and a method of forming the same. The method includes: laterally encapsulating a device die and an interconnect die by a first encapsulant; forming a redistribution layer (RDL) structure on the device die, the interconnect die, and the first encapsulant; bonding a package substrate onto the RDL structure, so that the RDL structure is sandwiched between the package substrate and the device die, the interconnect die, and the first encapsulant; laterally encapsulating the package substrate by a second encapsulant; and bonding a memory die onto the interconnect die, wherein the memory die is electrically connected to the device die through the interconnect die and the RDL structure.
    Type: Application
    Filed: July 8, 2021
    Publication date: January 12, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Yang Yu, Yu-Min Liang, Jiun-Yi Wu, Chien-Hsun Lee
  • Publication number: 20230000537
    Abstract: A cryoadhesion apparatus includes a remote control assembly, a valve assembly, a needle catheter assembly, and a gas cylinder, the remote control assembly includes a sheath structure and a remote control, the sheath structure is provided with a catheter channel for the needle catheter assembly to pass through, two ends of the valve assembly are respectively connected to the needle catheter assembly and the gas bottle; the sheath structure is capable of squeezing the needle catheter assembly, when squeezing is maintained, the needle catheter assembly is capable of moving along with the sheath structure under a frictional force between an inner wall of the catheter channel and the needle catheter assembly; the remote control is configured to, when triggered, send a trigger signal to the valve assembly; the valve assembly is configured to transport, when receiving the trigger signal, a gas from the gas cylinder to the needle catheter assembly.
    Type: Application
    Filed: September 29, 2020
    Publication date: January 5, 2023
    Inventors: Chi YANG, Zhaohua CHANG
  • Patent number: 11531278
    Abstract: Extreme ultraviolet (EUV) lithography systems are provided. A EUV scanner is configured to perform a lithography exposure process in response to EUV radiation. A light source is configured to provide the EUV radiation to the EUV scanner. A measuring device is configured to measure concentration of debris caused by unstable target droplets in the chamber. A controller is configured to adjust a first gas flow rate and a second gas flow rate in response to the measured concentration of the debris and a control signal from the EUV scanner. A exhaust device is configured to extract the debris out of the chamber according to the first gas flow rate. A gas supply device is configured to provide a gas into the chamber according to the second gas flow rate. The control signal indicates the lithography exposure process is completed.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: December 20, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chi Yang, Ssu-Yu Chen, Shang-Chieh Chien, Chieh Hsieh, Tzung-Chi Fu, Bo-Tsun Liu, Li-Jui Chen, Po-Chung Cheng
  • Publication number: 20220384609
    Abstract: A semiconductor structure includes: a semiconductor substrate; a first source/drain feature and a second source/drain feature over the semiconductor substrate; and semiconductor layers extending longitudinally in a first direction and connecting the first source/drain feature and the second source/drain feature. The semiconductor layers are spaced apart from each other in a second direction perpendicular to the first direction. The semiconductor structure further includes inner spacers each between two adjacent semiconductor layers; metal oxide layers interposing between the inner spacers and the semiconductor layers; and a gate structure wrapping around the semiconductor layers and the metal oxide layers.
    Type: Application
    Filed: May 27, 2021
    Publication date: December 1, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Hao LIN, Chia-Hung CHOU, Chih-Hsuan CHEN, Ping-En CHENG, Hsin-Wen SU, Chien-Chih LIN, Szu-Chi YANG
  • Publication number: 20220384655
    Abstract: A method includes following steps. A semiconductor fin is formed extending from a substrate. A gate structure is formed extending across the semiconductor fin. Recesses are etched in the semiconductor fin. Source/drain epitaxial structures are formed in the recesses in the semiconductor fin. Formation of each of the source/drain epitaxial structures comprises performing a first epitaxy growth process to form a bar-shaped epitaxial structure in one of the recesses, and performing a second epitaxy growth process to form a cladding epitaxial layer cladding on the bar-shaped epitaxial structure. The bar-shaped epitaxial structure has a lower phosphorous concentration than the cladding epitaxial layer.
    Type: Application
    Filed: August 10, 2022
    Publication date: December 1, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Szu-Chi YANG, Chih-Hsiang HUANG
  • Publication number: 20220378213
    Abstract: A multifunctional sofa includes a base seat, a back supporting frame and a cushion pad. The base seat includes a frame, a support cloth located inside the frame, and a plurality of resilient members connected between the frame and the support cloth. The back supporting frame is disposed at a side of the frame of the base seat. The cushion pad is disposed on the base seat. At a lifted-up posture, the multifunctional sofa serves as a chair. At a lay-down posture, the multifunctional sofa serves as a bed. When the cushion pad is removed, the multifunctional sofa serves as a trampoline on which the user may practice jumping exercise. In accordance with the user's requirement, the multifunctional sofa can be utilized as a chair for sitting, a bed for lying, or a trampoline for jumping so as to preserve more space for home activities.
    Type: Application
    Filed: June 30, 2021
    Publication date: December 1, 2022
    Inventors: Chuan-Hang SHIH, Yu-Chi YANG, Syuan-Yu CHEN
  • Publication number: 20220371176
    Abstract: A storage container including a plurality of drawers for holding items therewithin. Each drawer may be held closed within the container by selective rotation of a detent mechanism which interacts with engagement means formed on each drawer. When the detent mechanism is in its open position, each drawer may be freely opened or closed. Whereas, when the detent mechanism is in its closed position, each drawer may be moved from an open to a closed position, but not from a closed to an open position.
    Type: Application
    Filed: May 24, 2022
    Publication date: November 24, 2022
    Inventors: Shun-Chi YANG, Wan-Chiang WANG, Ching-Yi TU
  • Patent number: 11508149
    Abstract: An operating method with goods information is applicable to an electronic device. The operation method includes: obtaining image information associated with one or more goods objects on a target electronic shelf among a plurality of electronic shelves in a network; and performing first communicating with a server for controlling the electronic shelves in the network according to either or both of the image information and feature information associated with the one or more goods objects, wherein feature information is extracted from the image information and the first communicating includes wirelessly transmitting either or both of the image information and the feature information associated with the one or more goods objects to the server.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: November 22, 2022
    Assignee: Novatek Microelectronics Corp.
    Inventors: Wen-Ching Liao, Chao-Chi Yang, Wei-Te Hu, Chi-Yuan Lai, Kuan-Liang Kuo
  • Patent number: 11506986
    Abstract: In accordance with some embodiments, a lithography method in semiconductor manufacturing is provided. The lithography method includes transmitting a main pulse laser to a zone of excitation through a first optic assembly. The lithography method further includes supplying a coolant to the first optic assembly and detecting a temperature of the coolant with a use of at least one sensor. The lithography method also includes adjusting a heat transfer rate between the coolant and the first optic assembly based on the temperature of the first optic assembly. In addition, the lithography method includes generating a droplet of a target material into the zone of excitation. The lithography method further includes exciting the droplet of the target material into plasma with the main pulse laser in the zone of excitation.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: November 22, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi Yang, Yen-Shuo Su, Jui-Pin Wu, Li-Jui Chen
  • Patent number: 11508640
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a first semiconductor die, a second semiconductor die, a molding compound, a heat dissipation module and an adhesive material. The first and second semiconductor dies are different types of dies and are disposed side by side. The molding compound encloses the first and second semiconductor dies. The heat dissipation module is located directly on and in contact with the back sides of the first and second semiconductor dies. The adhesive material is filled and contacted between the heat dissipation module and the molding compound. The semiconductor package has a central region and a peripheral region surrounding the central region. The first and second semiconductor dies are located within the central region. A sidewall of the heat dissipation module, a sidewall of the adhesive material and a sidewall of the molding compound are substantially coplanar.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: November 22, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Yang Yu, Chin-Liang Chen, Kuan-Lin Ho, Yu-Min Liang, Wen-Lin Chen