Patents by Inventor Chia Chang
Chia Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240107414Abstract: This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for switching a secondary cell to a primary cell. A user equipment (UE) monitors a first radio condition of the UE for beams of a primary cell and a second radio condition for beams of one or more secondary cells configured for the UE in carrier aggregation. The UE transmits a request to configure a candidate beam of at least one candidate secondary cell as a new primary cell in response to the first radio condition not satisfying a first threshold and the second radio condition for the at least one candidate secondary cell satisfying a second threshold. A base station determines to reconfigure at least one secondary cell as the new primary cell. The base station and the UE perform a handover of the UE to the new primary cell.Type: ApplicationFiled: September 23, 2022Publication date: March 28, 2024Inventors: Yu-Chieh HUANG, Kuhn-Chang LIN, Jen-Chun CHANG, Wen-Hsin HSIA, Chia-Jou LU, Sheng-Chih WANG, Chenghsin LIN, Yeong Leong CHOO, Chun-Hsiang CHIU, Chihhung HSIEH, Kai-Chun CHENG, Chung Wei LIN
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Patent number: 11939431Abstract: The present invention relates to a composition comprising an amino acid-modified polymer, a carboxypolysaccharide, and may further include a metal ion for anti-adhesion and vector application. More specifically, the invention relates to a thermosensitive composition having enhanced mechanical and improved water-erosion resistant properties for efficiently preventing tissue adhesions and can serve as a vector with bio-compatible, bio-degradable/absorbable, and in-vivo sustainable properties.Type: GrantFiled: April 23, 2021Date of Patent: March 26, 2024Assignee: PROVIEW-MBD BIOTECH CO., LTD.Inventors: Yu-Chia Chang, Yunn-Kuen Chang, Wen-Yen Huang, Ging-Ho Hsiue, Hsieh-Chih Tsai, Shuian-Yin Lin, Nai-Sheng Hsu, Tzu-Yu Lin
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Patent number: 11939432Abstract: Synthetic amino acid-modified polymers and methods of making the same and using the same are disclosed. The synthetic amino acid-modified polymers possess distinct thermosensitive, improved water-erosion resistant, and enhanced mechanical properties, and are suitable of reducing or preventing formation of postoperative tissue adhesions. Additionally, the amino acid-modified polymers can also be used as a vector to deliver pharmaceutically active agents.Type: GrantFiled: April 23, 2021Date of Patent: March 26, 2024Assignee: PROVIEW-MBD BIOTECH CO., LTD.Inventors: Yu-Chia Chang, Yunn-Kuen Chang, Wen-Yen Huang, Ging-Ho Hsiue, Hsieh-Chih Tsai, Shuian-Yin Lin, Nai-Sheng Hsu, Tzu-Yu Lin
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Patent number: 11942451Abstract: A semiconductor structure includes a functional die, a dummy die, a redistribution structure, a seal ring and an alignment mark. The dummy die is electrically isolated from the functional die. The redistribution structure is disposed over and electrically connected to the functional die. The seal ring is disposed over the dummy die. The alignment mark is between the seal ring and the redistribution structure, wherein the alignment mark is electrically isolated from the dummy die, the redistribution structure and the seal ring. The insulating layer encapsulates the functional die and the dummy die.Type: GrantFiled: August 30, 2021Date of Patent: March 26, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Mao-Yen Chang, Yu-Chia Lai, Cheng-Shiuan Wong, Ting Hao Kuo, Ching-Hua Hsieh, Hao-Yi Tsai, Kuo-Lung Pan, Hsiu-Jen Lin
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Publication number: 20240096873Abstract: Electrostatic discharge (ESD) structures are provided. An ESD structure includes a semiconductor substrate, a first epitaxy region with a first type of conductivity over the semiconductor substrate, a second epitaxy region with a second type of conductivity over the semiconductor substrate, and a plurality of semiconductor layers. The semiconductor layers are stacked over the semiconductor substrate and between the first and second epitaxy regions. A first conductive feature is formed over the first epitaxy region and outside an oxide diffusion region. A second conductive feature is formed over the second epitaxy region and outside the oxide diffusion region. A third conductive feature is formed over the first epitaxy region and within the oxide diffusion region. A fourth conductive feature is formed over the second epitaxy region and within the oxide diffusion region. The oxide diffusion region is disposed between the first and second conductive features.Type: ApplicationFiled: November 28, 2023Publication date: March 21, 2024Inventors: Chun-Chia HSU, Tung-Heng HSIEH, Yung-Feng CHANG, Bao-Ru YOUNG, Jam-Wem LEE, Chih-Hung WANG
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Publication number: 20240096705Abstract: A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.Type: ApplicationFiled: November 30, 2023Publication date: March 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuei-Yu Kao, Chen-Yui Yang, Hsien-Chung Huang, Chao-Cheng Chen, Shih-Yao Lin, Chih-Chung Chiu, Chih-Han Lin, Chen-Ping Chen, Ke-Chia Tseng, Ming-Ching Chang
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Publication number: 20240094625Abstract: A method of making a semiconductor device includes forming at least one fiducial mark on a photomask. The method further includes defining a pattern including a plurality of sub-patterns on the photomask in a pattern region. The defining the pattern includes defining a first sub-pattern of the plurality of sub-patterns having a first spacing from a second sub-pattern of the plurality of sub-patterns, wherein the first spacing is different from a second spacing between the second sub-pattern and a third sub-pattern of the plurality of sub-patterns.Type: ApplicationFiled: November 29, 2023Publication date: March 21, 2024Inventors: Hsin-Chang LEE, Ping-Hsun LIN, Chih-Cheng LIN, Chia-Jen CHEN
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Publication number: 20240094915Abstract: A method for accessing a flash memory module includes: selecting a block in the flash memory module; selecting a specific encoding/decoding setting from a plurality of sets of encoding/decoding settings at least according to an erase count of the block, wherein the plurality of sets of encoding/decoding settings include different error correction code (ECC) lengths, respectively; utilizing the specific encoding/decoding setting to encode a data to generate an encoded data; and writing the encoded data into the block.Type: ApplicationFiled: October 31, 2022Publication date: March 21, 2024Applicant: Silicon Motion, Inc.Inventors: Chia-Chi Liang, Hsiao-Chang Yen, Tsu-Han Lu
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Publication number: 20240094912Abstract: A method for accessing a flash memory module includes: determining a type of data to be written into the flash memory module; selecting a specific encoding/decoding setting from a plurality of sets of encoding/decoding settings at least according to the type of data, wherein the plurality of sets of encoding/decoding settings correspond to different data lengths, respectively; utilizing the specific encoding/decoding setting to encode the data to generate encoded data; and writing the encoded data into a block of the flash memory module.Type: ApplicationFiled: November 24, 2022Publication date: March 21, 2024Applicant: Silicon Motion, Inc.Inventors: Chia-Chi Liang, Hsiao-Chang Yen, Tsu-Han Lu
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Publication number: 20240096677Abstract: A method of correcting a misalignment of a wafer on a wafer holder and an apparatus for performing the same are disclosed. In an embodiment, a semiconductor alignment apparatus includes a wafer stage; a wafer holder over the wafer stage; a first position detector configured to detect an alignment of a wafer over the wafer holder in a first direction; a second position detector configured to detect an alignment of the wafer over the wafer holder in a second direction; and a rotational detector configured to detect a rotational alignment of the wafer over the wafer holder.Type: ApplicationFiled: November 28, 2023Publication date: March 21, 2024Inventors: Chia-Cheng Chen, Chih-Kai Yang, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo
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Patent number: 11934027Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.Type: GrantFiled: June 21, 2022Date of Patent: March 19, 2024Assignee: TDK TAIWAN CORP.Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
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Patent number: 11935981Abstract: A photo-detecting device includes a first semiconductor layer with a first dopant, a light-absorbing layer, a second semiconductor layer, and a semiconductor contact layer. The second semiconductor layer is located on the first semiconductor layer and has a first region and a second region, the light absorbing layer is located between the first semiconductor layer and the second semiconductor layer and has a third region and a fourth region, the semiconductor contact layer contacts the first region. The first region includes a second dopant and a third dopant, the second region includes second dopant, and the third region includes third dopant. The semiconductor contact layer has a first thickness greater than 50 ? and smaller than 1000 ?.Type: GrantFiled: June 30, 2021Date of Patent: March 19, 2024Assignee: EPISTAR CORPORATIONInventors: Chu-Jih Su, Chia-Hsiang Chou, Wei-Chih Peng, Wen-Luh Liao, Chao-Shun Huang, Hsuan-Le Lin, Shih-Chang Lee, Mei Chun Liu, Chen Ou
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Publication number: 20240088267Abstract: A semiconductor device comprises a fin structure disposed over a substrate; a gate structure disposed over part of the fin structure; a source/drain structure, which includes part of the fin structure not covered by the gate structure; an interlayer dielectric layer formed over the fin structure, the gate structure, and the source/drain structure; a contact hole formed in the interlayer dielectric layer; and a contact material disposed in the contact hole. The fin structure extends in a first direction and includes an upper layer, wherein a part of the upper layer is exposed from an isolation insulating layer. The gate structure extends in a second direction perpendicular to the first direction. The contact material includes a silicon phosphide layer and a metal layer.Type: ApplicationFiled: November 22, 2023Publication date: March 14, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng-Yi PENG, Chih Chieh YEH, Chih-Sheng CHANG, Hung-Li CHIANG, Hung-Ming CHEN, Yee-Chia YEO
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Patent number: 11929257Abstract: Described herein are etching solutions and method of using the etching solutions suitable for etching aluminum nitride (AlN) from a semiconductor substrate during the manufacture of a semiconductor device comprising AlN and silicon material without harming the silicon material. The etching solution comprises a cationic surfactant, water, a base, and a water-miscible organic solvent.Type: GrantFiled: March 10, 2020Date of Patent: March 12, 2024Assignee: Versum Materials US, LLCInventors: Chung Yi Chang, Wen Dar Liu, Yi-Chia Lee
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Patent number: 11922863Abstract: A display panel and a pixel circuit thereof are provided. The pixel circuit includes a driving current generator, a pulse width signal generator, a voltage provider, and a current enabler. The driving current generator provides a driving current. The pulse width signal generator includes an output switch. The output switch is controlled by a control signal, and provides a pulse width signal according to the control signal. The voltage provider adjusts the control signal according to a data write-in signal and a pulse width modulation enable signal. The current enabler provides the driving current to a lighting component according to the pulse width signal and an amplitude modulation enable signal.Type: GrantFiled: December 22, 2022Date of Patent: March 5, 2024Assignee: AUO CorporationInventors: Che-Wei Tung, Mei-Yi Li, Che-Chia Chang, Yu-Chieh Kuo, Yu-Zuo Lin
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Patent number: 11924383Abstract: Methods and systems for routing voice over internet protocol (VOIP) are described. A service provider may provide a VOIP infrastructure for routing VOIP calls. One or more other service providers may join the VOIP infrastructure. A computing device may identify the service provider servicing the VOIP calls and may further process the calls accordingly.Type: GrantFiled: December 27, 2022Date of Patent: March 5, 2024Assignee: Comcast Cable Communications, LLCInventors: Chia-Chang Li, Eric Wong, Vengatarajulu Rajasekar, Satish Sampangiramiah
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Patent number: 11923433Abstract: A method for manufacturing a semiconductor device includes forming a first dielectric layer over a semiconductor fin. The method includes forming a second dielectric layer over the first dielectric layer. The method includes exposing a portion of the first dielectric layer. The method includes oxidizing a surface of the second dielectric layer while limiting oxidation on the exposed portion of the first dielectric layer.Type: GrantFiled: March 9, 2021Date of Patent: March 5, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sheng-Liang Pan, Yungtzu Chen, Chung-Chieh Lee, Yung-Chang Hsu, Chia-Yang Hung, Po-Chuan Wang, Guan-Xuan Chen, Huan-Just Lin
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Publication number: 20240071947Abstract: A semiconductor package including a ring structure with one or more indents and a method of forming are provided. The semiconductor package may include a substrate, a first package component bonded to the substrate, wherein the first package component may include a first semiconductor die, a ring structure attached to the substrate, wherein the ring structure may encircle the first package component in a top view, and a lid structure attached to the ring structure. The ring structure may include a first segment, extending along a first edge of the substrate, and a second segment, extending along a second edge of the substrate. The first segment and the second segment may meet at a first corner of the ring structure, and a first indent of the ring structure may be disposed at the first corner of the ring structure.Type: ApplicationFiled: August 30, 2022Publication date: February 29, 2024Inventors: Yu-Ling Tsai, Lai Wei Chih, Meng-Tsan Lee, Hung-Pin Chang, Li-Han Hsu, Chien-Chia Chiu, Cheng-Hung Lin
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Publication number: 20240071263Abstract: The present invention provides a display panel, including a backplane having flexibility, a first fixing member, a front frame having flexibility, and a display module provided between the backplane and the front frame. The backplane has a base plate with a first side. The first fixing member extends corresponding to the first side and has a first predetermined curvature. The first fixing member at least has a first wall body standing upright relative to the base plate, and the first fixing member is relatively fixed to the backplane, so that the curvature of the backplane can be adjusted corresponding to the first fixing member. The front frame is provided in a manner that extends correspondingly to the periphery of the backplane, and is relatively fixed to the backplane, so that the curvature of the front frame is relatively adapted to that of the backplane.Type: ApplicationFiled: August 28, 2023Publication date: February 29, 2024Inventors: MING-CHIN TSAI, CHIA-HSIN JOW, CHI-CHANG CHEN, CHIA-HSIN CHANG
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Publication number: 20240071981Abstract: A method of fabricating a semiconductor structure includes the following steps. A semiconductor wafer is provided. A plurality of first surface mount components and a plurality of second surface mount components are bonded onto the semiconductor wafer, wherein a first portion of each of the second surface mount components is overhanging a periphery of the semiconductor wafer. A first barrier structure is formed in between the second surface mount components and the semiconductor wafer. An underfill structure is formed under a second portion of each of the second surface mount components, wherein the first barrier structure blocks the spreading of the underfill structure from the second portion to the first portion.Type: ApplicationFiled: November 1, 2023Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Mao-Yen Chang, Chih-Wei Lin, Hao-Yi Tsai, Kuo-Lung Pan, Chun-Cheng Lin, Tin-Hao Kuo, Yu-Chia Lai, Chih-Hsuan Tai