Abstract: A fan control device for controlling a fan includes a communication-processing processor, a fan-controlling processor, and a detection processor. The communication-processing processor receives a fan-controlling instruction from an external system to generate a control signal, generates a detection signal according to a detection request of the external system, and provides state information for the external system. The fan-controlling processor controls the speed of the fan according to the control signal and transmits a control result to the communication-processing processor. The detection processor detects the ambient state and the fan state of the fan according to the detection signal, and generates the state information according to the ambient state and the fan state. The communication-processing processor, the fan-controlling processor, and the detection processor are physically separated from one another.

Abstract: A method includes forming a transistor, which includes forming a gate dielectric on a semiconductor region, forming a gate electrode over the gate dielectric, and forming a source/drain region extending into the semiconductor region. The method further includes forming a source/drain contact plug over and electrically coupling to the source/drain region, and forming a gate contact plug over and in contact with the gate electrode. At least one of the forming the gate electrode, the forming the source/drain contact plug, and the forming the gate contact plug includes forming a metal nitride barrier layer, and depositing a metal-containing layer over and in contact with the metal nitride barrier layer. The metal-containing layer includes at least one of a cobalt layer and a metal silicide layer.

Abstract: A device includes a substrate, a first dielectric layer over the substrate, a first conductive feature in the first dielectric layer, and an etch stop layer over the first dielectric layer. The etch stop layer includes metal-doped aluminum nitride. The device further includes a second dielectric layer over the etch stop layer, and a second conductive feature in the second dielectric layer. The second conductive feature extends into the etch stop layer and contacts the first conductive feature.

Abstract: A method includes forming a transistor, which includes forming a gate dielectric on a semiconductor region, forming a gate electrode over the gate dielectric, and forming a source/drain region extending into the semiconductor region. The method further includes forming a source/drain contact plug over and electrically coupling to the source/drain region, and forming a gate contact plug over and in contact with the gate electrode. At least one of the forming the gate electrode, the forming the source/drain contact plug, and the forming the gate contact plug includes forming a metal nitride barrier layer, and depositing a metal-containing layer over and in contact with the metal nitride barrier layer. The metal-containing layer includes at least one of a cobalt layer and a metal silicide layer.

Abstract: An interconnect structure and a method of forming are provided. The method includes forming an opening in a dielectric layer and an etch stop layer, wherein the opening extends only partially through the etch stop layer. The method also includes creating a vacuum environment around the device. After creating the vacuum environment around the device, the method includes etching through the etch stop layer to extend the opening and expose a first conductive feature. The method also includes forming a second conductive feature in the opening.

Abstract: A device includes a substrate, a first dielectric layer over the substrate, a first conductive feature in the first dielectric layer, and an etch stop layer over the first dielectric layer. The etch stop layer includes metal-doped aluminum nitride. The device further includes a second dielectric layer over the etch stop layer, and a second conductive feature in the second dielectric layer. The second conductive feature extends into the etch stop layer and contacts the first conductive feature.

Abstract: A plural-fans driving apparatus is provided to drive a first fan and a second fan, and the first fan and the second fan are three-phase fans. The plural-fans driving apparatus includes a controller, a first three-phase motor driver structure, a second three-phase motor driver structure, and a protection and input interface circuit. The protection and input interface circuit is coupled to the first three-phase motor driver structure and the second three-phase motor driver structure, and protects the first three-phase motor driver structure and the second three-phase motor driver structure. The controller controls the first three-phase motor driver structure to drive the first fan, and controls the second three-phase motor driver structure to drive the second fan.

Abstract: An interconnect structure and a method of forming are provided. The method includes forming an opening in a dielectric layer and an etch stop layer, wherein the opening extends only partially through the etch stop layer. The method also includes creating a vacuum environment around the device. After creating the vacuum environment around the device, the method includes etching through the etch stop layer to extend the opening and expose a first conductive feature. The method also includes forming a second conductive feature in the opening.

Abstract: A method includes forming a transistor, which includes forming a gate dielectric on a semiconductor region, forming a gate electrode over the gate dielectric, and forming a source/drain region extending into the semiconductor region. The method further includes forming a source/drain contact plug over and electrically coupling to the source/drain region, and forming a gate contact plug over and in contact with the gate electrode. At least one of the forming the gate electrode, the forming the source/drain contact plug, and the forming the gate contact plug includes forming a metal nitride barrier layer, and depositing a metal-containing layer over and in contact with the metal nitride barrier layer. The metal-containing layer includes at least one of a cobalt layer and a metal silicide layer.

Abstract: A fan frame includes a housing, a shaft tube, a circuit board and a plurality of light-emitting elements. The housing includes a base and a plurality of connection members located between the base and a peripheral wall of the housing. The shaft tube is mounted on the base. The circuit board is mounted in the housing and includes a body having a through-hole. The circuit board is fit around the shaft tube via the through-hole and is integrally formed with a plurality of protruding ribs and at least one outer rib. Each protruding rib is aligned with a respective connection member. Each outer rib is located between two adjacent protruding ribs. The light-emitting elements are mounted on the protruding ribs and the outer rib. A fan including the fan frame is also disclosed.

Abstract: A fan frame includes a housing, a shaft tube, a circuit board and a plurality of light-emitting elements. The housing includes a base and a plurality of connection members located between the base and a peripheral wall of the housing. The shaft tube is mounted on the base. The circuit board is mounted in the housing and includes a body having a through-hole. The circuit board is fit around the shaft tube via the through-hole and is integrally formed with a plurality of protruding ribs and at least one outer rib. Each protruding rib is aligned with a respective connection member. Each outer rib is located between two adjacent protruding ribs. The light-emitting elements are mounted on the protruding ribs and the outer rib. A fan including the fan frame is also disclosed.

Abstract: A semiconductor device and method of manufacture are provided in which an the physical characteristics of a dielectric material are modified in order to provide additional benefits to surrounding structures during further processing. The modification may be performed by implanting ions into the dielectric material to form a modified region. Once the ions have been implanted, further processing relies upon the modified structure of the modified region instead of the original structure.

Abstract: A fan includes a fan frame, an impeller, a plurality of blades and a light emitting unit. The impeller is rotatably coupled with the fan frame and includes a light diffuser ring. The plurality of blades is connected to the light diffuser ring. The light emitting unit is mounted in the fan frame and shines light on the light diffuser ring.

Abstract: A reversible headwear (100), such as a beanie, includes a reversible headwear body (110) and a pom-pom (150) connected thereto. The reversible headwear body (110) is adjustable between a first configuration and a second configuration. The headwear body (110) has a first surface (112) and an opposite second surface (114). The first and second surfaces (112, 114) correspond to outer and inner surfaces respectively in the first configuration of the headwear body (110), and to the inner and outer surfaces respectively in the second configuration of the headwear body (110). The headwear body (110) has a through-hole (130) extending from the first surface (112) to the second surface (114).

Abstract: A method includes forming a transistor, which includes forming a gate dielectric on a semiconductor region, forming a gate electrode over the gate dielectric, and forming a source/drain region extending into the semiconductor region. The method further includes forming a source/drain contact plug over and electrically coupling to the source/drain region, and forming a gate contact plug over and in contact with the gate electrode. At least one of the forming the gate electrode, the forming the source/drain contact plug, and the forming the gate contact plug includes forming a metal nitride barrier layer, and depositing a metal-containing layer over and in contact with the metal nitride barrier layer. The metal-containing layer includes at least one of a cobalt layer and a metal silicide layer.

Abstract: A semiconductor device and method of manufacture are provided in which an the physical characteristics of a dielectric material are modified in order to provide additional benefits to surrounding structures during further processing. The modification may be performed by implanting ions into the dielectric material to form a modified region. Once the ions have been implanted, further processing relies upon the modified structure of the modified region instead of the original structure.

Abstract: A device includes a substrate, a first dielectric layer over the substrate, a first conductive feature in the first dielectric layer, and an etch stop layer over the first dielectric layer. The etch stop layer includes metal-doped aluminum nitride. The device further includes a second dielectric layer over the etch stop layer, and a second conductive feature in the second dielectric layer. The second conductive feature extends into the etch stop layer and contacts the first conductive feature.

Abstract: A method includes forming a first conductive feature in a first dielectric layer. An etch stop layer is formed over the first dielectric layer. A second dielectric layer is formed over the etch stop layer. The second dielectric layer and the etch stop layer are patterned to form an opening, where a portion of the etch stop layer is interposed between a bottom of the opening and the first conductive feature. The portion of the etch stop layer is sputtered to extend the opening toward the first conductive feature and form an extended opening, where the extended opening exposes the first conductive feature. The extended opening is filled with a conductive material to form a second conductive feature in the second dielectric layer.

Abstract: A method of manufacturing a semiconductor device includes forming a first layer of a conductive material in gate spaces created by removing portions of a dummy gate structure. The first layer further includes a top layer on an entire structure formed on a fin structure, and a gate space for a short channel gate and a gate space for a long channel gate. A first portion of the top layer is removed to leave a hard mask layer over a long channel gate region. The hard mask layer and a portion of heights of the conductive material in the gate spaces are removed to form a first structure. A second layer of the conductive material is formed over the first structure. Portions of the second layer are removed to create a recessed conductive portion for the short channel gate and a recessed conductive portion for the long channel gate.

Abstract: A method includes forming a transistor, which includes forming a gate dielectric on a semiconductor region, forming a gate electrode over the gate dielectric, and forming a source/drain region extending into the semiconductor region. The method further includes forming a source/drain contact plug over and electrically coupling to the source/drain region, and forming a gate contact plug over and in contact with the gate electrode. At least one of the forming the gate electrode, the forming the source/drain contact plug, and the forming the gate contact plug includes forming a metal nitride barrier layer, and depositing a metal-containing layer over and in contact with the metal nitride barrier layer. The metal-containing layer includes at least one of a cobalt layer and a metal silicide layer.