Abstract: A fan frame includes a housing, a shaft tube, a circuit board and a plurality of light-emitting elements. The housing includes a base and a plurality of connection members located between the base and a peripheral wall of the housing. The shaft tube is mounted on the base. The circuit board is mounted in the housing and includes a body having a through-hole. The circuit board is fit around the shaft tube via the through-hole and is integrally formed with a plurality of protruding ribs and at least one outer rib. Each protruding rib is aligned with a respective connection member. Each outer rib is located between two adjacent protruding ribs. The light-emitting elements are mounted on the protruding ribs and the outer rib. A fan including the fan frame is also disclosed.

Abstract: A barcode decoding method includes steps of (a) capturing an image of a barcode; (b) analyzing the image to recognize a data region of the barcode; (c) decoding the data region to obtain a codeword matrix, wherein the codeword matrix includes a plurality of codewords; (d) performing an error correction for the codeword matrix; (e) when the codeword matrix fails to pass the error correction, repeating steps (a) to (c), updating the codeword matrix according to a number of occurrence times of each codeword at an identical position of the codeword matrix, and repeating step (d) for the codeword matrix after updating; and (f) when the codeword matrix passes the error correction, decoding the codeword matrix.

Abstract: A dielectric layer is formed over a substrate, an anti-reflective layer is formed over the porous dielectric layer, and a first hardmask is formed over the anti-reflective layer. A via opening and a trench opening are formed within the porous dielectric layer using the anti-reflective layer and the first hardmask as masking materials. After the formation of the trench opening and the via opening, the first hardmask is removed. An interconnect is formed within the openings, and the interconnect has a via with a profile angle of between about 70° and about 80° and a depth ratio of between about 65% and about 70%.

Abstract: An interconnect structure and a method of forming are provided. The method includes forming an opening in a dielectric layer and an etch stop layer, wherein the opening extends only partially through the etch stop layer. The method also includes creating a vacuum environment around the device. After creating the vacuum environment around the device, the method includes etching through the etch stop layer to extend the opening and expose a first conductive feature. The method also includes forming a second conductive feature in the opening.

Abstract: A method includes forming a dummy gate stack over a semiconductor region, forming a gate spacer on a sidewall of the dummy gate stack, removing the dummy gate stack to form an opening, forming a replacement gate stack in the opening, recessing the replacement gate stack to form a recess, filling the recess with a conductive material, and performing a planarization to remove excess portions of the conductive material over the gate spacer. A remaining portion of the conductive material forms a gate contact plug.

Abstract: A method includes forming a transistor, which includes forming a gate dielectric on a semiconductor region, forming a gate electrode over the gate dielectric, and forming a source/drain region extending into the semiconductor region. The method further includes forming a source/drain contact plug over and electrically coupling to the source/drain region, and forming a gate contact plug over and in contact with the gate electrode. At least one of the forming the gate electrode, the forming the source/drain contact plug, and the forming the gate contact plug includes forming a metal nitride barrier layer, and depositing a metal-containing layer over and in contact with the metal nitride barrier layer. The metal-containing layer includes at least one of a cobalt layer and a metal silicide layer.

Abstract: A method includes forming a dummy gate stack over a semiconductor region, forming a gate spacer on a sidewall of the dummy gate stack, removing the dummy gate stack to form an opening, forming a replacement gate stack in the opening, recessing the replacement gate stack to form a recess, filling the recess with a conductive material, and performing a planarization to remove excess portions of the conductive material over the gate spacer. A remaining portion of the conductive material forms a gate contact plug. A top portion of the gate contact plug is at a same level as a top portion of the first gate spacer.

Abstract: A method includes forming a transistor, which includes forming a gate dielectric on a semiconductor region, forming a gate electrode over the gate dielectric, and forming a source/drain region extending into the semiconductor region. The method further includes forming a source/drain contact plug over and electrically coupling to the source/drain region, and forming a gate contact plug over and in contact with the gate electrode. At least one of the forming the gate electrode, the forming the source/drain contact plug, and the forming the gate contact plug includes forming a metal nitride barrier layer, and depositing a metal-containing layer over and in contact with the metal nitride barrier layer. The metal-containing layer includes at least one of a cobalt layer and a metal silicide layer.

Abstract: A fan control device for controlling a fan includes a communication-processing processor, a fan-controlling processor, and a detection processor. The communication-processing processor receives a fan-controlling instruction from an external system to generate a control signal, generates a detection signal according to a detection request of the external system, and provides state information for the external system. The fan-controlling processor controls the speed of the fan according to the control signal and transmits a control result to the communication-processing processor. The detection processor detects the ambient state and the fan state of the fan according to the detection signal, and generates the state information according to the ambient state and the fan state. The communication-processing processor, the fan-controlling processor, and the detection processor are physically separated from one another.

Abstract: A method of manufacturing a semiconductor device includes forming a first layer of a conductive material in gate spaces created by removing portions of a dummy gate structure. The first layer further includes a top layer on an entire structure formed on a fin structure, and a gate space for a short channel gate and a gate space for a long channel gate. A first portion of the top layer is removed to leave a hard mask layer over a long channel gate region. The hard mask layer and a portion of heights of the conductive material in the gate spaces are removed to form a first structure. A second layer of the conductive material is formed over the first structure. Portions of the second layer are removed to create a recessed conductive portion for the short channel gate and a recessed conductive portion for the long channel gate.

Abstract: The present disclosure relates to a semiconductor device and a manufacturing method, and more particularly to a semiconductor device having reduced trench loading effect. The present disclosure provides a novel multi-layer cap film incorporating one or more oxygen-based layers for reducing trench loading effects in semiconductor devices. The multi-layer cap film can be made of a metal hard mask layer and one or more oxygen-based layers. The metal hard mask layer can be formed of titanium nitride (TiN). The oxygen-based layer can be formed of tetraethyl orthosilicate (TEOS).

Abstract: A method includes forming a first conductive feature in a first dielectric layer. An etch stop layer is formed over the first dielectric layer. A second dielectric layer is formed over the etch stop layer. The second dielectric layer and the etch stop layer are patterned to form an opening, where a portion of the etch stop layer is interposed between a bottom of the opening and the first conductive feature. The portion of the etch stop layer is sputtered to extend the opening toward the first conductive feature and form an extended opening, where the extended opening exposes the first conductive feature. The extended opening is filled with a conductive material to form a second conductive feature in the second dielectric layer.

Abstract: A semiconductor device and method of manufacture are provided in which an the physical characteristics of a dielectric material are modified in order to provide additional benefits to surrounding structures during further processing. The modification may be performed by implanting ions into the dielectric material to form a modified region. Once the ions have been implanted, further processing relies upon the modified structure of the modified region instead of the original structure.

Abstract: A light-trapping cancer cell stage testing method includes: measuring a first average escape velocity or range of first cancer cells and a second average escape velocity or range of second cancer cells whose stage is known and differ from that of the first cancer cells and whose types are known; utilizing the first average escape velocity and the second average escape velocity to calculate a reference ratio to build a database; selecting stage-unknown cancer cells and measuring an escape velocity of the stage-unknown cancer cells (type-known); utilizing the escape velocity of the stage-unknown cancer cells and an escape velocity of reference-stage cancer cells to calculate a ratio; and determining a stage of the stage-unknown cancer cells with a result comparing the ratio of the escape velocities for the stage-unknown cancer cells with the reference ratios stored in the database.

Abstract: A method includes forming a dummy gate stack over a semiconductor region, forming a gate spacer on a sidewall of the dummy gate stack, removing the dummy gate stack to form an opening, forming a replacement gate stack in the opening, recessing the replacement gate stack to form a recess, filling the recess with a conductive material, and performing a planarization to remove excess portions of the conductive material over the gate spacer. A remaining portion of the conductive material forms a gate contact plug.

Abstract: A plural-fans driving apparatus includes a controller, a first fan driving circuit, a second fan driving circuit and a protection and input interface circuit. The controller controls the first fan driving circuit to drive a first fan apparatus. The controller controls the second fan driving circuit to drive a second fan apparatus. The protection and input interface circuit is used to protect the first fan driving circuit and the second fan driving circuit. The protection and input interface circuit is a common input interface for the first fan driving circuit and the second fan driving circuit.

Abstract: A light-trapping cancer cell stage testing method includes: measuring a first average escape velocity or range of first cancer cells and a second average escape velocity or range of second cancer cells whose stage is known and differ from that of the first cancer cells and whose types are known; utilizing the first average escape velocity and the second average escape velocity to calculate a reference ratio to build a database; selecting stage-unknown cancer cells and measuring an escape velocity of the stage-unknown cancer cells (type-known); utilizing the escape velocity of the stage-unknown cancer cells and an escape velocity of reference-stage cancer cells to calculate a ratio; and determining a stage of the stage-unknown cancer cells with a result comparing the ratio of the escape velocities for the stage-unknown cancer cells with the reference ratios stored in the database.

Abstract: A semiconductor device with metal-doped etch stop layer therein and a method of manufacturing the same is disclosed. The method includes forming an semiconductor device with a interconnect structure that has a dielectric layer and a conductor therein, and an etch stop layer over the dielectric layer; applying a photo resist layer and patterning the photo resist layer to expose a portion of the etch stop layer on a top surface of the conductor over of the dielectric layer; and doping the exposed portion of the etch stop layer with an element to form a metal-doped etch stop layer. The formed metal-doped etch stop layer has a recess structure and functions as a conductive pad over the conductor.

Abstract: A fan control device for controlling a fan includes a communication-processing module, a fan-controlling module, and a detection module. The communication-processing module receives a fan-controlling instruction generated by an external system to generate a control signal, generates a detection signal according to a detection request of the external system, and provides state information for the external system. The fan-controlling module controls the speed of the fan according to the control signal and transmits a control result to the communication-processing module. The detection module detects the ambient state and the fan state of the fan according to the detection signal, and generates the state information according to the ambient information and the fan state. The communication-processing module, the fan-controlling module, and the detection module are physically separated from one another.

Abstract: A mattress purchase system and method established based on physiological responses and subjective evaluation data is implemented via a computer device to assist customers in selecting and purchasing most suitable mattress products. The mattress purchase system includes a mattress database, a physiological responses database, an integrated operation processing unit, an adjustment parameter selector module, and a display interface used to output and display body parameter values, preliminary data of appropriate mattress sequence and the final suggested mattress data. The mattress purchase system enables customers to select the most suitable mattresses quickly and accurately, and improves the performance of salesman with better practicability.