Patents by Inventor Chia-Chun Yeh
Chia-Chun Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9040987Abstract: A semiconductor device including a substrate, a metal layer, an insulating layer, a semiconductor layer, a drain and a source is provided. The substrate has a surface and a first cavity. The metal layer is disposed on the substrate and covers the surface and inner-wall of the first cavity to define a second cavity corresponding to the first cavity. The insulating layer covers the metal layer and inner-wall of the second cavity to define a third cavity corresponding to the second cavity. The semiconductor layer exposes a portion of the insulating layer and covers the inner-wall of the third cavity to define a fourth cavity corresponding to the third cavity. The drain and source are disposed on the semiconductor layer and covers a portion of the semiconductor layer and a portion of the insulating layer, in which the drain and source expose the fourth cavity.Type: GrantFiled: December 20, 2012Date of Patent: May 26, 2015Assignee: E Ink Holdings Inc.Inventors: Wei-Chou Lan, Ted-Hong Shinn, Henry Wang, Chia-Chun Yeh
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Publication number: 20150129864Abstract: An organic-inorganic hybrid transistor comprises a flexible substrate, a gate electrode, an organic gate dielectric layer, an oxide semiconductor layer, a first passivation layer, a source electrode and a drain electrode. The gate electrode is disposed on the flexible substrate. The organic gate dielectric layer covers the gate electrode and a portion of the flexible substrate. The oxide semiconductor layer is disposed over the organic gate dielectric layer. The first passivation layer is interposed between and in contact with the oxide semiconductor layer and the organic gate dielectric layer. The source electrode and the drain electrode are respectively connected to different sides of the oxide semiconductor layer.Type: ApplicationFiled: June 4, 2014Publication date: May 14, 2015Inventors: Cheng-Hang HSU, Hsing-Yi WU, Chia-Chun YEH, Ted-Hong SHINN
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Patent number: 9019715Abstract: A touch panel includes a substrate, a transparent sensor electrode pattern, a patterned compensation electrode, a passivation layer, a transparent shielding electrode and at least one connection structure. The substrate has a surface and includes a sensor region and a peripheral region. The transparent sensor electrode pattern is disposed on the surface of the substrate and in the sensor region. The patterned compensation electrode is disposed on the surface of the substrate and in the peripheral region, and the patterned compensation electrode and the transparent sensor electrode pattern are electrically isolated. The passivation layer is disposed on the surface of the substrate, covers the transparent sensor electrode pattern, and at least partially exposes the patterned compensation electrode. The transparent shielding electrode is disposed on the passivation layer.Type: GrantFiled: February 24, 2013Date of Patent: April 28, 2015Assignee: AU Optronics Corp.Inventors: Chia-Chun Yeh, Po-Yuan Liu, Wen-Chi Chuang, Pei-Jung Wu, Cheng-Ta Ho
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Patent number: 9012906Abstract: A thin film transistor disposed on a substrate is provided. The TFT includes a gate layer, an insulation layer, a carrier transmission layer, a passivation layer, a first source/drain layer, and a second source/drain layer. The gate layer is disposed on the substrate. The insulation layer is disposed on the gate layer. The carrier transmission layer is disposed on the insulation layer. The carrier transmission layer includes an active layer and a mobility enhancement layer. The passivation layer is disposed on the active layer. The first source/drain layer is disposed on the active layer. The second source/drain layer is disposed on the active layer. The mobility enhancement layer includes a first element. The active layer includes a second element. The electronegativity of the first element is smaller than that of the second element to enhance the carrier mobility of the active layer.Type: GrantFiled: November 29, 2012Date of Patent: April 21, 2015Assignee: E Ink Holdings Inc.Inventors: Chia-Chun Yeh, Xue-Hung Tsai, Po-Hsin Lin
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Patent number: 9000932Abstract: An electric apparatus including a display and a process unit is provided. The display has an active area and a peripheral area. The display panel including an active device array substrate, an opposite substrate opposite to the active device array substrate and a display medium between the active device array substrate and the opposite substrate. The active device array substrate has a plurality of active devices disposed in the active area and a humidity sensor disposed in the peripheral area. The humidity sensor is a thin film transistor having a metal oxide semiconductor layer. The process unit is electrically connected to the humidity sensor. The process unit calculates a humidity value according to a sensing current from the humidity sensor.Type: GrantFiled: January 16, 2013Date of Patent: April 7, 2015Assignee: E Ink Holdings Inc.Inventors: Chih-Hsuan Wang, Chia-Chun Yeh, Ted-Hong Shinn
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Publication number: 20150076588Abstract: A vertical transistor and a manufacturing method thereof are provided herein. The manufacturing method includes forming a first patterned conductive layer on a substrate; forming a patterned metal oxide layer on the first patterned conductive layer, in which the patterned metal oxide layer includes a first patterned insulator layer, a second patterned insulator layer, and a second patterned conductive layer; forming a semiconductor layer; and forming a third patterned conductive layer. The first patterned insulator layer, the second patterned insulator layer, and the second patterned conductive layer are made by using a single metal oxide material. The oxygen concentration of the second patterned conductive layer is different from the oxygen concentrations of the first patterned insulator layer and the second patterned insulator layer.Type: ApplicationFiled: March 3, 2014Publication date: March 19, 2015Applicant: E Ink Holdings Inc.Inventors: Chia-Chun YEH, Wei-Tsung CHEN, Cheng-Hang HSU, Ted-Hong SHINN
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Publication number: 20150069379Abstract: A thin file transistor includes a gate electrode, a source electrode, a drain electrode, a gate-insulating layer, and an oxide semiconductor layer. The oxide semiconductor layer includes indium-gallium-zinc oxide with a formula of InxGayZnzOw, in which x, y and z satisfy the following formulas 1.5?(y/x)?2 and 1.5?(y/z)?2. The gate-insulating layer is positioned between the gate electrode and the oxide semiconductor layer. The source electrode and the drain electrode are respectively connected to two different sides of the oxide semiconductor.Type: ApplicationFiled: March 4, 2014Publication date: March 12, 2015Applicant: E Ink Holdings Inc.Inventors: Chih-Hsuan WANG, Chia-Chun YEH, Ted-Hong SHINN
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Publication number: 20150060780Abstract: An organic light-emitting display device includes an active array substrate, an encapsulating layer, an organic light-emitting layer, an absorption layer and a sealant. The encapsulating layer is opposite to the active array substrate, and the encapsulating layer has an inner surface facing the active array substrate. The organic light-emitting layer is disposed on the active array substrate. The absorption layer is configured to absorb at least one of moisture and oxygen, and is positioned on the inner surface of the encapsulating layer.Type: ApplicationFiled: March 3, 2014Publication date: March 5, 2015Applicant: E Ink Holdings Inc.Inventors: Cheng-Hang HSU, Hsing-Yi WU, Chia-Chun YEH, Ted-Hong SHINN, Chih-Hsuan WANG
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Patent number: 8946713Abstract: Disclosed herein is an electrostatic discharge protection structure which includes a signal line, a thin-film transistor and a shunt wire. The thin-film transistor includes a gate electrode, a metal-oxide semiconductor layer, a source electrode and a drain electrode. The first metal-oxide semiconductor layer is disposed above the first gate electrode. The metal-oxide semiconductor layer has a channel region characterized in having a width/length ratio of less than 1. The source electrode is equipotentially connected to the gate electrode. The shunt wire is electrically connected to the drain electrode. When the signal line receives a voltage surge of greater than a predetermined magnitude, the voltage surge is shunted through the thin-film transistor to the shunt wire.Type: GrantFiled: November 26, 2012Date of Patent: February 3, 2015Assignee: E Ink Holdings Inc.Inventors: Xue-Hung Tsai, Chia-Chun Yeh, Henry Wang, Ted-Hong Shinn
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Patent number: 8933563Abstract: A three-dimension circuit structure includes a substrate, a first conductive layer, a filled material and a second conductive layer. The substrate has an upper surface and a cavity located at the upper surface. The first conductive layer covers the inside walls of the cavity and protrudes out the upper surface. The filled material fills the cavity and covers the first conductive layer. The second conductive layer covers the filled material and a portion of the first conductive layer, and the first conductive layer and the second conductive layer encapsulate the filled material. The material of the filled material is different from that of the first conductive layer and the second conductive layer.Type: GrantFiled: August 13, 2012Date of Patent: January 13, 2015Assignee: E Ink Holdings Inc.Inventors: Wei-Chou Lan, Ted-Hong Shinn, Henry Wang, Chia-Chun Yeh
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Publication number: 20140362306Abstract: A touch panel including a substrate, at least one touch-sensing unit, at least one connecting pad, at least a testing line, at least one ESD protection circuit, and a first isolation layer is provided. The touch-sensing unit is disposed on the substrate. The connecting pad is disposed on the substrate and electrically connected to the touch-sensing unit. The testing line is disposed on the substrate, electrically connected to the connecting pad, and extends to at least an edge of the substrate. The ESD protection circuit is disposed in the edge of the substrate and electrically connected to a ground voltage, wherein a vertical projection of the testing line to the substrate and that of the ESD protection circuit to the substrate is at least partially overlapped. The first isolation layer is disposed between the testing line and the ESD protection circuit.Type: ApplicationFiled: January 28, 2014Publication date: December 11, 2014Applicant: AU Optronics CorporationInventors: Yi-Chi CHEN, Chia-Chun YEH, Chien-Yu CHEN, Yi-Ling LIN, Yi-Hsin LIN
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Patent number: 8901555Abstract: A light sensing device is disclosed. The light sensing device includes a first light sensor and a second light sensor. The first light sensor formed on a substrate includes a first metal oxide semiconductor layer for absorbing a first light having a first waveband. The second light sensor formed on the substrate includes a second metal oxide semiconductor layer and an organic light-sensitive layer on the second metal oxide semiconductor layer for absorbing a second light having a second waveband.Type: GrantFiled: July 17, 2012Date of Patent: December 2, 2014Assignee: E Ink Holdings Inc.Inventors: Chia-Chun Yeh, Henry Wang, Wei-Chou Lan, Ted-Hong Shinn
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Patent number: 8901658Abstract: A thin film transistor (TFT) is provided, which includes a gate, a semiconductor layer, an insulation layer, a source and a drain. The semiconductor layer has a first end and a second end opposite to the first end. The insulation layer is disposed between the gate and the semiconductor layer. The source clamps the first end of the semiconductor layer and the drain clamps the second end of the semiconductor layer.Type: GrantFiled: December 4, 2012Date of Patent: December 2, 2014Assignee: E Ink Holdings Inc.Inventors: Henry Wang, Chia-Chun Yeh, Xue-Hung Tsai, Ted-Hong Shinn
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Patent number: 8896922Abstract: A display device includes a transparent active element array substrate and a color display layer. The transparent active element array substrate has a first surface and a second surface opposite to the first surface. The color display layer disposed on the first surface of the transparent active element array substrate.Type: GrantFiled: December 9, 2010Date of Patent: November 25, 2014Assignee: E Ink Holdings Inc.Inventors: Yung-Sheng Chang, Chia-Chun Yeh, Yao Peng, Ted-Hong Shinn
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Patent number: 8884869Abstract: A court border module using a display apparatus is disclosed, which uses piezoelectric elements to drive the display apparatus. When a ball hits a court border, which is defined by the display apparatus, a force is applied to the piezoelectric elements which then generate power to drive the corresponding part of the display apparatus. The color of the part of the display apparatus hit by the ball is switched. Therefore the change in the color of the court border can be observed by officials and others to instantly and objectively determine whether the ball has hit the court border.Type: GrantFiled: September 13, 2012Date of Patent: November 11, 2014Assignee: E Ink Holdings Inc.Inventors: Yao-Chou Tsai, Fang-An Shu, Chia-Chun Yeh, Ted-Hong Shinn
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Patent number: 8872173Abstract: A thin film transistor structure is provided. The thin film transistor structure includes a first transistor having a first active layer, a second transistor having a second active layer, a first protection layer contacting the first active layer, and a second protection layer contacting the second active layer. The oxygen contents of the first and the second protection layers are controlled to affect the oxygen vacancy number of the first and the second active layers to satisfy the various electronic requirements of the first and the second transistors.Type: GrantFiled: March 1, 2013Date of Patent: October 28, 2014Assignee: E Ink Holdings Inc.Inventors: Chia-Chun Yeh, Xue-Hung Tsai, Cheng-Hang Hsu, Wei-Tsung Chen, Ted-Hong Shinn
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Patent number: 8835913Abstract: A transistor structure comprises a patterned N-type transparent oxide semiconductor formed over a substrate as a base, and a patterned p-type organic polymer semiconductor formed on the patterned N-type transparent oxide semiconductor comprising a first portion and a second portion so that the patterned N-type transparent oxide semiconductor and the first portion and the second portion of the patterned p-type organic polymer semiconductor form heterojunctions therebetween respectively, wherein the first portion of the patterned p-type organic polymer semiconductor is used as an emitter, and the second portion of the patterned p-type organic polymer semiconductor is used as a collector.Type: GrantFiled: December 10, 2012Date of Patent: September 16, 2014Assignee: E Ink Holdings Inc.Inventors: Chia-Chun Yeh, Henry Wang, Yao-Chou Tsai, Sung-Hui Huang
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Patent number: 8829520Abstract: A thin film transistor (TFT) includes a gate, a semiconductor layer, an insulating layer, a source, a drain, and a current reduction layer. The insulating layer is disposed between the gate and the semiconductor layer. The source is connected to the semiconductor layer. The drain is connected to the semiconductor layer, and the source and the drain are separated from each other. The current reduction layer has a first part and a second part. The first part is disposed between the semiconductor layer and at least a part of the source, and the second part is disposed between the semiconductor layer and at least a part of the drain.Type: GrantFiled: November 26, 2012Date of Patent: September 9, 2014Assignee: E Ink Holdings Inc.Inventors: Henry Wang, Chia-Chun Yeh, Xue-Hung Tsai, Ted-Hong Shinn
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Patent number: 8797635Abstract: A color electrophoretic display includes a substrate, a segment electrode circuit layer, a transparent electrode layer, an electrophoretic display medium layer, and a colored polymer film. The segment electrode circuit layer is disposed on the substrate and is configured to display a letter and/or a pattern. The transparent electrode layer is disposed opposing the segment electrode circuit layer, and the electrophoretic display medium layer is disposed between the segment electrode circuit layer and the transparent electrode layer. The electrophoretic display medium layer is controlled by an electric field that is produced and varied by the segment electrode circuit layer and the transparent electrode layer to change brightness. The color polymer film is disposed on the transparent electrode layer to produce color. The colored polymer film includes a polymer layer and pigment particles distributed in the polymer layer.Type: GrantFiled: March 7, 2012Date of Patent: August 5, 2014Assignee: E Ink Holdings Inc.Inventors: Chia-Chun Yeh, Chi-Sheng Jiang, Henry Wang, Ted-Hong Shinn
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Patent number: 8754411Abstract: An active device is disposed on a substrate. The active device includes a metal layer, a semiconductor channel layer, an insulating layer, a source and a drain. The metal layer has a metal oxide surface away from the substrate. The insulating layer is disposed between the metal layer and the semiconductor channel layer. The source and the drain are disposed at one side of the semiconductor channel layer. A portion of the semiconductor channel layer is exposed between the source and the drain. An orthogonal projection of the metal layer on the substrate at least covers an orthogonal projection of the portion of the semiconductor channel layer exposed by the source and the drain on the substrate.Type: GrantFiled: December 26, 2012Date of Patent: June 17, 2014Assignee: E Ink Holdings Inc.Inventors: Chih-Hsuan Wang, Chia-Chun Yeh, Ted-Hong Shinn