Abstract: A package structure includes a thermal dissipation structure including a substrate, a first encapsulant laterally covering the substrate, a die disposed on the substrate and including a sensing region, a second encapsulant laterally covering the die, and a redistribution structure disposed on the die and the second encapsulant. An outer sidewall of the second encapsulant is laterally offset from an outer sidewall of the first encapsulant. The die is electrically coupled to the substrate through the redistribution structure, and the redistribution structure includes a hollow region overlying the sensing region of the die.

Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.

Abstract: The present invention provides a probe card. The probe card comprises a circuit board, a cantilever-type space transformer electrically connected to the circuit board, and a vertical probe head electrically connected to the cantilever-type space transformer. The vertical probe head comprises a probe base and a plurality of vertical probes. The cantilever-type space transformer comprises a mounting base and a plurality of cantilever converting probes, wherein each cantilever converting probe has a fixed segment and an exposed segment. The fixed segment is secured to the mounting base, and the exposed segment is located outside the mounting base. The fixing segment enters from the side of the mounting base and forms a contact at the bottom of the mounting base.

Abstract: A package structure includes a carrier substrate and a die. The carrier substrate includes through carrier vias (TCV). The die is disposed over the carrier substrate. The die includes a semiconductor substrate and conductive posts disposed over the semiconductor substrate. The semiconductor substrate is located between the conductive posts and the carrier substrate.

Abstract: A method for forming a semiconductor structure includes providing a semiconductor substrate, forming a sacrificial layer over the semiconductor substrate, etching the sacrificial layer to form a sacrificial pattern, etching the semiconductor substrate using the sacrificial pattern as an etching mask to form an active region of the semiconductor substrate, trimming the sacrificial pattern, and replacing the trimmed sacrificial pattern with a gate electrode.

Abstract: A package structure includes a carrier substrate, a die, and an encapsulant. The carrier substrate includes through carrier vias (TCV). The die is disposed over the carrier substrate. The die includes a semiconductor substrate and conductive posts disposed over the semiconductor substrate. The conductive posts face away from the carrier substrate. The encapsulant laterally encapsulates the die.

Abstract: A substrate processing chamber is provided. The chamber includes a substrate support having an upper surface, a reflector disposed above the substrate support, the reflector includes a body comprising an upper opening having a first diameter, and a bottom opening having a second diameter different than the first diameter, a flange protruding radially from an outer circumference of the body, wherein the flange comprises a plurality of holes. The chamber also includes a plurality of heating elements disposed around the reflector. The chamber further includes a plurality of support kits, each support kit comprising a bar member, and a first fastener removably coupled to the bar member, and a cooling plate coupled to the flange by the plurality of support kits.

Abstract: A manufacturing method of a semiconductor package includes the following steps. A semiconductor die set is placed adjacent to a lower conductive via. The semiconductor die set and the lower conductive via are at least laterally encapsulated with a lower encapsulating material to form a lower encapsulated semiconductor device. A lower redistribution structure is formed over the lower encapsulated semiconductor device. A sensor die is placed adjacent to an upper conductive via, wherein the sensor die has a pad and a sensing region. The sensor die and the upper conductive via are encapsulated with an upper encapsulating material to form an upper encapsulated semiconductor device. An upper redistribution structure is formed over the upper encapsulated semiconductor device, wherein the upper redistribution structure is connected to the pad and reveals the sensing region of the sensor die.

Abstract: A package structure is provided. The package structure includes a die, an encapsulant, a first redistribution line (RDL) structure, a second RDL structure, and a through via. The encapsulant laterally encapsulates the die. The first redistribution line (RDL) structure on a first side of the die and the encapsulant, wherein the first RDL structure comprises a dielectric layer and a redistribution layer in the dielectric layer. The second RDL structure is located on a second side of the die and the encapsulant. The through via extends through the encapsulant and the first redistribution line structure and connecting the second RDL structure. The through via is laterally separated from the redistribution layer by the dielectric layer therebetween.

Abstract: A three-dimensional touch device includes a flexible circuit board structure and an in-mold formed film. The flexible circuit board structure includes a flexible circuit substrate and touch electrodes disposed on the outer surface of the flexible circuit substrate. The flexible circuit substrate includes folded lines. At least two of the folded lines are not parallel to each other. A contour of the flexible circuit structure is formed by bending the flexible circuit substrate and is suitable for having a main body portion and bending portions. The bending portions are connected to the main body portion through the folded lines. The in-mold formed film encapsulates the inner surface, the outer surface and the touch electrodes. The in-mold formed film includes an exterior film layer covering the outer surface and the touch electrodes. The contour of the flexible circuit structure approaches to a part of contour of the exterior film layer.

Abstract: A semiconductor package includes a lower encapsulated semiconductor device, a lower redistribution structure, an upper encapsulated semiconductor device, and an upper redistribution structure. The lower redistribution structure is disposed over and electrically connected to the lower encapsulated semiconductor device. The upper encapsulated semiconductor device is disposed over the lower encapsulated semiconductor device and includes a sensor die having a pad and a sensing region, an upper encapsulating material at least laterally encapsulating the sensor die, and an upper conductive via extending through the upper encapsulating material and connected to the lower redistribution structure. The upper redistribution structure is disposed over the upper encapsulated semiconductor device. The upper redistribution structure covers the pad of the sensor die and has an opening located on the sensing region of the sensor die.

Abstract: A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package includes a molded semiconductor device, a first redistribution structure, and conductive vias. The molded semiconductor device comprises a sensor die with a first surface and a second surface opposite the first surface, wherein the sensor die has an input/output region and a sensing region at the first surface. The first redistribution structure is disposed on the first surface of the sensor die, wherein the first redistribution structure covers the input/output region and exposes the sensing region, and the first redistribution structure comprises a conductive layer having a redistribution pattern and a ring structure. The redistribution pattern is electrically connected with the sensor die. The ring structure surrounds the sensing region and is separated from the redistribution pattern, wherein the ring structure is closer to the sensing region than the redistribution pattern.

Abstract: A semiconductor device includes a die, a redistribution layer (RDL) structure including a first polymer layer, a second polymer layer and a UBM layer. The die is encapsulated by an encapsulant. The RDL structure is disposed over the encapsulant. The second polymer layer is disposed on the first polymer layer, wherein a transmittance of the second polymer layer is smaller than a transmittance of the first polymer layer. The UBM layer is disposed over and electrically connected to the RDL structure, wherein the UBM layer is disposed in the first polymer layer and the second polymer layer.

Abstract: A package structure including a first redistribution layer, a semiconductor die, through insulator vias, an insulating encapsulant and a second redistribution layer. The first redistribution layer includes a dielectric layer, a conductive layer, and connecting portions electrically connected to the conductive layer. The dielectric layer has first and second surfaces, the connecting portions has a first side, a second side, and sidewalls joining the first side to the second side. The first side of the connecting portions is exposed from and coplanar with the first surface of the dielectric layer. The semiconductor die is disposed on the second surface of the dielectric layer. The through insulator vias are connected to the conductive layer. The insulating encapsulant is disposed on the dielectric layer and encapsulating the semiconductor die and the through insulator vias. The second redistribution layer is disposed on the semiconductor die and over the insulating encapsulant.

Abstract: A package structure and a method of manufacturing the same are provided. The package structure includes a die, an encapsulant, a first redistribution line (RDL) structure, a second RDL structure, a conductive terminal, and a through via. The encapsulant laterally encapsulates the die. The first redistribution line (RDL) structure on a first side of the die and the encapsulant, wherein the first RDL structure comprises a dielectric layer and a redistribution layer in the dielectric layer. The second RDL structure is located on a second side of the die and the encapsulant. The conductive terminal is connected to the redistribution layer. The through via extends through the encapsulant and the redistribution layer to contact the conductive terminal and the second RDL structure.

Abstract: A sensing keyswitch including a key body, a key-sensing switch and an enabling switch is provided. The key body includes a key top, and a key driver and an enabler which can move with the key top in the same keystroke cycle. The key-sensing switch electrically connected to a key circuit is in a disabled mode to save power and cannot sense the change of the sensing intensity caused by the movement of the driver. The enabling switch is electrically connected to an enabling circuit, wherein when the enabling switch is triggered by the enabler, the enabling switch outputs an enabling signal through the enabling circuit for enabling the key-sensing switch to enter an enabled mode, so that the key-sensing switch can sense the change of the sensing intensity caused by the movement of the key driver to trigger a key signal.

Abstract: A package structure including a first redistribution layer, a semiconductor die, through insulator vias, an insulating encapsulant and a second redistribution layer. The first redistribution layer includes a dielectric layer, a conductive layer, and connecting portions electrically connected to the conductive layer. The dielectric layer has first and second surfaces, the connecting portions has a first side, a second side, and sidewalls joining the first side to the second side. The first side of the connecting portions is exposed from and coplanar with the first surface of the dielectric layer. The semiconductor die is disposed on the second surface of the dielectric layer. The through insulator vias are connected to the conductive layer. The insulating encapsulant is disposed on the dielectric layer and encapsulating the semiconductor die and the through insulator vias. The second redistribution layer is disposed on the semiconductor die and over the insulating encapsulant.

Abstract: A package structure includes a thermal dissipation structure including a substrate, a first encapsulant laterally covering the substrate, a die disposed on the substrate and including a sensing region, a second encapsulant laterally covering the die, and a redistribution structure disposed on the die and the second encapsulant. An outer sidewall of the second encapsulant is laterally offset from an outer sidewall of the first encapsulant. The die is electrically coupled to the substrate through the redistribution structure, and the redistribution structure includes a hollow region overlying the sensing region of the die.

Abstract: A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package includes a molded semiconductor device, a first redistribution structure, and conductive vias. The molded semiconductor device comprises a sensor die with a first surface and a second surface opposite the first surface, wherein the sensor die has an input/output region and a sensing region at the first surface. The first redistribution structure is disposed on the first surface of the sensor die, wherein the first redistribution structure covers the input/output region and exposes the sensing region, and the first redistribution structure comprises a conductive layer having a redistribution pattern and a ring structure. The redistribution pattern is electrically connected with the sensor die. The ring structure surrounds the sensing region and is separated from the redistribution pattern, wherein the ring structure is closer to the sensing region than the redistribution pattern.

Abstract: A device die including a first semiconductor die, a second semiconductor die, an anti-arcing layer and a first insulating encapsulant is provided. The second semiconductor die is stacked over and electrically connected to the first semiconductor die. The anti-arcing layer is in contact with the second semiconductor die. The first insulating encapsulant is disposed over the first semiconductor die and laterally encapsulates the second semiconductor die. Furthermore, methods for fabricating device dies are provided.