Patents by Inventor Chia-Hung Liu

Chia-Hung Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11410936
    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a substrate having a first surface and a second surface opposite thereto, wherein the substrate includes a wiring structure, and a first semiconductor die disposed over the first surface of the substrate and electrically coupled to the wiring structure. The package further includes a second semiconductor die disposed over the first surface of the substrate and electrically coupled to the wiring structure, wherein the first semiconductor die and the second semiconductor die are separated by a molding material. A first hole and a second hole are formed on the second surface of the substrate. Finally, a frame is disposed over the first surface of the substrate, wherein the frame surrounds the first semiconductor die and the second semiconductor die.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: August 9, 2022
    Assignee: MEDIATEK INC.
    Inventors: Tzu-Hung Lin, Chia-Cheng Chang, I-Hsuan Peng, Nai-Wei Liu
  • Publication number: 20220238406
    Abstract: A package structure and a method of manufacturing the same are provided. The package structure includes a die, an encapsulant, a first redistribution line (RDL) structure, a second RDL structure, a conductive terminal, and a through via. The encapsulant laterally encapsulates the die. The first redistribution line (RDL) structure on a first side of the die and the encapsulant, wherein the first RDL structure comprises a dielectric layer and a redistribution layer in the dielectric layer. The second RDL structure is located on a second side of the die and the encapsulant. The conductive terminal is connected to the redistribution layer. The through via extends through the encapsulant and the redistribution layer to contact the conductive terminal and the second RDL structure.
    Type: Application
    Filed: April 11, 2022
    Publication date: July 28, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Chih-Hua Chen, Hao-Yi Tsai, Yu-Chih Huang, Chia-Hung Liu, Ting-Ting Kuo
  • Publication number: 20220231849
    Abstract: A method for monitoring industrial devices includes: obtaining an access token of a cloud storage server by a management device; sending a certificate request message to the management device by a user apparatus; performing a certificate verification on the user apparatus by the management device according to the certificate request message, and sending a certificate pass message with the access token to the user apparatus by the management device after passing the certificate verification; sending an access request message with the access token and identification information to the cloud storage server by the user apparatus; and providing device data of an industrial device terminal to the user apparatus by the cloud storage server according to the access token and a privilege of the identification information.
    Type: Application
    Filed: September 14, 2021
    Publication date: July 21, 2022
    Inventor: Chia-Hung LIU
  • Publication number: 20220223491
    Abstract: A semiconductor package structure includes a first redistribution layer, a semiconductor die, a thermal spreader, and a molding material. The semiconductor die is disposed over the first redistribution layer. The thermal spreader is disposed over the semiconductor die. The molding material surrounds the semiconductor die and the thermal spreader.
    Type: Application
    Filed: December 8, 2021
    Publication date: July 14, 2022
    Inventors: Che-Hung KUO, Hsing-Chih LIU, Chia-Hao HSU
  • Patent number: 11374136
    Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.
    Type: Grant
    Filed: January 20, 2020
    Date of Patent: June 28, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Yu-Chih Huang, Chih-Hao Chang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Patent number: 11309225
    Abstract: A package structure and a method of manufacturing the same are provided. The package structure includes a die, a redistribution layer (RDL) structure, a through integrated fan-out via (TIV) and a conductive terminal. The RDL structure is disposed on and electrically connected to the die. The TIV is laterally aside the die and extends to contact a bottom surface and a sidewall of a redistribution layer of the RDL structure. The conductive terminal is electrically connected to the die through the RDL structure and the TIV.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: April 19, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Chih-Hua Chen, Hao-Yi Tsai, Yu-Chih Huang, Chia-Hung Liu, Ting-Ting Kuo
  • Publication number: 20220093511
    Abstract: A method for manufacturing a semiconductor device includes forming contacts disposed in a dielectric layer. The method of forming the contacts includes forming contact holes and then filling with a conductive material. The method of forming the contact holes includes steps of forming openings in the dielectric layer to expose active regions, introducing a first oxygen plasma and a first fluorine plasma to remove by-products and oxidize inner surfaces of the openings, introducing a second oxygen plasma and a second fluorine plasma to remove the oxidized inner surfaces and repair the active regions, introducing a third oxygen plasma to oxidize inner surfaces again to form an oxide layer, and removing the oxide layer. The cross-sectional structure of two adjacent contact holes includes a capital, a base, and a shaft between the capital and the base, wherein the shaft has a smaller width than the base and the capital.
    Type: Application
    Filed: November 30, 2021
    Publication date: March 24, 2022
    Applicant: Winbond Electronics Corp.
    Inventors: Shu-Ming Li, Chia-Hung Liu, Tzu-Ming Ou Yang
  • Patent number: 11223357
    Abstract: A keyswitch includes a circuit board, a bottom board abutting against the circuit board, a cap, a light receiver and a light emitter disposed on the circuit board and opposite to each other, a base disposed on the circuit board, a cover disposed on the base, a first elastic member disposed through the cover and the base, a support device, and a second elastic member fixed to the base and having a flexible rod. The support device is movably connected to the cap and bottom board and has a sheet structure. When the cap is pressed, the sheet structure blocks light transmission between the light emitter and the light receiver to generate a triggering signal. When the cap is pressed to make the flexible rod deform downward with the sheet structure and then cross the sheet structure, the flexible rod is released to collide with the cover to make sound.
    Type: Grant
    Filed: January 20, 2020
    Date of Patent: January 11, 2022
    Assignee: DARFON ELECTRONICS CORP.
    Inventors: Yu-Chun Hsieh, Chen Yang, Chia-Hung Liu
  • Patent number: 11217527
    Abstract: A semiconductor device and a manufacturing method of the same are provided. The semiconductor device includes a substrate having a plurality of active regions, at least one dielectric layer formed on the substrate, and a plurality of contacts disposed in the dielectric layer and contacting with the active regions. The contact is a barrel-shaped structure with a middle portion, a head portion having a perimeter small than that of the middle portion, and an end portion having a perimeter small than that of the middle portion.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: January 4, 2022
    Assignee: Winbond Electronics Corp.
    Inventors: Shu-Ming Li, Chia-Hung Liu, Tzu-Ming Ou Yang
  • Publication number: 20210375765
    Abstract: A semiconductor package includes a lower encapsulated semiconductor device, a lower redistribution structure, an upper encapsulated semiconductor device, and an upper redistribution structure. The lower redistribution structure is disposed over and electrically connected to the lower encapsulated semiconductor device. The upper encapsulated semiconductor device is disposed over the lower encapsulated semiconductor device and includes a sensor die having a pad and a sensing region, an upper encapsulating material at least laterally encapsulating the sensor die, and an upper conductive via extending through the upper encapsulating material and connected to the lower redistribution structure. The upper redistribution structure is disposed over the upper encapsulated semiconductor device. The upper redistribution structure covers the pad of the sensor die and has an opening located on the sensing region of the sensor die.
    Type: Application
    Filed: May 26, 2020
    Publication date: December 2, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ying-Cheng Tseng, Hao-Yi Tsai, Yu-Chih Huang, Chia-Hung Liu
  • Patent number: 11164819
    Abstract: A semiconductor package includes a first wafer, a second wafer, and an interconnect. The first wafer includes a first die, a first encapsulating material encapsulating the first die, and a first redistribution structure disposed over the first die and the first encapsulating material. The second wafer includes a second die, a second encapsulating material encapsulating the second die, and a second redistribution structure disposed over the second die and the second encapsulating material, wherein the second redistribution structure faces the first redistribution structure. The interconnect is disposed between the first wafer and the second wafer and electrically connecting the first redistribution structure and the second redistribution structure, wherein the interconnect includes a substrate and a plurality of through vias extending through the substrate for connecting the first redistribution structure and the second redistribution structure.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: November 2, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ying-Cheng Tseng, Hao-Yi Tsai, Tin-Hao Kuo, Chia-Hung Liu, Chi-Hui Lai
  • Patent number: 11158555
    Abstract: A package structure including a semiconductor die, an insulating encapsulant, and a redistribution layer is provided. The semiconductor die includes a semiconductor substrate, a plurality of metallization layers disposed on the semiconductor substrate, and a passivation layer disposed on the plurality of metallization layers. The passivation layer has a first opening that partially expose a topmost layer of the plurality of metallization layers. The insulating encapsulant is encapsulating the semiconductor die. The redistribution layer includes at least a first dielectric layer and a first conductive layer stacked on the first dielectric layer. The first dielectric layer has a second opening that overlaps with the first opening, and a width ratio of the second opening to the first opening is in a range of 2.3:1 to 12:1. The first conductive layer is electrically connected to the topmost layer of the plurality of metallization layers through the first and second openings.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: October 26, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Ting Kuo, Chih-Hua Chen, Hao-Yi Tsai, Yu-Chih Huang, Chia-Hung Liu, Chih-Hsuan Tai, Ying-Cheng Tseng
  • Publication number: 20210305113
    Abstract: A manufacturing method of a semiconductor package including the following steps is provided. A redistribution structure is formed over an encapsulated semiconductor device carried by a carrier, wherein the redistribution structure includes an organic polymer layer and a redistribution circuit layer electrically connected to the semiconductor device. An inorganic protection layer is formed to entirely cover an upper surface of the redistribution structure, wherein an oxygen and/or water vapor permeability of the inorganic protection layer is substantially lower than an oxygen and/or vapor permeability of the organic polymer layer. An adhesive is formed on the inorganic protection layer. An insulating cover is adhered on the inorganic protection layer through the adhesive.
    Type: Application
    Filed: June 10, 2021
    Publication date: September 30, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Hao Tseng, Hung-Jui Kuo, Ming-Che Ho, Chia-Hung Liu
  • Publication number: 20210280511
    Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.
    Type: Application
    Filed: May 10, 2021
    Publication date: September 9, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Tsung-Hsien Chiang, Yu-Chih Huang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Publication number: 20210272941
    Abstract: A package structure including a first redistribution layer, a semiconductor die, through insulator vias, an insulating encapsulant and a second redistribution layer. The first redistribution layer includes a dielectric layer, a conductive layer, and connecting portions electrically connected to the conductive layer. The dielectric layer has first and second surfaces, the connecting portions has a first side, a second side, and sidewalls joining the first side to the second side. The first side of the connecting portions is exposed from and coplanar with the first surface of the dielectric layer. The semiconductor die is disposed on the second surface of the dielectric layer. The through insulator vias are connected to the conductive layer. The insulating encapsulant is disposed on the dielectric layer and encapsulating the semiconductor die and the through insulator vias. The second redistribution layer is disposed on the semiconductor die and over the insulating encapsulant.
    Type: Application
    Filed: May 17, 2021
    Publication date: September 2, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Yu-Chih Huang, Chia-Hung Liu, Ting-Ting Kuo, Ban-Li Wu, Ying-Cheng Tseng, Chi-Hui Lai
  • Patent number: 11108393
    Abstract: An optical keyswitch includes a keycap, a supporting mechanism having a protrusion disposed under the keycap to support the keycap to move downward or upward, and a switch module including a circuit board, an emitter, and a receiver. The emitter and the receiver are electrically connected to the circuit board. The emitter emits an optical signal to the receiver. When the keycap is not pressed, the receiver receives the optical signal of a first intensity. When the keycap is pressed, the protrusion moves along with the keycap, and the protrusion changes the optical signal received by the receiver to have a second intensity different from the first intensity, so the switch module is triggered to generate a triggering signal.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: August 31, 2021
    Assignee: DARFON ELECTRONICS CORP.
    Inventors: Chen Yang, Yu-Chun Hsieh, Yung-Chih Wang, Chia-Hung Liu, Ching-Yu Wang, Li-Te Chang
  • Publication number: 20210249203
    Abstract: A keyswitch structure includes a base, a cap disposed corresponding to the base, a restoring member disposed between the base and the cap, and a tactile adjustment unit. The cap has a cam portion movable relative to the base. The restoring member is configured to provide a restoring force to enable the cam portion to move away from the base. The tactile adjustment unit is disposed corresponding to the cam portion and includes a holder and a tactile feedback member mounted on the holder. The holder is movable relative to the base to change a position of the tactile feedback member relative to the cam portion, so as to change a pressing force required for the cam portion to move toward the base.
    Type: Application
    Filed: February 4, 2021
    Publication date: August 12, 2021
    Inventors: Chen YANG, Chia-Hung LIU, Yu-Chun HSIEH
  • Patent number: 11056412
    Abstract: A semiconductor package includes an encapsulated semiconductor device, a redistribution structure, and a protection layer. The encapsulated semiconductor device includes a semiconductor device and an encapsulating material encapsulating the semiconductor device. The redistribution structure is disposed on the encapsulated semiconductor device and includes a dielectric layer and a redistribution circuit layer electrically connected to the semiconductor device. The protection layer at least covers the dielectric layer, wherein an oxygen permeability or a water vapor permeability of the protection layer is substantially lower than an oxygen permeability or a vapor permeability of the dielectric layer.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: July 6, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Hao Tseng, Hung-Jui Kuo, Ming-Che Ho, Chia-Hung Liu
  • Publication number: 20210175169
    Abstract: A semiconductor device and a manufacturing method of the same are provided. The semiconductor device includes a substrate having a plurality of active regions, at least one dielectric layer formed on the substrate, and a plurality of contacts disposed in the dielectric layer and contacting with the active regions. The contact is a barrel-shaped structure with a middle portion, a head portion having a perimeter small than that of the middle portion, and an end portion having a perimeter small than that of the middle portion.
    Type: Application
    Filed: December 10, 2019
    Publication date: June 10, 2021
    Applicant: Winbond Electronics Corp.
    Inventors: Shu-Ming Li, Chia-Hung Liu, Tzu-Ming Ou Yang
  • Patent number: 11018667
    Abstract: An optical keyswitch includes a keycap, a supporting mechanism having a protrusion disposed under the keycap to support the keycap to move downward or upward, and a switch module including a circuit board, an emitter, and a receiver. The emitter and the receiver are electrically connected to the circuit board. The emitter emits an optical signal to the receiver. When the keycap is not pressed, the receiver receives the optical signal of a first intensity. When the keycap is pressed, the protrusion moves along with the keycap, and the protrusion changes the optical signal received by the receiver to have a second intensity different from the first intensity, so the switch module is triggered to generate a triggering signal.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: May 25, 2021
    Assignee: DARFON ELECTRONICS CORP.
    Inventors: Chen Yang, Yu-Chun Hsieh, Yung-Chih Wang, Chia-Hung Liu