Patents by Inventor Chia-Hung Liu

Chia-Hung Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230268417
    Abstract: A method for forming a semiconductor structure includes providing a semiconductor substrate, forming a sacrificial layer over the semiconductor substrate, etching the sacrificial layer to form a sacrificial pattern, etching the semiconductor substrate using the sacrificial pattern as an etching mask to form an active region of the semiconductor substrate, trimming the sacrificial pattern, and replacing the trimmed sacrificial pattern with a gate electrode.
    Type: Application
    Filed: April 20, 2023
    Publication date: August 24, 2023
    Inventors: Shu-Ming LEE, Yung-Han CHIU, Chia-Hung LIU, Tzu-Ming OU YANG
  • Patent number: 11735380
    Abstract: A keyswitch structure includes a base, a cap disposed corresponding to the base, a restoring member disposed between the base and the cap, and a tactile adjustment unit. The cap has a cam portion movable relative to the base. The restoring member is configured to provide a restoring force to enable the cam portion to move away from the base. The tactile adjustment unit is disposed corresponding to the cam portion and includes a holder and a tactile feedback member mounted on the holder. The holder is movable relative to the base to change a position of the tactile feedback member relative to the cam portion, so as to change a pressing force required for the cam portion to move toward the base.
    Type: Grant
    Filed: November 30, 2022
    Date of Patent: August 22, 2023
    Assignee: DARFON ELECTRONICS CORP.
    Inventors: Chen Yang, Chia-Hung Liu, Yu-Chun Hsieh
  • Publication number: 20230207472
    Abstract: A semiconductor package includes a lower encapsulated semiconductor device, a lower redistribution structure, an upper encapsulated semiconductor device, and an upper redistribution structure. The lower redistribution structure is disposed over and electrically connected to the lower encapsulated semiconductor device. The upper encapsulated semiconductor device is disposed over the lower encapsulated semiconductor device and includes a sensor die having a pad and a sensing region, an upper encapsulating material at least laterally encapsulating the sensor die, and an upper conductive via extending through the upper encapsulating material and connected to the lower redistribution structure. The upper redistribution structure is disposed over the upper encapsulated semiconductor device. The upper redistribution structure covers the pad of the sensor die and has an opening located on the sensing region of the sensor die.
    Type: Application
    Filed: March 7, 2023
    Publication date: June 29, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ying-Cheng Tseng, Hao-Yi Tsai, Yu-Chih Huang, Chia-Hung Liu
  • Patent number: 11664438
    Abstract: A method for forming a semiconductor structure includes providing a semiconductor substrate, forming a sacrificial layer over the semiconductor substrate, etching the sacrificial layer to form a sacrificial pattern, etching the semiconductor substrate using the sacrificial pattern as an etching mask to form an active region of the semiconductor substrate, trimming the sacrificial pattern, and replacing the trimmed sacrificial pattern with a gate electrode.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: May 30, 2023
    Assignee: WINBOND ELECTRONICS CORP.
    Inventors: Shu-Ming Lee, Yung-Han Chiu, Chia-Hung Liu, Tzu-Ming Ou Yang
  • Publication number: 20230126259
    Abstract: A fingerprint sensor includes a die, a plurality of conductive structures, an encapsulant, a plurality of conductive patterns, a first dielectric layer, a second dielectric layer, and a redistribution structure. The die has an active surface and a rear surface opposite to the active surface. The conductive structures surround the die. The encapsulant encapsulates the die and the conductive structures. The conductive patterns are over the die and are electrically connected to the die and the conductive structures. Top surfaces of the conductive patterns are flat. The first dielectric layer is over the die and the encapsulant. A top surface of the first dielectric layer is coplanar with top surfaces of the conductive patterns. The second dielectric layer covers the first dielectric layer and the conductive patterns. The redistribution structure is over the rear surface of the die.
    Type: Application
    Filed: December 22, 2022
    Publication date: April 27, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Chih-Hua Chen, Hao-Yi Tsai, Yu-Chih Huang, Chia-Hung Liu, Ting-Ting Kuo, Ying-Cheng Tseng
  • Publication number: 20230129863
    Abstract: A sensing keyswitch including a key body, a key-sensing switch and an enabling switch is provided. The key body includes a key top, and a key driver and an enabler which can move with the key top in the same keystroke cycle. The key-sensing switch electrically connected to a key circuit is in a disabled mode to save power and cannot sense the change of the sensing intensity caused by the movement of the driver. The enabling switch is electrically connected to an enabling circuit, wherein when the enabling switch is triggered by the enabler, the enabling switch outputs an enabling signal through the enabling circuit for enabling the key-sensing switch to enter an enabled mode, so that the key-sensing switch can sense the change of the sensing intensity caused by the movement of the key driver to trigger a key signal.
    Type: Application
    Filed: August 24, 2022
    Publication date: April 27, 2023
    Applicant: Darfon Electronics Corp.
    Inventors: Yu Chun HSIEH, Chen YANG, Chia Hung LIU, Shao Lun HSIAO
  • Patent number: 11631642
    Abstract: A method for manufacturing a semiconductor device includes forming contacts disposed in a dielectric layer. The method of forming the contacts includes forming contact holes and then filling with a conductive material. The method of forming the contact holes includes steps of forming openings in the dielectric layer to expose active regions, introducing a first oxygen plasma and a first fluorine plasma to remove by-products and oxidize inner surfaces of the openings, introducing a second oxygen plasma and a second fluorine plasma to remove the oxidized inner surfaces and repair the active regions, introducing a third oxygen plasma to oxidize inner surfaces again to form an oxide layer, and removing the oxide layer. The cross-sectional structure of two adjacent contact holes includes a capital, a base, and a shaft between the capital and the base, wherein the shaft has a smaller width than the base and the capital.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: April 18, 2023
    Assignee: Winbond Electronics Corp.
    Inventors: Shu-Ming Li, Chia-Hung Liu, Tzu-Ming Ou Yang
  • Publication number: 20230097110
    Abstract: A keyswitch structure includes a base, a cap disposed corresponding to the base, a restoring member disposed between the base and the cap, and a tactile adjustment unit. The cap has a cam portion movable relative to the base. The restoring member is configured to provide a restoring force to enable the cam portion to move away from the base. The tactile adjustment unit is disposed corresponding to the cam portion and includes a holder and a tactile feedback member mounted on the holder. The holder is movable relative to the base to change a position of the tactile feedback member relative to the cam portion, so as to change a pressing force required for the cam portion to move toward the base.
    Type: Application
    Filed: November 30, 2022
    Publication date: March 30, 2023
    Inventors: Chen YANG, Chia-Hung LIU, Yu-Chun HSIEH
  • Publication number: 20230065405
    Abstract: A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package includes a molded semiconductor device, a first redistribution structure, and conductive vias. The molded semiconductor device comprises a sensor die with a first surface and a second surface opposite the first surface, wherein the sensor die has an input/output region and a sensing region at the first surface. The first redistribution structure is disposed on the first surface of the sensor die, wherein the first redistribution structure covers the input/output region and exposes the sensing region, and the first redistribution structure comprises a conductive layer having a redistribution pattern and a ring structure. The redistribution pattern is electrically connected with the sensor die. The ring structure surrounds the sensing region and is separated from the redistribution pattern, wherein the ring structure is closer to the sensing region than the redistribution pattern.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chih Huang, Chih-Hao Chang, Po-Chun Lin, Chun-Ti Lu, Zheng-Gang Tsai, Shih-Wei Chen, Chia-Hung Liu, Hao-Yi Tsai, Chung-Shi Liu
  • Publication number: 20230049326
    Abstract: A device die including a first semiconductor die, a second semiconductor die, an anti-arcing layer and a first insulating encapsulant is provided. The second semiconductor die is stacked over and electrically connected to the first semiconductor die. The anti-arcing layer is in contact with the second semiconductor die. The first insulating encapsulant is disposed over the first semiconductor die and laterally encapsulates the second semiconductor die. Furthermore, methods for fabricating device dies are provided.
    Type: Application
    Filed: August 13, 2021
    Publication date: February 16, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Wei Chen, Tzuan-Horng Liu, Chia-Hung Liu, Hao-Yi Tsai
  • Patent number: 11580767
    Abstract: A fingerprint sensor includes a die, a plurality of conductive structures, an encapsulant, a plurality of conductive patterns, a first dielectric layer, a second dielectric layer, and a redistribution structure. The die has an active surface and a rear surface opposite to the active surface. The conductive structures surround the die. The encapsulant encapsulates the die and the conductive structures. The conductive patterns are over the die and are electrically connected to the die and the conductive structures. Top surfaces of the conductive patterns are flat. The first dielectric layer is over the die and the encapsulant. A top surface of the first dielectric layer is coplanar with top surfaces of the conductive patterns. The second dielectric layer covers the first dielectric layer and the conductive patterns. The redistribution structure is over the rear surface of the die.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: February 14, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Chih-Hua Chen, Hao-Yi Tsai, Yu-Chih Huang, Chia-Hung Liu, Ting-Ting Kuo, Ying-Cheng Tseng
  • Patent number: 11551888
    Abstract: A keyswitch structure includes a base, a cap disposed corresponding to the base, a restoring member disposed between the base and the cap, and a tactile adjustment unit. The cap has a cam portion movable relative to the base. The restoring member is configured to provide a restoring force to enable the cam portion to move away from the base. The tactile adjustment unit is disposed corresponding to the cam portion and includes a holder and a tactile feedback member mounted on the holder. The holder is movable relative to the base to change a position of the tactile feedback member relative to the cam portion, so as to change a pressing force required for the cam portion to move toward the base.
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: January 10, 2023
    Assignee: DARFON ELECTRONICS CORP.
    Inventors: Chen Yang, Chia-Hung Liu, Yu-Chun Hsieh
  • Patent number: 11495507
    Abstract: A manufacturing method of a semiconductor package including the following steps is provided. A redistribution structure is formed over an encapsulated semiconductor device carried by a carrier, wherein the redistribution structure includes an organic polymer layer and a redistribution circuit layer electrically connected to the semiconductor device. An inorganic protection layer is formed to entirely cover an upper surface of the redistribution structure, wherein an oxygen and/or water vapor permeability of the inorganic protection layer is substantially lower than an oxygen and/or vapor permeability of the organic polymer layer. An adhesive is formed on the inorganic protection layer. An insulating cover is adhered on the inorganic protection layer through the adhesive.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: November 8, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Hao Tseng, Hung-Jui Kuo, Ming-Che Ho, Chia-Hung Liu
  • Patent number: 11469474
    Abstract: A battery assembly includes a battery holding unit and a battery unit removably held by the battery holding unit. The battery unit includes a battery, a first engaging portion, and a second engaging portion. The battery holding unit includes a holding member selectively engaged with the first engaging portion or the second engaging portion to hold the battery unit at a first position or a second position. When the holding member and the first engaging portion relatively move away from each other along a disengagement direction, the battery unit moves along a detachment direction from the first position to the second position at which the holding member engages with the second engaging portion, and the second engaging portion is allowed to move to disengage from the holding member, so that the battery unit moves again along the detachment direction to be removed from the battery holding unit.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: October 11, 2022
    Assignee: DARFON ELECTRONICS CORP.
    Inventors: Chia-Hung Liu, Chien-Hung Chen
  • Publication number: 20220310499
    Abstract: A circuit substrate includes a base substrate, a plurality of conductive vias, a first redistribution circuit structure, a second redistribution circuit structure and a semiconductor die. The plurality of conductive vias penetrate through the base substrate. The first redistribution circuit structure is located on the base substrate and connected to the plurality of conductive vias. The second redistribution circuit structure is located over the base substrate and electrically connected to the plurality of conductive vias, where the second redistribution circuit structure includes a plurality of conductive blocks, and at least one of the plurality of conductive blocks is electrically connected to two or more than two of the plurality of conductive vias, and where the base substrate is located between the first redistribution circuit structure and the second redistribution circuit structure.
    Type: Application
    Filed: March 25, 2021
    Publication date: September 29, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Wei Chen, Yu-Chih Huang, Chih-Hao Chang, Po-Chun Lin, Chun-Ti Lu, Chia-Hung Liu, Hao-Yi Tsai
  • Publication number: 20220293505
    Abstract: A package structure includes a carrier substrate, a die, and a first redistribution structure. The carrier substrate has a first surface and a second surface opposite to the first surface. The carrier substrate includes an insulating body and through carrier vias (TCV) embedded in the insulating body. The die is disposed over the firs surface of the carrier substrate. The die is electrically connected to the TCVs. The first redistribution structure is disposed on the second surface of the carrier substrate.
    Type: Application
    Filed: March 11, 2021
    Publication date: September 15, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sung-Yueh Wu, Chien-Ling Hwang, Jen-Chun Liao, Ching-Hua Hsieh, Pei-Hsuan Lee, Chia-Hung Liu
  • Publication number: 20220285566
    Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.
    Type: Application
    Filed: May 23, 2022
    Publication date: September 8, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Yu-Chih Huang, Chih-Hao Chang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Publication number: 20220238406
    Abstract: A package structure and a method of manufacturing the same are provided. The package structure includes a die, an encapsulant, a first redistribution line (RDL) structure, a second RDL structure, a conductive terminal, and a through via. The encapsulant laterally encapsulates the die. The first redistribution line (RDL) structure on a first side of the die and the encapsulant, wherein the first RDL structure comprises a dielectric layer and a redistribution layer in the dielectric layer. The second RDL structure is located on a second side of the die and the encapsulant. The conductive terminal is connected to the redistribution layer. The through via extends through the encapsulant and the redistribution layer to contact the conductive terminal and the second RDL structure.
    Type: Application
    Filed: April 11, 2022
    Publication date: July 28, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Chih-Hua Chen, Hao-Yi Tsai, Yu-Chih Huang, Chia-Hung Liu, Ting-Ting Kuo
  • Publication number: 20220231849
    Abstract: A method for monitoring industrial devices includes: obtaining an access token of a cloud storage server by a management device; sending a certificate request message to the management device by a user apparatus; performing a certificate verification on the user apparatus by the management device according to the certificate request message, and sending a certificate pass message with the access token to the user apparatus by the management device after passing the certificate verification; sending an access request message with the access token and identification information to the cloud storage server by the user apparatus; and providing device data of an industrial device terminal to the user apparatus by the cloud storage server according to the access token and a privilege of the identification information.
    Type: Application
    Filed: September 14, 2021
    Publication date: July 21, 2022
    Inventor: Chia-Hung LIU
  • Patent number: 11374136
    Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.
    Type: Grant
    Filed: January 20, 2020
    Date of Patent: June 28, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Yu-Chih Huang, Chih-Hao Chang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin