Abstract: Semiconductor device and method of fabricating the same, the semiconductor device includes a substrate, a first transistor, a second transistor, a third transistor, and a plurality of shallow trench isolations. The first transistor is disposed in a medium-voltage region and includes a first plane, a first gate dielectric layer, and a first gate electrode. The second transistor is disposed in a boundary region and includes a second plane, a second gate dielectric layer, and a second gate electrode. The third transistor is disposed in a lower-voltage region and includes a third plane, a third gate dielectric layer, and a third gate electrode. The shallow trench isolations are disposed in the substrate, wherein top surfaces of the shallow trench isolations in the medium-voltage region, the boundary region and the low-voltage region are coplanar with top surfaces of the first gate dielectric layer and the second gate dielectric layer.

Abstract: The present invention provides a circuitry applied to multiple power domains. An amplifier of the circuitry includes an output stage and a switching circuit. The output stage includes a first transistor and a second transistor, wherein the first transistor is coupled between a supply voltage and an output terminal, the second transistor is coupled between the output terminal and a ground voltage. The switching circuit is configured to choose a body of the first transistor from the supply voltage or a reference voltage.

Abstract: A semiconductor structure includes a substrate having a first device region and a second device region in proximity to the first device region. A trench isolation structure is disposed in the substrate between the first device region and the second device region. The trench isolation structure includes a first bottom surface within the first device region and a second bottom surface within the second device region. The first bottom surface is coplanar with the second bottom surface.

Abstract: Presented herein are methods and compositions for enhancing specific enrichment of target sequences in a nucleic acid library. Off-target hybridization probes may be used to reduce binding and/or capture of off-target regions of a nucleic acid library in a targeted sequencing workflow. The off-target hybridization probes may be specific for locations known to generate off-target sequencing reads for a particular set of hybridization probes.

Abstract: A lithium ion secondary battery is provided. The lithium ion secondary battery includes an electrolytic tank having an accommodating space, a positive electrode disposed in the accommodating space, a negative electrode disposed in the accommodating space and spaced apart from the positive electrode, and an isolation film disposed between the positive electrode and the negative electrode. In the X-ray diffraction spectrum of a first surface of the electrolytic copper foil, a ratio of the diffraction peak intensity I(200) of the (200) crystal face of the first surface relative to the diffraction peak intensity I(111) of the (111) crystal face of the first surface is between 0.5 and 2.0. A ratio of the diffraction peak intensity I(200) of the (200) crystal face of a second surface relative to the diffraction peak intensity I(111) of the (111) crystal face of the second surface is between 0.5 and 2.0.

Abstract: A semiconductor device includes a fin structure disposed on a substrate, a shallow-trench isolation (STI) region on opposite sides of the fin structure, dielectric fin sidewall structures extending along sides of the fin structure and extending from a top of the STI region partially up the fin structure, and a source/drain region disposed within an upper portion of the fin structure. A bottom surface of the source/drain region contacts a top surface of the dielectric fin sidewall.

Abstract: A method for producing an electrolytic copper foil is provided. The method includes preparing a copper electrolytic solution including at least one addition agent and performing an electroplating step including: electrolyzing the copper electrolytic solution to form a raw foil layer. The raw foil layer has a first surface and a second surface opposite to the first surface. In the X-ray diffraction spectrum of the first surface, a ratio of the diffraction peak intensity I(200) of the (200) crystal face of the first surface relative to the diffraction peak intensity I(111) of the (111) crystal face of the first surface is between 0.5 and 2.0. A ratio of the diffraction peak intensity I(200) of the (200) crystal face of the second surface relative to the diffraction peak intensity I(111) of the (111) crystal face of the second surface is between 0.5 and 2.0.

Abstract: Analog and logic devices may coexist on a common integrated circuit chip, accommodating features with different pitches, linewidths, and pattern densities. Such differences in design and layout at various layers during manufacturing can cause process loading by contributing different amounts of reactants to surface chemical reactions. Such variation in the balance of chemical reactants can result in disparities in film thicknesses within the chip that can affect device performance. Embodiments of the present disclosure disclose a masking sequence that can alleviate process loading disparities during an undercut etch process adjacent to polysilicon structures.

Abstract: A computerized method of managing a robotic telemarketing call includes calling, by an automated robotic telemarketing system, a customer selected from a customer list. The method includes parsing, by a real-time speech recognition module of the automated robotic telemarketing system, a customer statement received from the customer. The method includes determining, by a language intention determining module, a customer purchase intention according to the parsed customer statement. The method includes selecting a sales pitch response corresponding to the determined customer purchase intention. The method includes providing an audio signal including the selected sales pitch response to the customer.

Abstract: Presented herein are methods and compositions for enhancing specific enrichment of target sequences in a nucleic acid library. Off-target hybridization probes may be used to reduce binding and/or capture of off-target regions of a nucleic acid library in a targeted sequencing workflow. The off-target hybridization probes may be specific for locations known to generate off-target sequencing reads for a particular set of hybridization probes.

Abstract: Aspects of the present disclosure provide methods, apparatuses, and systems for non-linear breathing entrainment. As described herein, “breathing entrainment” refers to guiding a user's breath or breathing. According to an aspect, an initial breathing period and a final breathing period are selected. Based on the initial and final breathing periods, a non-linear breath rate per minute sequence is determined. A guiding stimulus is output and aligned with the non-linear breath rate per minute sequence. The guiding stimulus is non-linearly altered with the non-linear breath rate per minute sequence to align with the final breathing period over an interval of time. The non-linear alterations of the guiding stimulus vary based on an amount of time the guiding stimulus has been output.

Abstract: The present invention discloses a method of preparing a specimen for scanning capacitance microscopy, comprising the steps of: providing a sample including at least one object to be analyzed; manually grinding the sample from an edge of the sample toward a target region containing the object to be analyzed gradually, and stopping at a distance of dl from a longitudinal section of the at least one object to be analyzed in the target region to form a grinding stopping surface; cutting the grinding stopping surface by a plasma focused ion beam equipped with a scanning electron microscopy toward the target region and stopping at a distance of d2 from the longitudinal section to form a cutting stopping surface, wherein 0<d2<d1; and manually grinding to polish the cutting stopping surface and gradually remove the part of the sample between the longitudinal section and the cutting stopping surface to expose the longitudinal section of the at least one object to be analyzed, and complete the preparation of a sp

Abstract: The present invention discloses a method of preparing a specimen for scanning capacitance microscopy, comprising the steps of: providing a sample including at least one object to be analyzed; manually grinding the sample from an edge of the sample toward a target region containing the object to be analyzed gradually, and stopping at a distance of dl from a longitudinal section of the at least one object to be analyzed in the target region to form a grinding stopping surface; cutting the grinding stopping surface by a plasma focused ion beam equipped with a scanning electron microscopy toward the target region and stopping at a distance of d2 from the longitudinal section to form a cutting stopping surface, wherein 0<d2<d1; and manually grinding to polish the cutting stopping surface and gradually remove the part of the sample between the longitudinal section and the cutting stopping surface to expose the longitudinal section of the at least one object to be analyzed, and complete the preparation of a sp

Abstract: A method for forming a semiconductor structure includes forming a fin structure over a substrate. The method also includes forming a gate structure across the fin structure. The method also includes depositing a dopant source layer over the gate structure. The method also includes driving dopants of the dopant source layer into the fin structure. The method also includes removing the dopant source layer. The method also includes annealing the dopants in the fin structure to form a doped region. The method also includes etching the doped region and the fin structure below the doped region to form a recess. The method also includes growing a source/drain feature in the recess.

Abstract: The present invention provides a circuitry applied to multiple power domains, wherein the circuitry includes a first circuit block and second circuit block, the first circuit block is powered by a first supply voltage of a first power domain, and the second circuit block is powered by a second supply voltage of a second power domain. The first circuit block includes a first amplifier and a switching circuit. The first amplifier is configured to receive an input signal to generate a processed input signal. When the second circuit block is powered by the second supply voltage, the switching circuit is configured to forward the processed input signal to the second circuit block; and when the second circuit block is not powered by the second supply voltage, the switching circuit disconnects a path between the first amplifier and the second circuit block.

Abstract: The invention provides a method for forming a semiconductor structure, which comprises providing a substrate, sequentially a first groove and a second groove are formed in the substrate, the depth of the first groove is different from the depth of the second groove, a first oxide layer is formed in the first groove, a second oxide layer is formed in the second groove, an etching step is performed to remove part of the first oxide layer, a first gate structure is formed on the first oxide layer, and a second gate structure is formed on the second oxide layer.

Abstract: A method of fabricating a semiconductor device is described. A substrate is provided. A first semiconductor region of a first semiconductor material is formed over the substrate and adjacent a second semiconductor region of a second semiconductor material. The first and second semiconductor regions are crystalline. An etchant is selective to etch the first semiconductor region over the second semiconductor region. The entire first semiconductor region is implanted to form an amorphized semiconductor region. The amorphized semiconductor region is etched with the etchant using the second semiconductor region as a mask to remove the amorphized semiconductor region without removing the second semiconductor region.

Abstract: A method of forming source/drain features in a FinFET device includes providing a fin formed over a substrate and a gate structure formed over a fin, forming a recess in the fin adjacent to the gate structure, forming a first epitaxial layer in the recess, forming a second epitaxial layer over the first epitaxial layer, and forming a third epitaxial layer over the second epitaxial layer. The second epitaxial layer may be doped with a first element, while one or both of the first and the third epitaxial layer includes a second element different from the first element. One or both of the first and the third epitaxial layer may be formed by a plasma deposition process.

Abstract: An endoscope decontamination sheath includes a terminal section for seeing therethrough for an image and a sleeve section connected to the terminal section for receiving an endoscope to insert therein. The terminal section is of a tubular configuration. The terminal section has a front end to which a lens is mounted and a rear end in which an insertion groove is formed. The sleeve section is of an elongated tubular configuration having a front end fit into the insertion groove of the terminal section. In medical treatment of endoscopy or intubation, the endoscope is inserted into and sleeved with the sleeve section, and the endoscope sleeved with the decontamination sheath is inserted into an endotracheal tube. The matched arrangement between the lens and a lens of the endoscope helps prevent image deterioration and thus making images clearer. The decontamination sheath, after use, can be disposed of to prevent cross infection.

Abstract: An electrolytic copper foil includes a raw foil layer having a first surface and a second surface opposite to the first surface. In the X-ray diffraction spectrum of the first surface, a ratio of the diffraction peak intensity I(200) of the (200) crystal face of the first surface relative to the diffraction peak intensity I(111) of the (111) crystal face of the first surface is between 0.5 and 2.0. In the X-ray diffraction spectrum of the second surface, a ratio of the diffraction peak intensity I(200) of the (200) crystal face of the second surface relative to the diffraction peak intensity I(111) of the (111) crystal face of the second surface is also between 0.5 and 2.0. A method for producing the electrolytic copper foil, and a lithium ion secondary battery is also provided.