Abstract: In an embodiment, a device includes: a fin on a substrate, fin having a Si portion proximate the substrate and a SiGe portion distal the substrate; a gate stack over a channel region of the fin; a source/drain region adjacent the gate stack; a first doped region in the SiGe portion of the fin, the first doped region disposed between the channel region and the source/drain region, the first doped region having a uniform concentration of a dopant; and a second doped region in the SiGe portion of the fin, the second doped region disposed under the source/drain region, the second doped region having a graded concentration of the dopant decreasing in a direction extending from a top of the fin to a bottom of the fin.

Abstract: Various embodiments of the present disclosure are directed toward an integrated chip including an undoped layer overlying a substrate. A first barrier layer overlies the undoped layer. A doped layer overlies the first barrier layer. Further, a second barrier layer overlies the first barrier layer, where the second barrier layer is laterally offset from a perimeter of the doped layer by a non-zero distance. The first and second barrier layers comprise a same III-V semiconductor material. A first atomic percentage of a first element within the first barrier layer is less than a second atomic percentage of the first element within the second barrier layer.

Abstract: A semiconductor structure includes a two-dimensional array of unit cell structures overlying a substrate. Each unit cell structure includes an active layer, a gate dielectric underlying the active layer, two gate electrodes underlying the gate dielectric, and two source electrodes and a drain electrode overlying the active layer. Word lines underlie the active layers. Each unit cell structure includes portions of a respective set of four word lines, which includes two word lines that are electrically connected to two electrodes in the unit cell structure and two additional word lines that are electrically isolated from the two electrodes in the unit cell structure.

Abstract: A method of forming source/drain features in a FinFET device includes providing a fin formed over a substrate and a gate structure formed over a fin, forming a recess in the fin adjacent to the gate structure, forming a first epitaxial layer in the recess, forming a second epitaxial layer over the first epitaxial layer, and forming a third epitaxial layer over the second epitaxial layer. The second epitaxial layer may be doped with a first element, while one or both of the first and the third epitaxial layer includes a second element different from the first element. One or both of the first and the third epitaxial layer may be formed by a plasma deposition process.

Abstract: A signal processing circuit includes an input buffer circuit and a direct-(DC) voltage detector circuit. The input buffer circuit is coupled to a pin. The pin is configured to receive an input signal. The DC voltage detector circuit is coupled to the pin and the input buffer circuit. The DC voltage detector circuit is configured to detect the input signal to generate a mode signal and generate a bias of the input buffer circuit according to the mode signal.

Abstract: A method of forming a semiconductor device including performing an ion implantation on a substrate and etching the substrate and semiconductor devices formed by the same are disclosed. In an embodiment, a method includes forming a transistor on a first side of a substrate; performing an ion implantation on a second side of the substrate opposite the first side; after performing the ion implantation, etching the substrate to remove the substrate and form a first recess; and forming a dielectric layer in the first recess.

Abstract: In an embodiment, a device includes: a fin on a substrate, fin having a Si portion proximate the substrate and a SiGe portion distal the substrate; a gate stack over a channel region of the fin; a source/drain region adjacent the gate stack; a first doped region in the SiGe portion of the fin, the first doped region disposed between the channel region and the source/drain region, the first doped region having a uniform concentration of a dopant; and a second doped region in the SiGe portion of the fin, the second doped region disposed under the source/drain region, the second doped region having a graded concentration of the dopant decreasing in a direction extending from a top of the fin to a bottom of the fin.

Abstract: In accordance with some embodiments, a method is provided. The method includes: forming a semiconductor fin protruding from a substrate; depositing a spacer layer over the semiconductor fin; after the depositing the spacer layer over the semiconductor fin, implanting a first dopant in the spacer layer and depositing a dopant layer of the first dopant on the spacer layer in alternating repeating steps; removing the dopant layer; and performing a thermal anneal process to drive the first dopant into the semiconductor fin from the spacer layer.

Abstract: Various methods, apparatuses/systems, and media for integrating data are provided. A processor implements a data processing framework configured to run native on a big data platform and abstracts data processing constructs to a user friendly template, thereby eliminating necessity of user initiated tasks of instantiating language level objects. The processor also implements a core set of data pipeline configurations on the template configured to initiate a chain of user defined data transformations. A receiver operatively connected with the processor via a communication network receives input of the chain of the user defined data transformations. The processor tests each transformation independently of each other and outputs data integration solutions on the big data platform based on a positive test result.

Abstract: Aspects of the present disclosure provide methods, apparatuses, and systems for non-linearly decreasing an auditory experience output. According to an aspect, a non-linear decreasing rate is applied to an audio output of the auditory experience. The non-linear decreasing rate varies as a function of decibel amplitude over time in seconds. The non-linear decreasing rate comprises a plurality of segments connected together. The audio of the guided breathing is output at the non-linear decreasing rate until a decibel level of the audio output is below one of a decibel level of ambient noises in a user's environment or a predetermined decibel level.

Abstract: A touch function setting method is provided. The method comprising: receiving a sequence parameter which includes multiple clicks, each of the clicks is corresponding to one of areas of a touch panel or screen; receiving a function parameter corresponding to the sequence parameter, the function parameter is corresponding to activate a function; and storing a group of touch function parameters, which includes the sequence parameter and the function parameter.

Abstract: A qubit device may include a closed loop comprising one or more polycrystalline spin-triplet superconductors. The closed loop may maintain a half-quantum magnetic flux in a ground state. A qubit device may include a closed loop comprising one or more single crystalline spin-triplet superconductors connected by one or more s-wave superconductors. The closed loop may maintain a half-quantum magnetic flux in a ground state.

Abstract: A bio-polyol composition, a foam composition, and a foam material are provided. The bio-polyol composition includes 25-70 parts by weight of lignin; 30-75 parts by weight of non-amine-based polyol; and, 2-17 parts by weight of amine-based polyether polyol. In particular, the sum of the weight of the lignin and the non-amine-based polyol is 100 parts by weight.

Abstract: An electronic device includes a first body, a second body, two hinges, and at least one electronic assembly. The two hinges are connected between the first body and the second body, and the first body and the second body are adapted to rotate relatively through the two hinges. The electronic assembly is connected to the second body and is located between the two hinges.

Abstract: In accordance with some embodiments, a method is provided. The method includes: forming a semiconductor fin protruding from a substrate; depositing a spacer layer over the semiconductor fin; after the depositing the spacer layer over the semiconductor fin, implanting a first dopant in the spacer layer and depositing a dopant layer of the first dopant on the spacer layer in alternating repeating steps; removing the dopant layer; and performing a thermal anneal process to drive the first dopant into the semiconductor fin from the spacer layer.

Abstract: A spin-orbit torque device is disclosed, which includes: a magnetic layer; and a non-magnetic layer adjacent to the magnetic layer and comprising a spin-Hall material, wherein the spin-Hall material comprises NixCu1-x alloy, and x is in a range from 0.4 to 0.8.

Abstract: A high hardness flexible hard coating film is disclosed. The high hardness flexible hard coating film comprises a substrate film and a hard coating layer. The hard coating layer comprises a (meth)acrylate binder and reactive silica nanoparticles, wherein the reactive silica nanoparticles comprise reactive (meth)acrylate modified silica nanoparticles and reactive (meth)acrylate-polyhedral oligomeric silsesquioxane (POSS) modified silica nanoparticles. The high hardness flexible hard coating film will not crack or fracture under an dynamic inward folding test for performing 180° bend testing at a radius of 1 mm with 2×105 times, and the pencil hardness (JIS K 5400) thereof is 6H or more.

Abstract: Disclosed is a semiconductor device and a method for fabricating such semiconductor device, specifically a High Electron Mobility Transistor (HEMT) with a back barrier layer for blocking electron leakage and improve threshold voltage. In one embodiment, a semiconductor device, includes: a Gallium Nitride (GaN) layer; a front barrier layer over the GaN layer; a source electrode, a drain electrode and a gate electrode formed over the front barrier layer; a 2-Dimensional Electron Gas (2-DEG) in the GaN layer at a first interface between the GaN layer and the front barrier layer; and a back barrier layer in the GaN layer, wherein the back barrier layer comprises Aluminum Nitride (AlN).

Abstract: Strain relief trenches may be formed in a substrate prior to growth of an epitaxial layer on the substrate. The trenches may reduce the stresses and strains on the epitaxial layer that occur during the epitaxial growth process due to differences in material properties (e.g., lattice mismatches, differences in thermal expansion coefficients, and/or the like) between the epitaxial layer material and the substrate material. The stress and strain relief provided by the trenches may reduce or eliminate cracks and/or other types of defects in the epitaxial layer and the substrate, may reduce and/or eliminate bowing and warping of the substrate, may reduce breakage of the substrate, and/or the like. This may increase the center-to-edge quality of the epitaxial layer, may permit epitaxial layers to be grown on larger substrates, and/or the like.

Abstract: A method of sidelink communications by a plurality of user equipment (UE) without the control of a base station in a wireless communication system is disclosed. In one embodiment, the UE being a scheduler end is configured to allocate the resources for initial/repeated transmissions and ACK/NACK messages, and also transmit information regarding the allocated resources to both the UEs being a transmitter end and a receiver end. In one embodiment, retransmission is performed when none of the scheduler and transmitter ends has received the ACK message sent by the receiver end, so as to minimize redundant retransmission in consideration of transmission reliability. In one embodiment, retransmission is performed when at least one of the scheduler and transmitters end has received the NACK message sent by the receiver end before the retransmission timer has reached to zero, so as to minimize transmission latency.