Abstract: A chip package and a fabrication method thereof are provided according to an embodiment of the invention. The chip package includes a semiconductor substrate containing a chip and having a device area and a peripheral bonding pad area. A plurality of conductive pads is disposed at the peripheral bonding pad area and a passivation layer is formed over the semiconductor substrate to expose the conductive pads. An insulating protective layer is formed on the passivation layer at the device area. A packaging layer is disposed over the insulating protective layer to expose the conductive pads and the passivation layer at the peripheral bonding pad area. The method includes forming an insulating protective layer to cover a plurality of conductive pads during a cutting process and removing the insulating protective layer on the conductive pads through an opening of a packaging layer.

Abstract: An embodiment of the present invention relates to a chip package and fabrication method thereof, which includes a chip protection layer or an additional etching stop layer to cover conducting pads to prevent dicing residue from damaging or scratching the conducting pads. According to another embodiment, a chip protection layer, an additional etching stop layer formed thereon, or a metal etching stop layer level with conducting pads or combinations thereof may be used when etching an intermetal dielectric layer at a structural etching region and a silicon substrate to form an opening for subsequent semiconductor manufacturing processes.

Abstract: Systems and methods for obtaining camera parameters from images are provided. First, a sequence of original images associated with a target object under circular motion is obtained. Then, a background image and a foreground image corresponding to the target object within each original image are segmented. Next, shadow detection is performed for the target object within each original image. A first threshold and a second threshold are respectively determined according to the corresponding background and foreground images. Each original image, the corresponding background image, the first and second threshold are used for obtaining silhouette data and feature information associated with the target object within each original image. At least one camera parameter is obtained based on the entire feature information and the geometry of circular motion.

Abstract: A chip package includes a substrate having a pad region, a device region, and a remained scribe region located at a periphery of the substrate; a signal and an EMI ground pads disposed on the pad region; a first and a second openings penetrating into the substrate to expose the signal and the EMI ground pads, respectively; a first and a second conducting layers located in the first and the second openings and electrically connecting the signal and the EMI ground pads, respectively, wherein the first conducting layer and the signal pad are separated from a periphery of the remained scribe region, and wherein a portion of the second conducting layer and/or the EMI ground pad extend(s) to a periphery of the remained scribe region; and a third conducting layer surrounding the periphery of the remained scribe region to electrically connect the second conducting layer and/or the EMI ground pad.

Abstract: A power MOSFET package includes a semiconductor substrate having opposite first and second surfaces, having a first conductivity type, and forming a drain region, a doped region extending downward from the first surface and having a second conductivity type, a source region in the doped region and having the first conductivity type, a gate overlying or buried under the first surface, wherein a gate dielectric layer is between the gate and the semiconductor substrate, a first conducting structure overlying the semiconductor substrate, having a first terminal, and electrically connecting the drain region, a second conducting structure overlying the semiconductor substrate, having a second terminal, and electrically connecting the source region, a third conducting structure overlying the semiconductor substrate, having a third terminal, and electrically connecting the gate, wherein the first, the second, and the third terminals are substantially coplanar, and a protection layer between the semiconductor substrat

Abstract: A structure of a critical dimension bar. The critical dimension bar is formed on a substrate between the dies. A base layer is formed on a portion of the substrate, and a critical material layer is formed on the die, the base layer and the substrate with a uniform thickness. The base layer has a thickness to result in a surface profile the same as the die. A die photomask pattern, a first and a second test photomask patterns on a photomask are then transferred to the critical material on dies, the base layer and the substrate, respectively. These three photomask patterns have the same pattern width.

Abstract: A structure of a critical dimension bar. The critical dimension bar is formed on a substrate between the dies. A base layer is formed on a portion of the substrate, and a critical material layer is formed on the die, the base layer and the substrate with a uniform thickness. The base layer has a thickness to result in a surface profile the same as the die. A die photomask pattern, a first and a second test photomask patterns on a photomask are then transferred to the critical material on dies, the base layer and the substrate, respectively. These three photomask patterns have the same pattern width.

Abstract: A structure of a critical dimension bar. The critical dimension bar is formed on a substrate between the dies. A base layer is formed on a portion of the substrate, and a critical material layer is formed on the die, the base layer and the substrate with a uniform thickness. The base layer has a thickness to result in a surface profile the same as the die. A die photomask pattern, a first and a second test photomask patterns on a photomask are then transferred to the critical material on dies, the base layer and the substrate, respectively. These three photomask patterns have the same pattern width.