Abstract: A voltage adjustment device comprises a voltage detector and a signal emitter. The voltage detector electrically connects to an electrical device through a power rail and obtains a voltage detected value of the power rail. The signal emitter electrically connects to the voltage detector and is configured to electrically connect to a host and a power board. The signal emitter generates a power good signal and sends the power good signal to the host when the voltage detected value is larger than a baseline voltage value for the first time. After sending the power good signal, the signal emitter generates a voltage adjustment signal according to the voltage detected value and is configured to send the voltage adjustment signal to the power board for selectively adjusting a voltage provided by the power board.

Abstract: In an example, a sealing member includes a solid body portion and a peripheral beading hinged to the solid body portion. The peripheral beading has an inner perimeter corresponding to an outer perimeter of the solid body portion. Further, in a protracted position, the peripheral beading is to fit around an edge of the solid body portion bearing an interference fit with the solid body portion.

Abstract: A power distribution board for a modular chassis system, wherein the modular chassis system is configured to install a plurality of electrical devices, and the power distribution board comprises: a plurality of detecting pins, a microcontroller and a plurality of protecting circuits. The plurality of detecting pins electrically connects to the plurality of electrical devices respectively, and each detecting pins is configured to detect a modular type of a respective one of the electrical devices. The microcontroller electrically connects to the plurality of the detecting pins and selectively chooses one of a plurality of configurations according to the detected modular type. Each of the protecting circuits electrically connects to the microcontroller and corresponds to one of the electrical devices, each of the protecting circuits set a rated power value according to the chosen one of the configurations.

Abstract: A method for hot-plugging identification adapted to a server, comprising the following steps: receiving a plurality of position messages and a plurality of codes by a microcontroller disposed on a backplane, with each of the plurality of position messages and each of the plurality of codes corresponding to a respective one of a plurality of hardware devices; generating a mapping table according to the plurality of position messages and the plurality of codes by the microcontroller, with the mapping table comprising a set of sequence information; delivering the set of sequence information to each of a plurality of central processors by the microcontroller; and identifying at least one of the plurality of hardware devices, to be controlled, by each of the plurality of central processors according to the set of sequence information.

Abstract: A deblocking filtering method includes receiving reconstructed video data associated with a block boundary in a video coding system. The block boundary has N lines of samples crossing the block boundary from a P side to a Q side of the boundary. The method further includes determining whether to apply a first filter set to reduce block artifacts at the block boundary based on whether a first inter-side difference of a first line of the N lines of samples is greater than an inter-side difference threshold, determining a filter length of a filter in the first filter set based on a first side length of the P side, and a second side length of the Q side when it is determined to apply the first filter set, and applying at least one filter in the first filter set with the determined filter length on the block boundary.

Abstract: The present subject matter describes an electronic card holder. In an example implementation, the electronic card holder includes a housing having a slot to receive an electronic card. A slidable frame in the housing is to hold the electronic card. The slidable frame has a stud fittable in a groove in the housing. The card holder includes a resilient element with one end being coupled to the housing and other end being coupled to the slidable frame. The card holder further includes an actuating member coupled to the groove. When the electronic card is pushed inside the housing, the slidable frame is moved to lock the stud inside the groove and compress the resilient element. When the actuating member is pushed, the stud is released from the groove and the resilient element is relaxed to move the slidable frame such that the electronic card is pushed out of the housing.

Abstract: In an example, a connector port assembly for use in an electronic device is disclosed. The connector port assembly may include a connector port, a fastener assembly and a flexible ring. The fastener assembly may fasten the connector port to a casing of the electronic device through at least one resilient member. The flexible ring may be disposed around an outer surface of the connector port. The fastener assembly and flexible ring may provide bend angle for the connector port.

Abstract: The ranging device includes a clock generator, a light emitter, a light sensor, and a ranging control circuit. The clock generator outputs a reference clock signal. The light emitter generates an emitted light signal modulated by the reference clock signal and emits the emitted light signal to an object. The light sensor receives a reflected light signal reflected from the object to generate a light sensing signal. The ranging control circuit includes a variable delay line. The ranging control circuit receives the reference clock signal and the light sensing signal, and generates a ranging signal accordingly to track an energy characteristic point of the light sensing signal.

Abstract: Video data may be palette decoded. Data defining a palette table may be received. The palette table may comprise index values corresponding to respective colors. Palette index prediction data may be received and may comprise data indicating index values for at least a portion of a palette index map mapping pixels of the video data to color indices in the palette table. The palette index prediction data may comprise run value data associating run values with index values for at least a portion of a palette index map. A run value may be associated with an escape color index. The palette index map may be generated from the palette index prediction data at least in part by determining whether to adjust an index value of the palette index prediction data based on a last index value. The video data may be reconstructed in accordance with the palette index map.

Abstract: Video data may be palette decoded. Data defining a palette table may be received. The palette table may comprise index values corresponding to respective colors. Palette index prediction data may be received and may comprise data indicating index values for at least a portion of a palette index map mapping pixels of the video data to color indices in the palette table. The palette index prediction data may comprise run value data associating run values with index values for at least a portion of a palette index map. A run value may be associated with an escape color index. The palette index map may be generated from the palette index prediction data at least in part by determining whether to adjust an index value of the palette index prediction data based on a last index value. The video data may be reconstructed in accordance with the palette index map.

Abstract: Video data, e.g., screen content video data may be palette coded. A palette table including one or more color indices may be produced. A color index may correspond to one color. A palette index map may be created that maps one or more pixels of the video data to a color index in the palette table, or a color that may be explicitly coded. A palette index map prediction data may be generated that includes data that indicates values in the palette index map associated with at least some portions of the video data that are generated in a traverse scan order in which a scan line is scanned in an opposite direction of a preceding parallel scan line.

Abstract: Video data, e.g., screen content video data may be palette coded. A palette table including one or more color indices may be produced. A color index may correspond to one color. A palette index map may be created that maps one or more pixels of the video data to a color index in the palette table, or a color that may be explicitly coded. A palette index map prediction data may be generated that includes data that indicates values in the palette index map associated with at least some portions of the video data that are generated in a traverse scan order in which a scan line is scanned in an opposite direction of a preceding parallel scan line.

Abstract: The techniques described herein relate to methods, apparatus, and computer readable media configured to encode an image or video. A slice is partitioned into a set of first units. For each first unit in the set of first units, the first unit is partitioned into a set of second units. The partitioning includes, for each second unit in the set of second units, determining whether the second unit satisfies a predetermined constraint. If the second unit does not satisfy the predetermined constraint, a first set of partitioning techniques is tested to partition the second unit. If the second unit satisfies the predetermined constraint, the first set of partitioning techniques and a second set of partitioning techniques are tested to partition the second unit. The second unit is partitioned using a technique from the first set of partitioning techniques or the second set of partitioning techniques identified by the testing.

Abstract: Semiconductor devices, FinFET devices and methods of forming the same are disclosed. One of the semiconductor devices includes a substrate, a gate over the substrate and a gate dielectric layer between the gate and the substrate. The gate dielectric layer includes an oxide-inhibiting layer having a dielectric constant greater than about 8 and being in an amorphous state.

Abstract: A latch is disclosed. The latch has a hook that rotates to engage with a case for a computer. The hook has one side fabricated from a ferrous material. The hook is unlatched by placing a magnet near the ferrous material thereby causing the hook to rotate and disengage with the top case.

Abstract: A system for controlling excess bias of a single photon avalanche photo diode (SPAD) is provided. The system includes a power supply, a SPAD, a control circuit and a load. The power supply generates a supply voltage. The SPAD has a first terminal receiving the supply voltage and a second terminal generating an output voltage signal. The control circuit is connected to the second terminal of the SPAD. The load has a first terminal connected to the second terminal of the SPAD, and a second terminal connected to the control circuit for receiving a reset level. The control circuit is capable of monitoring a swing of the output voltage level and generating the reset level in response to the excess bias level and the swing of the output voltage level.

Abstract: Semiconductor devices, FinFET devices and methods of forming the same are disclosed. One of the semiconductor devices includes a substrate, a gate over the substrate and a gate dielectric layer between the gate and the substrate. The gate dielectric layer includes an oxide-inhibiting layer having a dielectric constant greater than about 8 and being in an amorphous state.

Abstract: A method includes applying a first amount of heat to a vapor region of a precursor canister, measuring an indication of saturated vapor pressure within the vapor region during the applying the first amount of heat, and applying a second amount of heat to the vapor region of the precursor canister, the second amount of heat being adjusted from the first amount of heat based on the indication of saturated vapor pressure.

Abstract: A carrier module is provided for supporting at least one data storage device. The carrier module is electrically connected to a power supply module. The carrier module includes a main body, a first socket, a second socket, a connecting port, and a detection unit. The first socket, the second socket, and the connecting port are disposed on the main body. The connecting port and the detection unit are electrically connected to the first and second sockets. The data storage device is detachably connected to the connecting port. The detection unit detects whether the power supply module is electrically connected to the first socket or the second socket.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate. The semiconductor device structure includes a gate stack positioned over the semiconductor substrate. The gate stack includes a gate dielectric layer and a gate electrode over the gate dielectric layer. The semiconductor device structure includes spacers positioned over first sidewalls of the gate stack. The spacers and the gate stack surround a recess. The semiconductor device structure includes an insulating layer formed over the semiconductor substrate and surrounding the gate stack. The semiconductor device structure includes a cap layer covering the insulating layer, the spacers, and inner walls of the recess.