Patents by Inventor Chia-Ming Tsai

Chia-Ming Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220352160
    Abstract: In a method of manufacturing a semiconductor device, a gate dielectric layer is formed over a channel region made of a semiconductor material, a first work function adjustment material layer is formed over the gate dielectric layer, an adhesion enhancement layer is formed on the first work function adjustment material layer, a mask layer including an antireflective organic material layer is formed on the adhesion enhancement layer, and the adhesion enhancement layer and the first work function adjustment material layer are patterned by using the mask layer as an etching mask. The adhesion enhancement layer has a higher adhesion strength to the antireflective organic material layer than the first work function adjustment material layer.
    Type: Application
    Filed: July 14, 2022
    Publication date: November 3, 2022
    Inventors: Shahaji B. MORE, Chandrashekhar Prakash SAVANT, Tien-Wei YU, Chia-Ming TSAI
  • Publication number: 20220336289
    Abstract: A semiconductor device with different gate structure configurations and a method of fabricating the same are disclosed. The semiconductor device includes a fin structure disposed on a substrate, and first and second gate structures on the fin structure. The first and second gate structures includes first and second interfacial oxide layers, respectively, first and second high-K gate dielectric layers disposed on the first and second TO layers, respectively, and first and second dopant control layers disposed on the first and second HK gate dielectric layers, respectively. The second dopant control layer has a silicon-to-metal atomic concentration ratio greater than an Si-to-metal atomic concentration ratio of the first dopant control layer. The semiconductor further includes first and second work function metal layers disposed on the first and second dopant control layers, respectively, and first and second gate metal fill layers disposed on the first and second work function metal layers, respectively.
    Type: Application
    Filed: July 6, 2022
    Publication date: October 20, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chandrashekhar Prakash Savant, Chia-Ming Tsai, Tien-Wei Yu
  • Patent number: 11477444
    Abstract: A video processing method for a video encoder or decoder comprises receiving input data of a current chroma block in a current picture coded in a 4:2:2 color format, determining a luma mode of a luma block corresponding to the current chroma block, mapping the luma mode to a mapped intra mode of the current chroma block, selectively replacing the mapped intra mode by wide angle intra prediction mapping based on a width to height ratio of the current chroma block, deriving an intra predictor according to the mapped intra mode after wide angle intra prediction mapping, and encoding or decoding the current chroma block according to the intra predictor. The mapped intra mode is mode 57 when the luma mode is mode 61 and the mapped intra mode is mode 55 when the luma mode is mode 57.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: October 18, 2022
    Assignee: HFI INNOVATION INC.
    Inventors: Man-Shu Chiang, Chia-Ming Tsai, Chih-Wei Hsu
  • Publication number: 20220320320
    Abstract: A semiconductor device includes a substrate, a semiconductor fin, a gate structure, and source/drain structures. The semiconductor fin extends upwardly from the substrate. The gate structure is across the semiconductor fin and includes a high-k dielectric layer over the semiconductor fin, a fluorine-containing work function layer over the high-k dielectric layer and comprising fluorine, a tungsten-containing layer over the fluorine-containing work function layer, and a metal gate electrode over the tungsten-containing layer. The source/drain structures are on the semiconductor fin and at opposite sides of the gate structure.
    Type: Application
    Filed: June 17, 2022
    Publication date: October 6, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chandrashekhar P. SAVANT, Tien-Wei YU, Ke-Chih LIU, Chia-Ming TSAI
  • Patent number: 11445173
    Abstract: A method and apparatus for video coding using Intra prediction are disclosed. In one method, a first prediction sample in an immediately right column of the current block and a second prediction sample in an immediately below row of the current block are derived using angular prediction. The first prediction sample and a left column reference sample in the same row as the first prediction sample are interpolated to generate a horizontal predictor. The second prediction sample and an above-row reference sample in the same column as the second prediction sample are interpolated to generate a vertical predictor. The vertical predictor and the horizontal predictor are linearly combined to generate an angular-planar prediction sample. In another method, a first predictor is generated using angular prediction and a second predictor is generated using planar prediction. The first predictor and the second predictor are linearly combined to generate a fused Intra predictor.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: September 13, 2022
    Assignee: MEDIATEK SINGAPORE PTE. LTD.
    Inventors: Chia-Ming Tsai, Han Huang, Chih-Wei Hsu, Yu-Wen Huang
  • Publication number: 20220285517
    Abstract: A semiconductor device includes a gate structure disposed over a channel region and a source/drain region. The gate structure includes a gate dielectric layer over the channel region, one or more work function adjustment material layers over the gate dielectric layer, and a metal gate electrode layer over the one or more work function adjustment material layers. The one or more work function adjustment layers includes an aluminum containing layer, and a diffusion barrier layer is disposed at at least one of a bottom portion and a top portion of the aluminum containing layer. The diffusion barrier layer is one or more of a Ti-rich layer, a Ti-doped layer, a Ta-rich layer, a Ta-doped layer and a Si-doped layer.
    Type: Application
    Filed: May 23, 2022
    Publication date: September 8, 2022
    Inventors: Shahaji B. MORE, Chandrashekhar Prakash SAVANT, Tien-Wei YU, Chia-Ming TSAI
  • Patent number: 11438611
    Abstract: Method and apparatus of coding a video sequence, are disclosed. According to the method, a bitstream corresponding to encoded data of the video sequence is generated at an encoder side or received at a decoder side, where the bitstream complies with a bitstream conformance that one or more constraints are satisfied. The constraints are related to a set of RPR (Reference Picture Resampling) parameters including scaling window width or height of a current picture, scaling window width or height of a reference picture, current picture width or height, and maximum picture width or height specified for the video sequence. Scaling information for the RPR mode is derived using the set of RPR parameters. A target picture of the video sequence is then encoded at the encoder side or decoded at the decoder side by utilizing the scaling information when the RPR mode is enabled for the target picture.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: September 6, 2022
    Assignee: HFI INNOVATION INC.
    Inventors: Tzu-Der Chuang, Chih-Wei Hsu, Ching-Yeh Chen, Chia-Ming Tsai, Chun-Chia Chen, Olena Chubach, Yu-Wen Huang
  • Publication number: 20220279173
    Abstract: A video processing method for a video encoder or decoder comprises receiving input data of a current chroma block in a current picture coded in a 4:2:2 color format, determining a luma mode of a luma block corresponding to the current chroma block, mapping the luma mode to a mapped intra mode of the current chroma block, selectively replacing the mapped intra mode by wide angle intra prediction mapping based on a width to height ratio of the current chroma block, deriving an intra predictor according to the mapped intra mode after wide angle intra prediction mapping, and encoding or decoding the current chroma block according to the intra predictor. The mapped intra mode is mode 57 when the luma mode is mode 61 and the mapped intra mode is mode 55 when the luma mode is mode 57.
    Type: Application
    Filed: August 3, 2020
    Publication date: September 1, 2022
    Inventors: Man-Shu CHIANG, Chia-Ming TSAI, Chih-Wei HSU
  • Patent number: 11430700
    Abstract: The present disclosure describes a semiconductor device having metal boundary trench isolation with electrically conductive intermediate structures acting as a metal diffusion barrier. The semiconductor structure includes a first fin structure and a second fin structure on a substrate, an insulating layer between the first and second fin structures, a gate dielectric layer on the insulating layer and the first and second fin structures, and a first work function stack and a second work function stack on the gate dielectric layer. The first work function stack is over the first fin structure and a first portion of the insulating layer, and the second work function stack is over the second fin structure and a second portion of the insulating layer adjacent to the first portion. The semiconductor structure further includes a conductive intermediate structure on the gate dielectric layer and between the first and second work function stacks.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: August 30, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chandrashekhar Prakash Savant, Chia-Ming Tsai, Yuh-Ta Fan, Tien-Wei Yu
  • Publication number: 20220264119
    Abstract: Method and apparatus for constrained de-blocking filter are disclosed. One method receives input data related to a current block in a current picture at a video encoder side or a video bitstream corresponding to compressed data including the current block in the current picture at a video decoder side, and determines a first boundary associated with the current block, wherein the first boundary corresponds to one vertical boundary or one horizontal boundary of the current block. The method then applies de-blocking process to a reconstructed current block corresponding to the current block to result in a filtered-reconstructed current block, using a plurality of first reference samples at a same side of the first boundary, and replaces a first set of the first reference samples by one or more padding values. The method then generates a filtered decoded picture including the filtered-reconstructed current block.
    Type: Application
    Filed: April 11, 2022
    Publication date: August 18, 2022
    Inventors: Chia-Ming TSAI, Chih-Wei HSU, Ching-Yeh CHEN, Tzu-Der CHUANG, Yu-Wen HUANG
  • Patent number: 11417571
    Abstract: A semiconductor device with different gate structure configurations and a method of fabricating the same are disclosed. The semiconductor device includes a fin structure disposed on a substrate, and first and second gate structures on the fin structure. The first and second gate structures includes first and second interfacial oxide layers, respectively, first and second high-K gate dielectric layers disposed on the first and second IO layers, respectively, and first and second dopant control layers disposed on the first and second HK gate dielectric layers, respectively. The second dopant control layer has a silicon-to-metal atomic concentration ratio greater than an Si-to-metal atomic concentration ratio of the first dopant control layer. The semiconductor further includes first and second work function metal layers disposed on the first and second dopant control layers, respectively, and first and second gate metal fill layers disposed on the first and second work function metal layers, respectively.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: August 16, 2022
    Inventors: Chandrashekhar Prakash Savant, Chia-Ming Tsai, Tien-Wei Yu
  • Publication number: 20220248064
    Abstract: A video coder that implements illumination compensation is provided. The video coder receives a first block of pixels in a first video picture to be coded as a current block, wherein the current block is associated with a motion vector that references a second block of pixels in a second video picture as a reference block. The video coder performs inter-prediction for the current block by using the motion vector to generate a set of motion-compensated pixels for the current block. The video coder modifies the set of motion-compensated pixels of the current block by applying a linear model that is computed based on neighboring samples of the reference block and of the current block. The neighboring samples are identified based on a position of the current block within a larger block.
    Type: Application
    Filed: April 19, 2022
    Publication date: August 4, 2022
    Inventors: Chia-Ming TSAI, Chun-Chia CHEN, Chih-Wei HSU, Ching-Yeh CHEN, Tzu-Der CHUANG
  • Publication number: 20220239931
    Abstract: Method and apparatus for constrained de-blocking filter are disclosed. One method receives input data related to a current block in a current picture at a video encoder side or a video bitstream determines a block boundary of the current block and sub-block boundaries inside the current block, wherein the current block is partitioned into a plurality of sub-blocks using sub-block mode prediction. The method then applies de-blocking process to a reconstructed current block corresponding to the current block to result in a current filtered-reconstructed block, wherein said applying the de-blocking process to the current block comprises applying the de-blocking process to the sub-block boundaries inside the current filtered-reconstructed block, and generates a filtered decoded picture including the current filtered-reconstructed block.
    Type: Application
    Filed: April 11, 2022
    Publication date: July 28, 2022
    Inventors: Chia-Ming TSAI, Chih-Wei HSU, Ching-Yeh CHEN, Tzu-Der CHUANG, Yu-Wen HUANG
  • Publication number: 20220224886
    Abstract: Video processing methods and apparatuses for coding a current block and a adjacent block comprise receiving input data of the current and adjacent blocks in a current picture, determines the current and adjacent blocks are both coded in a BDPCM or RDPCM mode, performing a deblocking filtering operation on an edge between the current and adjacent blocks by de-activating deblocking filtering for a first color component and activating deblocking filtering for a second color component, and encoding or decoding the current and adjacent blocks. Each current pixel in a BDPCM coded block is predicted by one or more neighboring pixels of the current pixel. RDPCM is applied to process quantized residues of a RDPCM coded block according to a prediction direction of the RDPCM coded block.
    Type: Application
    Filed: May 28, 2020
    Publication date: July 14, 2022
    Inventors: Chia-Ming TSAI, Chih-Wei HSU
  • Patent number: 11374114
    Abstract: A high-k dielectric layer is formed over a semiconductor substrate having a first trench and a second trench. A barrier layer is formed over the high-k dielectric layer. A work function layer is deposited over the barrier layer, and is patterned and removed from the second trench, exposing the barrier layer at the second trench. A precursor is deposited selectively over the barrier layer in the second trench, and deposited over the work function layer in the first trench. The precursor selectively reacts with the barrier layer to selectively etch the barrier layer, and selectively reacts with the work function layer to selectively etch a top oxidized portion of the work function layer and deposit a protective layer. The reaction products between the precursor and the barrier layer, and the reaction products between the precursor and the work function layer are removed by using an inert gas.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: June 28, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chandrashekhar P. Savant, Tien-Wei Yu, Ke-Chih Liu, Chia-Ming Tsai
  • Publication number: 20220201286
    Abstract: A video processing method for a video encoder or decoder comprises receiving input data of a current block, determining an intra prediction mode and reference samples according to the intra prediction mode, determining an intra reference sample filter from a Gaussian interpolation filter and an alternative interpolation filter for the current block, applying the intra reference sample filter to the reference samples to generate an intra predictor for the current block, and encoding or decoding the current block based on the intra predictor. A determination between the Gaussian and alternative interpolation filters is depending on a comparison of a mode difference value calculated by the intra prediction mode with a size-dependent threshold. The size-dependent threshold is set to be equal to 24 for blocks with block size smaller than or equal to 32 samples according to an embodiment. The alternative interpolation filter may be a DCT-IF interpolation filter.
    Type: Application
    Filed: April 22, 2020
    Publication date: June 23, 2022
    Inventors: Chia-Ming TSAI, Chih-Wei HSU
  • Publication number: 20220181463
    Abstract: A device includes a semiconductor region, an interfacial layer over the semiconductor region, the interfacial layer including a semiconductor oxide, a high-k dielectric layer over the interfacial layer, and an intermixing layer over the high-k dielectric layer. The intermixing layer includes oxygen, a metal in the high-k dielectric layer, and an additional metal. A work-function layer is over the intermixing layer. A filling-metal region is over the work-function layer.
    Type: Application
    Filed: February 25, 2022
    Publication date: June 9, 2022
    Inventors: Shahaji B. More, Chandrashekhar Prakash Savant, Tien-Wei Yu, Chia-Ming Tsai
  • Patent number: 11356699
    Abstract: Method and apparatus for constrained de-blocking filter are disclosed. According to one method, a current block is partitioned into a plurality of sub-blocks using SDIP (Short Distance Intra Prediction mod). A first Bs (boundary strength) for an internal block boundary of the plurality of sub-blocks is determined by setting the first Bs to a second Bs of an Intra-coded boundary block of the current block. De-blocking process is applied, using the first Bs, to reconstructed samples across the internal block boundary of the plurality of sub-blocks to generate filtered-reconstructed samples. In another method, the current block is partitioned into two sub-blocks using SBT (sub-block transform) horizontally or vertically and the first Bs (boundary strength) is determined for an internal block boundary between the two sub-blocks by setting the first Bs to a second Bs of a non-zero cbf (coded block flag) block of the two sub-blocks in step.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: June 7, 2022
    Assignee: HFI INNOVATION INC.
    Inventors: Chia-Ming Tsai, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen
  • Publication number: 20220163643
    Abstract: A LiDAR and a method of a fast photon-count integration for a LiDAR are disclosed. The proposed method, wherein the LiDAR includes a laser, includes: providing a target and the LiDAR; causing the laser to fire a laser pulse towards the target according to a random mechanism; and causing an interval between two adjacent laser pulses to be less than a time that the laser spent for a round trip of maximum unambiguous range to speed up a detection and a ranging of the target.
    Type: Application
    Filed: November 18, 2021
    Publication date: May 26, 2022
    Inventors: Tzu-Hsien Sang, Chia-Ming Tsai, Yung-Chien Liu, Ningkai Yang, Ting-Yuan Wang
  • Patent number: 11342434
    Abstract: A semiconductor device includes a gate structure disposed over a channel region and a source/drain region. The gate structure includes a gate dielectric layer over the channel region, one or more work function adjustment material layers over the gate dielectric layer, and a metal gate electrode layer over the one or more work function adjustment material layers. The one or more work function adjustment layers includes an aluminum containing layer, and a diffusion barrier layer is disposed at at least one of a bottom portion and a top portion of the aluminum containing layer. The diffusion barrier layer is one or more of a Ti-rich layer, a Ti-doped layer, a Ta-rich layer, a Ta-doped layer and a Si-doped layer.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: May 24, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shahaji B. More, Chandrashekhar Prakash Savant, Tien-Wei Yu, Chia-Ming Tsai