Patents by Inventor Chia-Ming Tsai

Chia-Ming Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210014536
    Abstract: In one method, the current block is partitioned into multiple final sub-blocks using one or more stages of sub-tree partition comprising ternary tree partition and at least one other-type partition, where ternary partition tree is excluded from the sub-tree partition if a current sub-tree depth associated with a current sub-block is greater than a first threshold and the first threshold is an integer greater than or equal to 1. In another method, if a test condition is satisfied, the current block is encoded or decoded using a current Inter mode selected from a modified group of Inter tools, where the modified group of Inter tools is derived from an initial group of Inter tools by removing one or more first Inter tools from the initial group of Inter tools, replacing one or more second Inter tools with one or more complexity-reduced Inter tools, or both.
    Type: Application
    Filed: March 13, 2019
    Publication date: January 14, 2021
    Inventors: Chun-Chia CHEN, Chia-Ming TSAI, Yu-Chi SU, Chen-Yen LAI, Chih-Wei HSU, Ching-Yeh CHEN, Tzu-Der CHUANG, Yu-Wen HUANG, Han HUANG
  • Publication number: 20200396444
    Abstract: A method and apparatus for video coding using Intra prediction are disclosed. In one method, a first prediction sample in an immediately right column of the current block and a second prediction sample in an immediately below row of the current block are derived using angular prediction. The first prediction sample and a left column reference sample in the same row as the first prediction sample are interpolated to generate a horizontal predictor. The second prediction sample and an above-row reference sample in the same column as the second prediction sample are interpolated to generate a vertical predictor. The vertical predictor and the horizontal predictor are linearly combined to generate an angular-planar prediction sample. In another method, a first predictor is generated using angular prediction and a second predictor is generated using planar prediction. The first predictor and the second predictor are linearly combined to generate a fused Intra predictor.
    Type: Application
    Filed: October 26, 2018
    Publication date: December 17, 2020
    Inventors: Chia-Ming TSAI, Han HUANG, Chih-Wei HSU, Yu-Wen HUANG
  • Patent number: 10832101
    Abstract: The present subject matter describes an electronic card holder. In an example implementation, the electronic card holder includes a housing having a slot to receive an electronic card. A slidable frame in the housing is to hold the electronic card. The slidable frame has a stud fittable in a groove in the housing. The card holder includes a resilient element with one end being coupled to the housing and other end being coupled to the slidable frame. The card holder further includes an actuating member coupled to the groove. When the electronic card is pushed inside the housing, the slidable frame is moved to lock the stud inside the groove and compress the resilient element. When the actuating member is pushed, the stud is released from the groove and the resilient element is relaxed to move the slidable frame such that the electronic card is pushed out of the housing.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: November 10, 2020
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Hsin-Tsung Ho, Chia-Ming Tsai, Keng-Ming Chang
  • Patent number: 10802603
    Abstract: In an example, a computing device accessory may include a components such as a computing device cover, an attachment portion engageable with a computing device, and a retention cup disposed on the computing device cover to attach to a computing device surface of the computing device through suction pressure.
    Type: Grant
    Filed: November 10, 2016
    Date of Patent: October 13, 2020
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Duan Wei, Chia-Ming Tsai, Cheng-Han Tsai, Wen-Yen Tang
  • Publication number: 20200322630
    Abstract: Video data may be palette decoded. Data defining a palette table may be received. The palette table may comprise index values corresponding to respective colors. Palette index prediction data may be received and may comprise data indicating index values for at least a portion of a palette index map mapping pixels of the video data to color indices in the palette table. The palette index prediction data may comprise run value data associating run values with index values for at least a portion of a palette index map. A run value may be associated with an escape color index. The palette index map may be generated from the palette index prediction data at least in part by determining whether to adjust an index value of the palette index prediction data based on a last index value. The video data may be reconstructed in accordance with the palette index map.
    Type: Application
    Filed: June 22, 2020
    Publication date: October 8, 2020
    Applicant: VID SCALE, INC.
    Inventors: Chia-Ming Tsai, Yuwen He, Xiaoyu Xiu, Yan Ye
  • Patent number: 10797151
    Abstract: The present disclosure describes a method for the formation of gate stacks having two or more titanium-aluminum (TiAl) layers with different Al concentrations (e.g., different Al/Ti ratios). For example, a gate structure can include a first TiAl layer with a first Al/Ti ratio and a second TiAl layer with a second Al/Ti ratio greater than the first Al/Ti ratio of the first TiAl layer.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: October 6, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Wei Wang, Chia-Ming Tsai, Ke-Chih Liu, Chandrashekhar Prakash Savant, Tien-Wei Yu
  • Patent number: 10795388
    Abstract: A voltage adjustment device comprises a voltage detector and a signal emitter. The voltage detector electrically connects to an electrical device through a power rail and obtains a voltage detected value of the power rail. The signal emitter electrically connects to the voltage detector and is configured to electrically connect to a host and a power board. The signal emitter generates a power good signal and sends the power good signal to the host when the voltage detected value is larger than a baseline voltage value for the first time. After sending the power good signal, the signal emitter generates a voltage adjustment signal according to the voltage detected value and is configured to send the voltage adjustment signal to the power board for selectively adjusting a voltage provided by the power board.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: October 6, 2020
    Assignee: WIWYNN CORPORATION
    Inventors: Yi-Hao Chen, Chia-Ming Tsai
  • Publication number: 20200275115
    Abstract: A video codec receives data to be encoded or decoded as a current block of a current picture of a video. first and/or second flags indicate whether to apply a first combined prediction mode or a second combined prediction mode. The video codec decodes or encodes the current block. When the combined inter and intra prediction mode is applied, the current block is coded by using a combined prediction that is generated based on an inter-prediction and an intra-prediction. When the triangle prediction mode is applied, the current block is coded by using a combined prediction that is generated based on at least two inter-predictions.
    Type: Application
    Filed: February 26, 2020
    Publication date: August 27, 2020
    Inventors: Man-Shu Chiang, Chun-Chia Chen, Chih-Wei Hsu, Chia-Ming Tsai
  • Publication number: 20200275112
    Abstract: A video decoder that implements a mutually exclusive grouping of coding modes is provided. The video decoder receives data for a block of pixels to be decoded as a current block of a current picture of a video. When a first coding mode for the current block is enabled, a second coding mode is disabled for the current block, wherein the first and second coding modes specify different methods for computing an inter-prediction for the current block. The current block is decoded by using an inter-prediction that is computed according to an enabled coding mode.
    Type: Application
    Filed: February 26, 2020
    Publication date: August 27, 2020
    Inventors: Man-Shu Chiang, Chun-Chia Chen, Chih-Wei Hsu, Chia-Ming Tsai
  • Patent number: 10752995
    Abstract: A method includes applying a first amount of heat to a vapor region of a precursor canister, measuring an indication of saturated vapor pressure within the vapor region during the applying the first amount of heat, and applying a second amount of heat to the vapor region of the precursor canister, the second amount of heat being adjusted from the first amount of heat based on the indication of saturated vapor pressure.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: August 25, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ke-Chih Liu, Chia-Ming Tsai, Yen-Yu Chen, Yueh-Ching Pai, Yu-Min Chang
  • Patent number: 10754400
    Abstract: A control method for data storage system includes obtaining a correlation coefficient corresponding to storage devices using a control device, and adjusting the link speed of one of the storage devices using the control device.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: August 25, 2020
    Assignee: WIWYNN CORPORATION
    Inventors: Cheng Kuang Hsieh, Kai Sheng Chen, Chia Ming Tsai, Yi-Hao Chen
  • Patent number: 10735764
    Abstract: Video data may be palette decoded. Data defining a palette table may be received. The palette table may comprise index values corresponding to respective colors. Palette index prediction data may be received and may comprise data indicating index values for at least a portion of a palette index map mapping pixels of the video data to color indices in the palette table. The palette index prediction data may comprise run value data associating run values with index values for at least a portion of a palette index map. A run value may be associated with an escape color index. The palette index map may be generated from the palette index prediction data at least in part by determining whether to adjust an index value of the palette index prediction data based on a last index value. The video data may be reconstructed in accordance with the palette index map.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: August 4, 2020
    Assignee: VID SCALE, Inc.
    Inventors: Chia-Ming Tsai, Yuwen He, Xiaoyu Xiu, Yan Ye
  • Publication number: 20200228832
    Abstract: Method and apparatus for constrained de-blocking filter are disclosed. According to one method, a current block is partitioned into a plurality of sub-blocks using SDIP (Short Distance Intra Prediction mod). A first Bs (boundary strength) for an internal block boundary of the plurality of sub-blocks is determined by setting the first Bs to a second Bs of an Intra-coded boundary block of the current block. De-blocking process is applied, using the first Bs, to reconstructed samples across the internal block boundary of the plurality of sub-blocks to generate filtered-reconstructed samples. In another method, the current block is partitioned into two sub-blocks using SBT (sub-block transform) horizontally or vertically and the first Bs (boundary strength) is determined for an internal block boundary between the two sub-blocks by setting the first Bs to a second Bs of a non-zero cbf (coded block flag) block of the two sub-blocks in step.
    Type: Application
    Filed: January 9, 2020
    Publication date: July 16, 2020
    Inventors: Chia-Ming TSAI, Chih-Wei HSU, Tzu-Der CHUANG, Ching-Yeh CHEN
  • Patent number: 10693259
    Abstract: In an example, a connector port assembly for use in an electronic device is disclosed. The connector port assembly may include a connector port, a fastener assembly and a flexible ring. The fastener assembly may fasten the connector port to a casing of the electronic device through at least one resilient member. The flexible ring may be disposed around an outer surface of the connector port. The fastener assembly and flexible ring may provide bend angle for the connector port.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: June 23, 2020
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Hsin-Tsung Ho, Chia-Ming Tsai, Keng-Ming Chang
  • Publication number: 20200135915
    Abstract: In a method of manufacturing a semiconductor device, a gate dielectric layer is formed over a channel region, a first conductive layer is formed over the gate dielectric layer, a shield layer is formed over the first conductive layer forming a bilayer structure, a capping layer is formed over the shield layer, a first annealing operation is performed after the capping layer is formed, the capping layer is removed after the first annealing operation, and a gate electrode layer is formed after the capping layer is removed.
    Type: Application
    Filed: August 5, 2019
    Publication date: April 30, 2020
    Inventors: Chandrashekhar Prakash SAVANT, Kin Shun CHONG, Tien-Wei YU, Chia-Ming TSAI, Ming-Te CHEN
  • Publication number: 20200105894
    Abstract: The present disclosure describes a method for the formation of gate stacks having two or more titanium-aluminum (TiAl) layers with different Al concentrations (e.g., different Al/Ti ratios). For example, a gate structure can include a first TiAl layer with a first Al/Ti ratio and a second TiAl layer with a second Al/Ti ratio greater than the first Al/Ti ratio of the first TiAl layer.
    Type: Application
    Filed: June 11, 2019
    Publication date: April 2, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Wei WANG, Chia-Ming TSAI, Ke-Chih LIU, Chandrashekhar Prakash SAVANT, Tien-Wei YU
  • Publication number: 20200098640
    Abstract: The present disclosure describes a method for forming gate stack layers with a fluorine concentration up to about 35 at. %. The method includes forming dielectric stack, barrier layer and soaking the dielectric stack and/or barrier layer in a fluorine-based gas. The method further includes depositing one or more work function layers on the high-k dielectric layer, and soaking at least one of the one or more work function layers in the fluorine-based gas. The method also includes optional fluorine drive in annealing process, together with sacrificial blocking layer to avoid fluorine out diffusion and loss into atmosphere.
    Type: Application
    Filed: April 5, 2019
    Publication date: March 26, 2020
    Applicant: Taiwan Semiconductorr Manufacturing Co., Ltd.
    Inventors: Chandrashekhar Prakash SAVANT, Chia-Ming Tsai, Ming-Te Chen, Shih-Chi Lin, Zack Chong, Tien-Wei Yu
  • Publication number: 20200057478
    Abstract: A control method for data storage system includes obtaining a correlation coefficient corresponding to storage devices using a control device, and adjusting the link speed of one of the storage devices using the control device.
    Type: Application
    Filed: December 12, 2018
    Publication date: February 20, 2020
    Inventors: Cheng Kuang HSIEH, Kai Sheng CHEN, Chia Ming TSAI, Yi-Hao CHEN
  • Publication number: 20200057468
    Abstract: Aspects relating to a mid-frame member (100) and methods of forming the mid-frame member (100) are described. In an example, the mid-frame member (100) includes a first planar component (102) having a plurality of first trapezoid-shaped grooves (106) and formed of a first metal. The mid-frame member (100) also includes a second planar component (104) having a plurality of second trapezoid-shaped grooves (108) and formed of a second metal. A crest between adjacent second trapezoid-shaped grooves (108) cooperates with a first trapezoid-shaped groove to form dovetail joints between the first planar component (102) and the second planar component (104).
    Type: Application
    Filed: April 24, 2017
    Publication date: February 20, 2020
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Chi-Chun Chiang, Cheng-Han Tsai, Chia-Ming Tsai, Hung-Yen Chi
  • Publication number: 20200026363
    Abstract: In an example, a computing device accessory may include a components such as a computing device cover, an attachment portion engageable with a computing device, and a retention cup disposed on the computing device cover to attach to a computing device surface of the computing device through suction pressure.
    Type: Application
    Filed: November 10, 2016
    Publication date: January 23, 2020
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Duan WEI, Chia-Ming TSAI, Cheng-Han TSAI, Wen-Yen TANG