Abstract: An acute kidney injury predicting system and a method thereof are proposed. A processor reads the data to be tested, the detection data, the machine learning algorithm and the risk probability comparison table from a main memory. The processor trains the detection data according to the machine learning algorithm to generate an acute kidney injury prediction model, and inputs the data to be tested into the acute kidney injury prediction model to generate an acute kidney injury characteristic risk probability and a data sequence table. The data sequence table lists the data to be tested in sequence according to a proportion of each of the data to be tested in the acute kidney injury characteristics. The processor selects one of the medical treatment data from the risk probability comparison table according to the acute kidney injury characteristic risk probability.

Abstract: A low-profile and small-size valve to a shut off a flow of fluid in a pipeline includes a frame, a tube, a moving part, a lever, an elastic part, a latch, and a trigger. The tube is movable with the moving part. The lever is rotatable around an axis. The elastic part can push the lever to rotate after the trigger pushes the buckle away from the lever to unlatch the lever and allow rotation. During the rotation of the lever, the lever pulls on the moving part, and the moving part pulls on the tube together to disconnect the tube from the pipe. The valve improves the convenience and efficiency of shutting off a flow of fluid. A pipeline and an immersion cooling system is also disclosed.

Abstract: A low-profile and small-size valve to a shut off a flow of fluid in a pipeline includes a frame, a tube, a moving part, a lever, an elastic part, a latch, and a trigger. The tube is movable with the moving part. The lever is rotatable around an axis. The elastic part can push the lever to rotate after the trigger pushes the buckle away from the lever to unlatch the lever and allow rotation. During the rotation of the lever, the lever pulls on the moving part, and the moving part pulls on the tube together to disconnect the tube from the pipe. The valve improves the convenience and efficiency of shutting off a flow of fluid. A pipeline and an immersion cooling system is also disclosed.

Abstract: A low-profile and small-size valve to a shut off a flow of fluid in a pipeline includes a frame, a tube, a moving part, a lever, an elastic part, a latch, and a trigger. The tube is movable with the moving part. The lever is rotatable around an axis. The elastic part can push the lever to rotate after the trigger pushes the buckle away from the lever to unlatch the lever and allow rotation. During the rotation of the lever, the lever pulls on the moving part, and the moving part pulls on the tube together to disconnect the tube from the pipe. The valve improves the convenience and efficiency of shutting off a flow of fluid. A pipeline and an immersion cooling system is also disclosed.

Abstract: A printed circuit board (PCB) includes a receiver component, a transmission line including a positive signal transmission line and a negative signal transmission line, a transmitter component, and a capacitance unit. The transmitter component transmits a different signal to the receiver component via the transmission line. The capacitance unit is spaced from the receiver component a predetermined distance S, therein, the predetermined distance S is calculated by a formula S=Vx (n*UI?(C1+C2)×Zo/2)/2, and V is a speed of the transmission line. C1 is an equivalent capacitance value of the receiver component, C2 is a capacitance value of the capacitance unit, Zo is a resistance value of the transmission line, UI is a half of one cycle of the differential signal, and n is a value less than or equal to 1.5 and greater than or equal to 0.5.

Abstract: A printed circuit board includes a baseboard, first and second conductive wires, a fuse, a 5V connector, a USB connector, and a CPU. The 5V connector is electrically connected to a first end of the fuse through the first conductive wire, and electrically connected to a voltage pin of the CPU voltage regulating chip through the second conductive wire. A voltage pin of the USB connector is connected to a second end of the fuse. The 5V connector outputs a 5V system voltage to the USB connector through the first conductive wire and the fuse, thus providing a voltage to a USB device, and also outputs the 5V system voltage to the CPU voltage regulating chip through the second conductive wire, thus signaling the CPU voltage regulating chip to convert the 5V system voltage and provide the converted voltage to a CPU.

Abstract: A computer-based method for checking signal transmission lines of a printed circuit board (PCB) layout is provided. A design rules is set according to different length requirements and the quantity of storage devices input by users. A group of transmission line from a displayed PCB layout is selected. The quantity of branch lines of each transmission line to be checked and the length of each branch line of the group of transmission lines to be checked are computed. The design of which branch lines does not satisfy the design rules is determined according to the computed quantity of the branch lines of each transmission line to be checked, the length of each branch line of the group of transmission lines, and the design rules.

Abstract: A method for checking signal transmission lines of a printed circuit board (PCB) layout includes determining differential pairs to be checked and dividing the differential pairs to be checked into a first group and a second group. A first reference distance between differential pairs belonging to the same group and a second reference distance between differential pairs belonging to different groups are set. A first box surrounding each line section of one to be checked signal differential line of the first group and a second box surrounding the first box are created. One first box surrounding each line section of the to be checked differential line of the second group is created. Whether or not in the first box and the second box there are differential lines which do not satisfy design standards is determined.

Abstract: A via design method includes doing a simulation according to input data to obtain the impedance of the via of the reference printed circuit board (PCB). An optimal via model is determined according to a group of input data. Simulating is performed according to the thickness of a PCB to-be-designed and the optimal via model data, to obtain the impedance of a via of a PCB to be designed. The number of the anti-pads of the via of the PCB to be designed is recorded when the difference between the impedance of the via of the PCB to be designed and the impedance of the via model of the reference PCB does not fall within a preset range. An interval between each two adjacent anti-pads of the via of the PCB to designed is determined according to the recorded number and the thickness of the PCB to be designed.

Abstract: A via design method includes doing a simulation according to input data to obtain the impedance of the via of the reference printed circuit board (PCB). An optimal via model is determined according to a group of input data. Simulating is performed according to the thickness of a PCB to-be-designed and the optimal via model data, to obtain the impedance of a via of a PCB to be designed. The number of the anti-pads of the via of the PCB to be designed is recorded when the difference between the impedance of the via of the PCB to be designed and the impedance of the via model of the reference PCB does not fall within a preset range. An interval between each two adjacent anti-pads of the via of the PCB to designed is determined according to the recorded number and the thickness of the PCB to be designed.

Abstract: A method for checking signal transmission lines of a printed circuit board (PCB) layout includes determining differential pairs to be checked and dividing the differential pairs to be checked into a first group and a second group. A first reference distance between differential pairs belonging to the same group and a second reference distance between differential pairs belonging to different groups are set. A first box surrounding each line section of one to be checked signal differential line of the first group and a second box surrounding the first box are created. One first box surrounding each line section of the to be checked differential line of the second group is created. Whether or not in the first box and the second box there are differential lines which do not satisfy design standards is determined.

Abstract: A signal transmission line check method to be executed by a computing device is described. A to-be-checked signal transmission line group in a displayed printed circuit board (PCB) layout is determined. Whether all signal transmission lines of the to-be-checked signal transmission line group are laid out in a same layer of the displayed PCB layout is checked according to an input serial number of a chipset and layer properties of the to-be-checked signal transmission lines. The signal transmission lines that do not satisfy design standards are determined when not all of the to-be-checked signal transmission lines are laid out in a same layer. A related computing device is also disclosed.

Abstract: In a method for checking a wiring diagram in a printed circuit board (PCB) design, a pair of differential signal lines in a PCB file is located according to a designation of a user. Components connected by the differential signal lines and vias which the differential signal lines pass through are obtained from the PCB file. A determination of whether obtained components and the obtained vias meet predetermined requirements is made by checking whether copper foils between each pair of the obtained vias or between pins of the obtained components in ground layers and power layers of the PCB file are hollowed.

Abstract: A printed circuit board (PCB) includes a receiver component, a transmission line including a positive signal transmission line and a negative signal transmission line, a transmitter component, and a capacitance unit. The transmitter component transmits a different signal to the receiver component via the transmission line. The capacitance unit is spaced from the receiver component a predetermined distance S, therein, the predetermined distance S is calculated by a formula S=Vx (n*UI?(C1+C2)×Zo/2)/2, and V is a speed of the transmission line. C1 is an equivalent capacitance value of the receiver component, C2 is a capacitance value of the capacitance unit, Zo is a resistance value of the transmission line, UI is a half of one cycle of the differential signal, and n is a value less than or equal to 1.5 and greater than or equal to 0.5.

Abstract: A signal transmission line check method to be executed by a computing device is described. A to-be-checked signal transmission line group in a displayed printed circuit board (PCB) layout is determined. Whether all signal transmission lines of the to-be-checked signal transmission line group are laid out in a same layer of the displayed PCB layout is checked according to an input serial number of a chipset and layer properties of the to-be-checked signal transmission lines. The signal transmission lines that do not satisfy design standards are determined when not all of the to-be-checked signal transmission lines are laid out in a same layer. A related computing device is also disclosed.

Abstract: In a method for checking wiring diagrams, one element is selected from a first printed circuit board (PCB) file. An element corresponding to the selected element in a second PCB file is searched according to information of the selected element, then the information is recorded into a different element list of the first PCB file, when the second PCB file does not have a corresponding element. The information is recorded into a same element list, when the second PCB file has a corresponding element and the corresponding element has the same information with the element in the first PCB file. The second PCB file and the same element list are compared to locate elements which are included in the second PCB file but not included in the same element list, and the information of the located elements is recorded into a different element list of the second PCB file.

Abstract: A method for shortening a via stub includes: designing a first via hole to connect signal lines of a top layer and a bottom layer of a printed circuit board; and designing a second via hole to connect signal lines of the bottom layer and one of a number of middle layers of the printed circuit board. The printed circuit board include n layers, n is an even number, and the number of the one of the number of middle layers counting top down or bottom up is less than or equal to n/2. A related printed circuit board is also provided.

Abstract: In a method for checking the length of a signal trace between a coupling capacitor and a via in a printed circuit board (PCB) design using a computing device, a PCB file is obtained from a storage device to simulate a PCB design. The signal trace between the coupling capacitor and the via is filtered on the PCB design, and a real length of the signal trace between the coupling capacitor and the via is calculated. If the real length is greater than a specified length, the method locates a position of the via on the PCB design and generates a design report indicating that the signal trace between the coupling capacitor and the via is unqualified. The method further displays information of the signal trace on a display device of the computing device.

Abstract: A pad includes a first mating section and a second mating section. The first mating section includes a first horizontal plane and a first inclined plane. The second mating section includes a second horizontal plane and a second inclined plane. The first mating section is a copper foil capable of being connected to a wire. The second mating section is made of insulating material. The first inclined plane and the second inclined plane are bonded together.

Abstract: A printed circuit board includes a signal layer and a reference layer. The signal layer is covered with copper foil. A circuit topology for multiple loads is set on the signal layer. The circuit topology includes a driving terminal, a first signal receiving terminal, and a second signal receiving terminal. The driving terminal is connected to a node through a first transmission line. The node is connected to the first and second signal receiving terminals respectively through a second and a third transmission lines. A difference between lengths of the second and third transmission lines is greater than a product of a transmission speed and a rise time of signals from the driving terminal. The reference layer is covered with copper foil, and arranged under the signal layer. A region without copper foil is formed on the reference layer, under the second transmission line.