Abstract: Embodiments disclosed herein include photonics systems and packages. In an embodiment, a photonics package comprises a package substrate and a photonics die overhanging an edge of the package substrate. In an embodiment, the photonics die comprises a v-groove for receiving an optical fiber. In an embodiment, the photonics package further comprises an integrated heat spreader (IHS) over the photonics die. In an embodiment, the IHS comprises a foot, and a hole through the foot is aligned with the v-groove.

Abstract: An integrated heat spreader includes channel structures assembled in a frame. Each channel structure is independent of the other, and can be used to dissipate heat from integrated circuitry at a specific location within a package, and without allowing heat from that particular location to propagate to integrated circuitry at other locations within the package. Each channel structure can be implemented with metal having a high thermal conductivity (e.g., copper). The channel structures can be used in conjunction with liquid-based cooling or air-based cooling. The frame can be implemented with low thermal conductivity molding compound or plastic so the heat transfer from one channel structure to another is inhibited. The channel structures can have different configurations (e.g., straight, pillars, and/or pin fins) to provide different rates of flow, mixing, and/or cooling. The flow direction of air or liquid for the channel structures can be the same (parallel) or different (counter).

Abstract: Heat dissipation techniques include using metal features having one or more slanted or otherwise laterally-extending aspects. The metal features include, for example, tilted metal pillars, or metal bodies or fillets having an angled or sloping sidewall, or other metal features that extend both vertically and laterally. Such metal features increase the effective heat transfer area significantly by spreading heat in the in-plane (lateral) direction, in addition to the vertical direction. In some embodiments, slanted trenches are formed in photoresist/mold material deposited over a lower die, using photolithography and a multi-angle lens, or by laser drilling mold material deposited over the lower die. The trenches are then filled with metal. In other embodiments, metal features are printed on the lower die, and then molding material is deposited over the printed features. In any such cases, heat is conducted from a lower die to an upper die and/or an integrated heat spreader.

Abstract: In various aspects, a package system includes at least a first package and a second package arranged on a same side of the package carrier. Each of the first package and the second package comprises an antenna to transmit and/or receive radio frequency signals. A cover may be arranged at a distance over the first package and the second package at the same side of the package carrier as the first package and the second package. The cover comprises at least one conductive element forming a predefined pattern on a side of the cover facing the first package and the second package. The predefined pattern is configured as a frequency selective surface. The package system further includes a radio frequency signal interface wirelessly connecting the antennas of the first package and the second package. The radio frequency signal interface comprises the at least one conductive element.

Abstract: Embodiments disclosed herein include optical packages. In an embodiment, an optical package comprises a package substrate, where the package substrate comprises a recessed edge. In an embodiment, a compute die is on the package substrate, and an optics die on the package substrate and overhanging the recessed edge of the package substrate. In an embodiment, an integrated heat spreader (IHS) is over the compute die and the optics die.

Abstract: Embodiments disclosed herein include thermoelectric cooling (TEC) dies for multi-chip packages. In an embodiment, a TEC die comprises a glass substrate and an array of N-type semiconductor vias and P-type semiconductor vias through the glass substrate. In an embodiment, conductive traces are over the glass substrate, and individual ones of the conductive traces connect an individual one of the N-type semiconductor vias to an individual one of the P-type semiconductor vias.

Abstract: Discussed generally herein are devices that include high density interconnects between dice and techniques for making and using those devices. In one or more embodiments a device can include a bumpless buildup layer (BBUL) substrate including a first die at least partially embedded in the BBUL substrate, the first die including a first plurality of high density interconnect pads. A second die can be at least partially embedded in the BBUL substrate, the second die including a second plurality of high density interconnect pads. A high density interconnect element can be embedded in the BBUL substrate, the high density interconnect element including a third plurality of high density interconnect pads electrically coupled to the first and second plurality of high density interconnect pads.

Abstract: Embodiments disclosed herein include dual sided cooling architectures for laser packages. In an embodiment, an electronic package comprises a package substrate, and a laser chip attached to the package substrate. In an embodiment, the laser chip has a first surface and a second surface opposite from the first surface. In an embodiment, an interposer is disposed over the laser chip, where the interposer overhangs an edge of the laser chip. In an embodiment, the electronic package further comprises an interconnect between the interposer and the package substrate.

Abstract: Discussed generally herein are devices that include high density interconnects between dice and techniques for making and using those devices. In one or more embodiments a device can include a bumpless buildup layer (BBUL) substrate including a first die at least partially embedded in the BBUL substrate, the first die including a first plurality of high density interconnect pads. A second die can be at least partially embedded in the BBUL substrate, the second die including a second plurality of high density interconnect pads. A high density interconnect element can be embedded in the BBUL substrate, the high density interconnect element including a third plurality of high density interconnect pads electrically coupled to the first and second plurality of high density interconnect pads.

Abstract: Various embodiments disclosed relate to an assembly. The assembly includes a compound parabolic concentrator including an exit aperture that has a generally circular perimeter, which defines a circumference of the exit aperture. The assembly further includes a photodiode sensor generally that is aligned with the exit aperture of the compound parabolic concentrator. An optical adhesive layer adheres the exit aperture of the compound parabolic concentrator to the photodiode sensor. A protrusion extends between at least a portion of the perimeter of the compound parabolic concentrator exit aperture and the photodiode.

Abstract: An apparatus is described. The apparatus includes a packaged semiconductor device. The packaged semiconductor device having an integrated heat spreader, wherein, a boiling enhancement structure exists on the integrated heat spreader without a block mass residing between the boiling enhancement structure and the integrated heat spreader. The boiling enhancement structure has a structured non-planar surface to promote bubble nucleation in an immersion cooling system.

Abstract: Printed circuit board assembly (PCBA) technology is disclosed. A PCBA can include a printed circuit board (PCB). The PCBA can also include a capacitor operably mounted on a side of the PCB. In addition, the PCBA can include a damper material coupled to the PCB and operable to dissipate kinetic energy generated by the capacitor during operation. An electronic system including a capacitor and damping material, and a method for minimizing acoustic vibration in an electronic system are also disclosed.

Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises an interposer, a first die attached to the interposer, and a second die attached to the interposer. In an embodiment, the electronic package further comprises a heatsink thermally coupled to the first die and the second die. In an embodiment, the heatsink has a first surface facing away from the first die and the second die and a second surface facing the first die and the second die. In an embodiment, the heatsink comprises a thermal break between the first die and the second die.

Abstract: Embodiments include semiconductor packages and a method to form such packages. A semiconductor package includes first, second, and third microelectronic devices on a package substrate. The first microelectronic device has a top surface substantially coplanar to a top surface of the second microelectronic device. The third microelectronic device has a top surface above the top surfaces of the first and second microelectronic devices. The semiconductor package includes a first conductive layer on the first and second microelectronic devices, and a second conductive layer on the third microelectronic device. The second conductive layer has a thickness less than a thickness of the first conductive layer, and a top surface substantially coplanar to a top surface of the first conductive layer. The semiconductor includes thermal interface materials on the first and second conductive layers. The first and second conductive layers are comprised of copper, silver, boron nitride, or graphene.

Abstract: Embodiments include semiconductor packages. A semiconductor package includes first and second bottom dies on a package substrate, first top dies on the first bottom die, and second top dies on the second bottom die. The semiconductor package includes thermally conductive slugs on the first bottom die and the second bottom die. The thermally conductive slugs are comprised of a high thermal conductive material. The thermally conductive slugs are positioned directly on outer edges of top surfaces of the first and second bottom dies, inner edges of the top surfaces of the first and second bottom dies, and/or a top surface of the package substrate. The high thermal conductive material of the thermally conductive slugs is comprised of copper, silver, boron nitride, or graphene. The thermally conductive slugs may have two different thicknesses. The semiconductor package may include an active die and/or an integrated heat spreader with the pedestals.

Abstract: Embodiments include semiconductor packages and a method to form such packages. A semiconductor package includes first and second bottom dies on a package substrate. The semiconductor package includes first top dies on the first bottom die, second top dies on the second bottom die, and a pedestal on the first and second bottom dies. The pedestal comprises a high thermal conductive material and is positioned on a region of top surfaces of the first and second bottom dies. The semiconductor package includes an encapsulation layer over the first and second bottom dies, and surrounds the first and second top dies and the pedestal. The semiconductor package includes a TIM over the first and second top dies, pedestal, and encapsulation layer, and an integrated heat spreader (IHS) over the TIM. The pedestal is on a periphery region of the top surfaces of the first and second bottom dies.

Abstract: A multi-chip package includes a substrate (110) having a first side (111), an opposing second side (112), and a third side (213) that extends from the first side to the second side, a first die (120) attached to the first side of the substrate and a second die (130) attached to the first side of the substrate, and a bridge (140) adjacent to the third side of the substrate and attached to the first die and to the second die. No portion of the substrate is underneath the bridge. The bridge creates a connection between the first die and the second die. Alternatively, the bridge may be disposed in a cavity (615, 915) in the substrate or between the substrate and a die layer (750). The bridge may constitute an active die and may be attached to the substrate using wirebonds (241, 841, 1141, 1541).

Abstract: Embodiments include semiconductor packages. A semiconductor package includes a hybrid interposer with a first region and a second region. The first region is comprised of glass or low thermal conductive materials, and the second region is comprised of silicon or diamond materials. The semiconductor package includes a first die on the first region of the hybrid interposer, a second die on the second region of the hybrid interposer, and an integrated heat spreader over the first die, the second die, and the hybrid interposer. The hybrid interposer includes first and second interconnects, where the first interconnects vertically extend from a bottom surface of the first region to a top surface of the first region, and where the second interconnects vertically extend from a bottom surface of the second region to a top surface of the second region. The first interconnects are through-glass vias, and the second interconnects are through-silicon vias.

Abstract: Disclosed herein are integrated circuit (IC) packages with an electronic component having a patterned protective material on a face, as well as related devices and methods. In some embodiments, a computing device may include: an integrated circuit (IC) package with an electronic component having a protective material on the back face of the electronic component, where the protective material is patterned to include an area on the back face of the electronic component that is not covered by the protective material; a circuit board, where the IC package is electrically coupled to the circuit board; and a heat spreader, where the heat spreader is secured to the circuit board and in thermal contact with the area on the back face of the electronic component that is not covered by the protective material.

Abstract: A multi-chip package includes a substrate (110) having a first side (111), an opposing second side (112), and a third side (213) that extends from the first side to the second side, a first die (120) attached to the first side of the substrate and a second die (130) attached to the first side of the substrate, and a bridge (140) adjacent to the third side of the substrate and attached to the first die and to the second die. No portion of the substrate is underneath the bridge. The bridge creates a connection between the first die and the second die. Alternatively, the bridge may be disposed in a cavity (615, 915) in the substrate or between the substrate and a die layer (750). The bridge may constitute an active die and may be attached to the substrate using wirebonds (241, 841, 1141, 1541).