Patents by Inventor Chia-Wei Wu

Chia-Wei Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10867803
    Abstract: A method of manufacturing a semiconductor device includes exposing a material to a semi-aqueous etching solution. The semi-aqueous etching solution comprises a solvent which chelates with the material and acts as a catalyst between the etching driving force and the material. As such, the etching driving force may be used to remove the material.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yao-Wen Hsu, Jian-Jou Lian, Neng-Jye Yang, Chia-Wei Wu, Kuan-Lin Chen, Kuo Bin Huang, Li-Min Chen
  • Patent number: 10861855
    Abstract: A semiconductor device and method of manufacturing the same is provided in the present invention. The method includes the step of forming first mask patterns on a substrate, wherein the first mask patterns extend in a second direction and are spaced apart in a first direction to expose a portion of first insulating layer, removing the exposed first insulating layer to form multiple recesses in the first insulating layer, performing a surface treatment to the recess surface, filling up the recesses with a second insulating layer and exposing a portion of the first insulating layer, removing the exposed first insulating layer to form a mesh-type isolation structure, and forming storage node contact plugs in the openings of mesh-type isolation structure.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: December 8, 2020
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Li-Wei Feng, Shih-Fang Tzou, Chien-Cheng Tsai, Chih-Chi Cheng, Chia-Wei Wu, Ger-Pin Lin
  • Patent number: 10817047
    Abstract: A tracking system is disclosed. The tracking system comprises a head-mounted display (HMD) worn on a head of a user and configured to virtualize a body movement of the user in a virtual environment; and a plurality of sensors worn on feet of the user configured to determine body information of the user according to the body movement of the user, and transmit the determined body information to the HMD; wherein the HMD virtualizes the body movement of the user according to the determined body information; wherein the body information is related to a plurality of mutual relationships between the plurality of sensors and the HMD.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: October 27, 2020
    Assignee: XRSpace CO., LTD.
    Inventors: Peter Chou, Chun-Wei Lin, Yi-Kang Hsieh, Chia-Wei Wu
  • Patent number: 10761423
    Abstract: A method includes forming a tri-layer. The tri-layer includes a bottom layer; a middle layer over the bottom layer; and a top layer over the middle layer. The top layer includes a photo resist. The method further includes removing the top layer; and removing the middle layer using a chemical solution. The chemical solution is free from potassium hydroxide (KOH), and includes at least one of a quaternary ammonium hydroxide and a quaternary ammonium fluoride.
    Type: Grant
    Filed: October 3, 2017
    Date of Patent: September 1, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Min Chen, Kuo Bin Huang, Neng-Jye Yang, Chia-Wei Wu, Jian-Jou Lian
  • Publication number: 20200266065
    Abstract: A middle layer removal method is provided. The method includes providing a substrate having a structure formed on the substrate, and forming a spacer layer on the structure. The method includes forming a mask layer over the spacer layer, the mask layer including a first layer, a second layer over the first layer, and a third layer over the second layer. The method also includes patterning the third layer of the mask layer, and etching the first layer and the second layer of the mask layer to form an opening to expose a bottom surface of the second layer. The method further includes removing the second layer using a wet etchant.
    Type: Application
    Filed: May 8, 2020
    Publication date: August 20, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Nai-Chia CHEN, Wan Hsuan HSU, Chia-Wei WU, Neng-Jye YANG, Chun-Li CHOU
  • Publication number: 20200235101
    Abstract: A semiconductor device and method of manufacturing the same is provided in the present invention. The method includes the step of forming first mask patterns on a substrate, wherein the first mask patterns extend in a second direction and are spaced apart in a first direction to expose a portion of first insulating layer, removing the exposed first insulating layer to form multiple recesses in the first insulating layer, performing a surface treatment to the recess surface, filling up the recesses with a second insulating layer and exposing a portion of the first insulating layer, removing the exposed first insulating layer to form a mesh-type isolation structure, and forming storage node contact plugs in the openings of mesh-type isolation structure.
    Type: Application
    Filed: April 7, 2020
    Publication date: July 23, 2020
    Inventors: Li-Wei Feng, Shih-Fang Tzou, Chien-Cheng Tsai, Chih-Chi Cheng, Chia-Wei Wu, Ger-Pin Lin
  • Publication number: 20200185505
    Abstract: A semiconductor device includes a substrate having at least a trench formed therein. A conductive material fills a lower portion of the trench. A barrier layer is between the conductive material and the substrate. An insulating layer is in the trench and completely covers the conductive material and the barrier layer, wherein a portion of the insulating layer covering the barrier layer has a bird's peak profile.
    Type: Application
    Filed: February 17, 2020
    Publication date: June 11, 2020
    Inventors: Chia-Wei Wu, Ting-Pang Chung, Tien-Chen Chan, Shu-Yen Chan
  • Patent number: 10658365
    Abstract: A semiconductor device and method of manufacturing the same is provided in the present invention. The method includes the step of forming first mask patterns on a substrate, wherein the first mask patterns extend in a second direction and are spaced apart in a first direction to expose a portion of first insulating layer, removing the exposed first insulating layer to form multiple recesses in the first insulating layer, performing a surface treatment to the recess surface, filling up the recesses with a second insulating layer and exposing a portion of the first insulating layer, removing the exposed first insulating layer to form a mesh-type isolation structure, and forming storage node contact plugs in the openings of mesh-type isolation structure.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: May 19, 2020
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Li-Wei Feng, Shih-Fang Tzou, Chien-Cheng Tsai, Chih-Chi Cheng, Chia-Wei Wu, Ger-Pin Lin
  • Patent number: 10658179
    Abstract: Aspects of the disclosure provide a method. The method includes providing a substrate having a structure formed on the substrate, and forming a spacer layer on the structure. Then, the method includes forming a mask layer over the spacer layer. The mask layer includes a first layer, a second layer over the first layer, and a third layer over the second layer. Further, the method includes patterning the third layer of the mask layer, and etching the first layer and the second layer of the mask layer with a dry etching process using the third layer as an etch mask to form an opening that exposes a portion of the spacer layer. Then, the method includes removing the second layer using a wet etchant before a formation of a backfill material layer in the opening and over the first layer.
    Type: Grant
    Filed: August 17, 2018
    Date of Patent: May 19, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Nai-Chia Chen, Wan Hsuan Hsu, Chia-Wei Wu, Neng-Jye Yang, Chun-Li Chou
  • Patent number: 10636798
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a memory region and a periphery region; forming a first trench and a second trench in substrate on the memory region, wherein a width of the second trench is greater than a width of the first trench; forming a first liner, a second liner, and a third liner in the first trench and the second trench; performing a surface treatment process to lower stress of the third liner; and planarizing the third liner, the second liner, and the first liner to form a first isolation structure and a second isolation structure.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: April 28, 2020
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Yu-Shan Su, Chia-Wei Wu, Ting-Pang Chung
  • Patent number: 10608093
    Abstract: A semiconductor device and a method of forming the same are disclosed. First, a substrate having a main surface is provided. At least a trench is formed in the substrate. A barrier layer is formed in the trench and a conductive material is formed on the barrier layer and filling up the trench. The barrier layer and the conductive material are then recessed to be lower than the upper surface of the substrate. After that, an oxidation process is performed to oxidize the barrier layer and the conductive material thereby forming an insulating layer.
    Type: Grant
    Filed: January 18, 2018
    Date of Patent: March 31, 2020
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Chia-Wei Wu, Ting-Pang Chung, Tien-Chen Chan, Shu-Yen Chan
  • Publication number: 20200097066
    Abstract: A method of tracking an ankle of a user in an interactive system comprises obtaining a first ankle information and a head information of the user; determining a second ankle information according to the first ankle information; and calibrating the second ankle information according to the first ankle information and the head information; wherein the first ankle information is a 3 Dof (degrees of freedom) information; the second ankle information is a 6 Dof information; the head information is the 6 DoF information.
    Type: Application
    Filed: September 20, 2018
    Publication date: March 26, 2020
    Inventors: Peter Chou, Yi-Kang Hsieh, Chun-Wei Lin, Chia-Wei Wu
  • Publication number: 20200097707
    Abstract: A camera module, for a head-mounted display (HMD), includes a first optical module for tracking a hand motion of a user; a second optical module for reconstructing a hand gesture or a step of the user and a space; a third optical module for establishing a three-dimensional (3D) virtual object; and a control unit for integrating with the first optical module, the second optical module and the third optical module to virtualize a body behavior of the user; wherein the camera module is rotatable to maximize a tracking range.
    Type: Application
    Filed: September 20, 2018
    Publication date: March 26, 2020
    Inventors: Peter Chou, Chun-Wei Lin, Yi-Kang Hsieh, Chia-Wei Wu, Chuan-Chang Wang
  • Publication number: 20200098012
    Abstract: A recommendation method applied in a reality presenting device is disclosed. The reality presenting device includes a first sensing module, a second sensing module and a processing unit. The recommendation method includes: the first sensing module sensing a user-related information corresponding to a user who wears the reality presenting device; the second sensing module sensing an environment-related information corresponding to an environment which the user experiences; and the processing unit generating and presenting a recommended object to the user according to the user-related information or the environment-related information.
    Type: Application
    Filed: September 25, 2018
    Publication date: March 26, 2020
    Inventors: Peter Chou, Chih-Heng Che, Chia-Wei Wu
  • Publication number: 20200089335
    Abstract: A tracking method of a controller is provided. The controller comprises an inertial measurement unit (IMU) for generating a first controller information in an interactive system, and a plurality of identification dots are arranged on a surface of the controller. The tracking method includes obtaining a first image having the controller and at least one of the identification dots; determining a second controller information according to the first controller information; and calibrating the second controller information according to the first image; wherein the first controller information is a 3 degrees of freedom (3Dof) information, and the second controller information is a 6Dof information.
    Type: Application
    Filed: September 19, 2018
    Publication date: March 19, 2020
    Inventors: Peter Chou, Yi-Kang Hsieh, Chun-Wei Lin, Chia-Wei Wu
  • Publication number: 20200089311
    Abstract: A tracking system is disclosed. The tracking system comprises a head-mounted display (HMD) worn on a head of a user and configured to virtualize a body movement of the user in a virtual environment; and a plurality of sensors worn on feet of the user configured to determine body information of the user according to the body movement of the user, and transmit the determined body information to the HMD; wherein the HMD virtualizes the body movement of the user according to the determined body information; wherein the body information is related to a plurality of mutual relationships between the plurality of sensors and the HMD.
    Type: Application
    Filed: September 19, 2018
    Publication date: March 19, 2020
    Inventors: Peter Chou, Chun-Wei Lin, Yi-Kang Hsieh, Chia-Wei Wu
  • Publication number: 20200083038
    Abstract: A semiconductor device and method of manufacture are provided. After a patterning of a middle layer, the middle layer is removed. In order to reduce or prevent damage to other underlying layers exposed by the patterning of the middle layer and intervening layers, an inhibitor is included within an etching process in order to inhibit the amount of material removed from the underlying layers.
    Type: Application
    Filed: November 18, 2019
    Publication date: March 12, 2020
    Inventors: Jian-Jou Lian, Yao-Wen Hsu, Neng-Jye Yang, Li-Min Chen, Chia-Wei Wu, Kuan-Lin Chen, Kuo Bin Huang
  • Publication number: 20200081016
    Abstract: Mycobacterial-specific biomarkers and methods of using such biomarkers for diagnosis of mycobacterial infection in a mammal are disclosed.
    Type: Application
    Filed: August 29, 2019
    Publication date: March 12, 2020
    Inventors: Adel Mohamed Talaat, Chia-wei Wu
  • Publication number: 20200058502
    Abstract: Aspects of the disclosure provide a method. The method includes providing a substrate having a structure formed on the substrate, and forming a spacer layer on the structure. Then, the method includes forming a mask layer over the spacer layer. The mask layer includes a first layer, a second layer over the first layer, and a third layer over the second layer. Further, the method includes patterning the third layer of the mask layer, and etching the first layer and the second layer of the mask layer with a dry etching process using the third layer as an etch mask to form an opening that exposes a portion of the spacer layer. Then, the method includes removing the second layer using a wet etchant before a formation of a backfill material layer in the opening and over the first layer.
    Type: Application
    Filed: August 17, 2018
    Publication date: February 20, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Nai-Chia Chen, Wan Hsuan Hsu, Chia-Wei Wu, Neng-Jye Yang, Chun-Li Chou
  • Publication number: 20200051985
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a memory region and a periphery region; forming a first trench and a second trench in substrate on the memory region, wherein a width of the second trench is greater than a width of the first trench; forming a first liner, a second liner, and a third liner in the first trench and the second trench; performing a surface treatment process to lower stress of the third liner; and planarizing the third liner, the second liner, and the first liner to form a first isolation structure and a second isolation structure.
    Type: Application
    Filed: October 21, 2019
    Publication date: February 13, 2020
    Inventors: Yu-Shan Su, Chia-Wei Wu, Ting-Pang Chung