Patents by Inventor Chieh Yu

Chieh Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200116860
    Abstract: A proximity sensing device which is disposed under the OLED panel and has an emitting module and a receiving module, is provided. The emitting module can emit an invisible light which has a peak wavelength not less than 1000 nm. The receiving module is disposed adjacent to the emitting module and can receive a reflecting light from the reflected invisible light. Therefore, the invisible light passing through the OLED panel will not cause a bright spot on the panel.
    Type: Application
    Filed: March 25, 2019
    Publication date: April 16, 2020
    Applicant: Everlight Electronics Co., Ltd.
    Inventors: Shih-Wen Lai, Yi-Ting Huang, Jing-Hong Lai, Chih-Hao Hsu, Chia-Wei Yang, Chih-Min Lin, Chieh-Yu Kang, Kuang-Mao Lu, Jian-Hong Fan
  • Patent number: 10585346
    Abstract: Technical solutions are described for fabricating a semiconductor wafer. An example method includes generating a process assumption band for an element of the wafer. The process assumption band depicts a shape of the element based on a set of process variations in a photolithographic process used for fabricating the wafer. The method also includes generating a process variation band for the element of the wafer based on optical process correction simulation of the photolithographic process using design rules associated with the wafer. The method also includes determining a deviation between the process assumption band and the process variation band, and recalculating one or more design rules from the design rules associated with the wafer based on the deviation. The method also includes updating the design of the wafer in response to the process variation band not being changeable to match the process assumption band, after recalculating the design rules.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: March 10, 2020
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, GLOBALFOUNDRIES, INC.
    Inventors: Chieh-Yu Lin, Dongbing Shao, Kehan Tian, Zheng Xu
  • Patent number: 10559728
    Abstract: A semiconductor package structure is disclosed. The package structure includes a first substrate, a second substrate on which the first substrate is disposed, and a semiconductor chip which is disposed on the first substrate. The two substrates can include two notches or two solder receiving portions. Therefore, when the package structure is disposed on the printed circuit board (PCB), the package structure will protrude less on the surface of the printed circuit board (PCB); or, the solders on the printed circuit board (PCB) will not be shifted by the package structure.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: February 11, 2020
    Assignee: Everlight Electronics Co., Ltd.
    Inventors: Chih-Ming Ho, Chun-Chih Liang, Ding-Hwa Cherng, Kuang-Mao Lu, Wen-Chueh Lo, Hao-Yu Yang, Chieh-Yu Kang, Han-Chang Pan
  • Patent number: 10545145
    Abstract: The invention, in some aspects relates to compositions and methods for imaging biological systems and physiological activity and conditions in cells.
    Type: Grant
    Filed: April 14, 2016
    Date of Patent: January 28, 2020
    Assignee: Massachusetts Institute of Technology
    Inventors: Or Shemesh, Asmamaw Wassie, Chih-Chieh Yu, Edward Boyden
  • Publication number: 20200020829
    Abstract: A light-emitting device includes a semiconductor structure including a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a via penetrating the second semiconductor layer and the active layer to expose a surface of the first semiconductor layer; a first electrode formed in the via and on the second semiconductor layer; a second electrode formed on the second semiconductor layer; and an insulating structure covering the first electrode, the second electrode and the semiconductor structure and including a first opening to expose the first electrode and a second opening to expose the second electrode, wherein the first electrode and the second electrode respectively include a metal layer contacting the insulating layer, the metal layer includes a material including a surface tension value larger than 1500 dyne/cm and a standard reduction potential larger than 0.3 V.
    Type: Application
    Filed: September 10, 2019
    Publication date: January 16, 2020
    Inventors: Yi-Hung Lin, Chao-Hsing Chen, Jia-Kuen Wang, Tzu-Yao Tseng, Jen-Chieh Yu, Guan-Wu Chen
  • Patent number: 10524349
    Abstract: A printed circuit board with built-in vertical heat dissipation ceramic block, and an electrical assembly are disclosed. The electrical assembly includes the board and a plurality of electronic components. The printed circuit boards includes a dielectric material layer defining at least one through hole, at least one ceramic block corresponding to the through hole, at least one fixing portion for joining the ceramic block to the through hole of the dielectric material layer, a metal circuit layer provided on upper surfaces of the dielectric material layer and the ceramic block, and a high thermal conductivity layer provided on lower surfaces of the dielectric material layer and the ceramic block. The printed circuit board allows the location and size of the ceramic block to be modified according to requirements, so as to implement complicated circuit designs, achieve good effect of thermal conduction, control thermal conduction path, and reduce manufacturing cost.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: December 31, 2019
    Assignees: ICP Technology Co., Ltd., Xiamen Sentecee E&E Co., Ltd.
    Inventors: Ho-Chieh Yu, Cheng-Lung Liao, Chun-Yu Lin, Jason An-Cheng Huang
  • Publication number: 20190371261
    Abstract: The disclosure provides a storage medium, an expansion base and an operation method thereof combined with a portable electronic device. The portable electronic device is pre-installed with an application program and includes a touch screen. The expansion base is paired with the portable electronic device and accommodates the portable electronic device. When the portable electronic device is accommodated inside the expansion base, a touch window on the surface of the expansion base exposes at least a portion of the touch screen, and the portable electronic device executes the application program to automatically adjust a size or a display position of a display image of the touch screen to correspond to the touch window.
    Type: Application
    Filed: May 13, 2019
    Publication date: December 5, 2019
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Che-Wei Liang, Xiu-Yu Lin, Yi-Han Liao, Sheng-Chieh Tang, Chieh-Yu Chan, Chiao-Tsu Chiang, Wen-Yi Chiu, Wei-Chih Hsu, Li-Fang Chen, Yi-Jing Lin
  • Publication number: 20190346075
    Abstract: An adapter with two male threads includes an integrally-connected body and a hanger. The two ends of the body are penetrated by a through hole and each have an external thread segment. The body has two spaced-apart flanges between the two external thread segments. A groove is formed between the two flanges. One end of the hanger has a first connecting portion connectedly disposed in the groove. The other end of the hanger has a second connecting portion connected to an external object. Therefore, two water pipes each having a female thread connection end can be connected by the two external thread segments of the body to ensure ease of use and cut manufacturing costs.
    Type: Application
    Filed: May 10, 2018
    Publication date: November 14, 2019
    Inventor: Tang Chieh YU
  • Patent number: 10474606
    Abstract: Various examples described herein provide for a management controller that includes a virtual universal serial bus (USB) host controller that can emulate an actual USB host controller to a central processor. A particular endpoint from a number of endpoints is associated with a virtual USB device that is coupled to the virtual USB host controller. The particular endpoint is to refer to a location in a management memory.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: November 12, 2019
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Theodore F. Emerson, David F. Heinrich, Richard Wei Chieh Yu, Robert L. Noonan, Christopher J. Frantz, Sze Hau Loh
  • Patent number: 10467456
    Abstract: A tracking system includes a trackable device and a tracking device. The trackable device has a three-dimensional shape. The trackable device includes a first orientation sensor for sensing a first orientation of the trackable device. The tracking device is communicated with the trackable device. The tracking device includes a second orientation sensor, an image sensor and a processing circuit. The second orientation sensor is configured to sense a second orientation of the tracking device. The image sensor configured to capture an image. The processing circuit is coupled with the second orientation sensor and the image sensor. The processing circuit is operable to calculate a two-dimensional silhouette corresponding to the three-dimensional shape according to the first orientation and the second orientation, and utilize the two-dimensional silhouette to search the image captured by the image sensor for allocating coordinates of the trackable device within the image.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: November 5, 2019
    Assignee: HTC Corporation
    Inventors: Yuan-Tung Chen, Chieh-Yu Tseng
  • Patent number: 10457015
    Abstract: A mesh material for fabricating hunting blinds, tents, and other similar flexible structures. The material is durable, water-resistant, and partially light-transmissive such that persons or objects inside or behind the structures are not easily seen from outside the structures. The material is also semi-permeable to air flow for ventilation purposes. The mesh material is fabricated from an interwoven polyester fabric that is coated with acrylic and a mixture of silicone and ethylene vinyl acetate (EVA). Patterns and/or colors are printed on both sides of the fabric with a heat transfer paper printing process to provide a desired level of light transmissivity.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: October 29, 2019
    Assignee: Tru-View LLC
    Inventors: Hao Chen, Chieh-Yu Chen
  • Patent number: 10446721
    Abstract: A light-emitting device includes a semiconductor structure including a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a via penetrating the second semiconductor layer and the active layer to expose a surface of the first semiconductor layer; a first electrode formed in the via and on the second semiconductor layer; a second electrode formed on the second semiconductor layer; and an insulating structure covering the first electrode, the second electrode and the semiconductor structure and including a first opening to expose the first electrode and a second opening to expose the second electrode, wherein the first electrode and the second electrode respectively include a metal layer contacting the insulating layer, the metal layer includes a material including a surface tension value larger than 1500 dyne/cm and a standard reduction potential larger than 0.3 V.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: October 15, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Yi-Hung Lin, Chao-Hsing Chen, Jia-Kuen Wang, Tzu-Yao Tseng, Jen-Chieh Yu, Guan-Wu Chen
  • Publication number: 20190294039
    Abstract: Technical solutions are described for fabricating a semiconductor wafer. An example method includes generating a process assumption band for an element of the wafer. The process assumption band depicts a shape of the element based on a set of process variations in a photolithographic process used for fabricating the wafer. The method also includes generating a process variation band for the element of the wafer based on optical process correction simulation of the photolithographic process using design rules associated with the wafer. The method also includes determining a deviation between the process assumption band and the process variation band, and recalculating one or more design rules from the design rules associated with the wafer based on the deviation. The method also includes updating the design of the wafer in response to the process variation band not being changeable to match the process assumption band, after recalculating the design rules.
    Type: Application
    Filed: June 14, 2019
    Publication date: September 26, 2019
    Inventors: CHIEH-YU LIN, DONGBING SHAO, KEHAN TIAN, ZHENG XU
  • Publication number: 20190273193
    Abstract: This disclosure discloses a light-emitting device. The light-emitting device includes a light-emitting stack with a first (top) surface, a bottom surface and at least one side surface connected to the first surface and the bottom surface, a light-reflective enclosure with a second (top) surface, a contact electrode formed on the bottom surface of the light-emitting layer, and a wavelength converting layer. Moreover, the light-reflective enclosure surrounds the side surface of the light-emitting stack and exposes to the first surface. The wavelength converting layer covers the first surface and the second surface. In addition, the second surface has a plurality of fine concave structures distributed on the second surface.
    Type: Application
    Filed: May 22, 2019
    Publication date: September 5, 2019
    Inventors: Chien-Liang LIU, Ming-Chi HSU, Jen-Chieh YU
  • Patent number: 10394116
    Abstract: Technical solutions are described for fabricating a semiconductor wafer. An example method includes generating a process assumption band for an element of the wafer. The process assumption band depicts a shape of the element based on a set of process variations in a photolithographic process used for fabricating the wafer. The method also includes generating a process variation band for the element of the wafer based on optical process correction simulation of the photolithographic process using design rules associated with the wafer. The method also includes determining a deviation between the process assumption band and the process variation band, and recalculating one or more design rules from the design rules associated with the wafer based on the deviation. The method also includes updating the design of the wafer in response to the process variation band not being changeable to match the process assumption band, after recalculating the design rules.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: August 27, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chieh-Yu Lin, Dongbing Shao, Kehan Tian, Zheng Xu
  • Publication number: 20190256633
    Abstract: The invention encompasses hydrogels, monomer precursors of the hydrogels, methods for the preparation thereof, and methods of use therefor. The linking of monomers can take place using non-radical, bioorthogonal reactions such as copper-free click-chemistry.
    Type: Application
    Filed: February 5, 2019
    Publication date: August 22, 2019
    Inventors: Ruixuan Gao, Linyi Gao, Chih-Chieh Yu, Edward Stuart Boyden
  • Publication number: 20190259924
    Abstract: A semiconductor package structure is disclosed. The package structure includes a first substrate, a second substrate on which the first substrate is disposed, and a semiconductor chip which is disposed on the first substrate. The two substrates can include two notches or two solder receiving portions. Therefore, when the package structure is disposed on the printed circuit board (PCB), the package structure will protrude less on the surface of the printed circuit board (PCB); or, the solders on the printed circuit board (PCB) will not be shifted by the package structure.
    Type: Application
    Filed: August 27, 2018
    Publication date: August 22, 2019
    Applicant: Everlight Electronics Co., Ltd.
    Inventors: Chih-Ming Ho, Chun-Chih Liang, Ding-Hwa Cherng, Kuang-Mao Lu, Wen-Chueh Lo, Hao-Yu Yang, Chieh-Yu Kang, Han-Chang Pan
  • Patent number: 10373966
    Abstract: A Mask ROM is shown, including first resistors as a first part of memory cells, second resistors as a second part of memory cells, and contact plugs. Each first resistor includes: an undoped first poly-Si layer including an upper horizontal bar, a lower horizontal bar contiguous with the upper horizontal bar, and a step structure with a step height at which the two bars are contiguous, a spacer on the sidewall of the step structure, and a first silicide layer on the first poly-Si layer and being divided apart by the spacer. Each second resistor includes an undoped second poly-Si layer, and a contiguous second silicide layer on the second poly-Si layer. The contact plugs are disposed on the first silicide layer on the upper horizontal bar of each first poly-Si layer, and on the second silicide layer.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: August 6, 2019
    Assignee: United Microelectronics Corp.
    Inventors: Po-Han Jen, Chieh-Yu Tsai, Chun-Cheng Chiang
  • Publication number: 20190221728
    Abstract: An embodiment of present disclosure discloses a light-emitting device which includes a first light-emitting unit, a second light-emitting unit, a first optic structure, a second optic structure, a first light-transmitting structure, a second light-transmitting structure, and a light-blocking structure. The first optic structure covers a top surface and a side surface of the first light-emitting unit, the second optic structure covers a top surface and a side surface of the second light-emitting unit. The first light-transmitting structure covers the first optic structure. The second light-transmitting structure covers the second optic structure. The light-blocking structure surrounds the first light-emitting unit and the second light-emitting unit, and covers the side surfaces of the first optic structure, the second optic structure, the first light-transmitting structure and the second light-transmitting structure.
    Type: Application
    Filed: January 17, 2019
    Publication date: July 18, 2019
    Inventors: Jen-Chieh YU, Yih-Hua RENN, Hsin-Mao LIU, Lung-Kuan LAI, Ching-Tai CHENG
  • Publication number: 20190194539
    Abstract: The present invention relates to a phosphor, a method for preparing the phosphor, an optoelectronic component, and a method for producing the optoelectronic component. The phosphor has the following general formula: La3(1?x)Ga1?yGe5(1?z)O16: 3xA3+, yCr3+, 5zB4+, where x, y, and z do not equal to 0 simultaneously; A represents at least one of Gd and Yb; B represents at least one of Sn, Nb, and Ta. For the phosphor, its emission spectrum is within a red visible light region and a near-infrared region when excited by blue visible light, purple visible light or ultraviolet light; and it has a wide reflection spectrum and a high radiant flux. Therefore, it can be used in optoelectronic components such as LEDs to meet requirements of current medical testing, food composition analysis, security cameras, iris/facial recognition, virtual reality, gaming notebook and light detection and ranging applications.
    Type: Application
    Filed: October 19, 2018
    Publication date: June 27, 2019
    Applicant: Everlight Electronics Co., Ltd.
    Inventors: Veeramani Rajendran, Mu-Huai Fang, Ru-Shi Liu, Ho Chang, Kuang-Mao Lu, Yan-Shen Lin, Chieh-Yu Kang, Gabriel Nicolo A. De Guzman, Shu-Fen Hu