Patents by Inventor Chien-Chung Chen

Chien-Chung Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9539445
    Abstract: The invention provides an anion-containing calcium phosphate compound, composition and dental patch comprising the same and their use in remineralizing teeth. The anion-containing calcium phosphate compound has the following formula: (Ca+2)x(anion?a)y(PO4?3)z wherein 2x=(a*y+3z); a is an integer of 1 to 3; and each of x, y and z is not 0.
    Type: Grant
    Filed: November 22, 2010
    Date of Patent: January 10, 2017
    Assignee: TAIPEI MEDICAL UNIVERSITY
    Inventors: Jen-Chang Yang, Nai-Chia Teng, Chien-Chung Chen, Sheng-Yang Lee, Chen-Feng Ma, Dian-Yu Ji
  • Publication number: 20160369435
    Abstract: An apparatus is provided to make fabrics. The fabrics are iodine-based-antimicrobial, odor-absorbing and colored. A pigment, an antimicrobial agent, a dispersant and a related polymer substrate carrier are bond to obtain iodine-based-antimicrobial colored masterbatches. The antimicrobial agent contains an iodine-containing compound and zinc oxide. The masterbatches are spun into yarns for making fabrics with the pigment and the antimicrobial agent uniformly mixed. Thus, the present invention significantly reduces waste water pollution from dyeing and processing and avoids skin allergies.
    Type: Application
    Filed: June 17, 2015
    Publication date: December 22, 2016
    Inventors: Shui-Ching Lin, Kai Yan, Chun-Tiao Hsu, Tang-Chun Chang, Chien-Chung Chen
  • Publication number: 20160369434
    Abstract: An apparatus is provided to make fabrics. The fabrics are environmentally friendly, water-repellent and colored. A pigment, a C4 fluorine-containing compound, a dispersant and a related polymer substrate carrier are bond to obtain water-repellent colored masterbatches. The C4 fluorine-containing compound is environmentally friendly while being free of perfluorooctanoic acid (PFOA) and perfluorooctane sulphonate (PFOS). The masterbatches are spun into yarns for making a fabric with the pigment and the C4 fluorine-containing compound uniformly mixed. Thus, the present invention significantly reduces waste water pollution from dyeing and processing without generating environmentally harmful PFOA and PFOS.
    Type: Application
    Filed: June 17, 2015
    Publication date: December 22, 2016
    Inventors: Shui-Ching Lin, Kai Yan, Chun-Tiao Hsu, Tang-Chun Chang, Chien-Chung Chen
  • Publication number: 20160064433
    Abstract: Backside illuminated image sensor structures are provided. The backside illuminated image sensor structure includes a device substrate having a frontside and a backside and pixels formed at the frontside of the substrate. The backside illuminated image sensor structure further includes a metal element formed in a dielectric layer over the backside of the substrate and a color filter layer formed over the dielectric layer. In addition, the metal element is configured to form a light blocking area in the device substrate and is made of copper.
    Type: Application
    Filed: November 9, 2015
    Publication date: March 3, 2016
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hung-Chang CHANG, Chun-Yuan HSU, Chien-Chung CHEN, Yung-Hsieh LIN
  • Publication number: 20160047045
    Abstract: A process control method is provided for performing a deposition process on a plurality of wafers of a batch. The process control method includes: deciding a placement location of the wafers of the batch according to the history information of a tool and the product information of the batch; calculating a target value of each placement location according to the placement location of the wafers of the batch and the history information of the tool; calculating a process parameter according to the history information of the tool, the product information of the batch, and the target value of each placement location; and performing a deposition process according to the placement location of the wafers of the batch and the process parameter.
    Type: Application
    Filed: October 31, 2014
    Publication date: February 18, 2016
    Inventors: Jyun-Da Wu, Shih-Tsung Hsiao, Chien-Chung Chen, Huang-Wei Wu, Huang-Wen Chen, Sheng-Hsiu Peng
  • Patent number: 9257581
    Abstract: The present disclosure relates to a back-side illuminated CMOS image sensor (BSI CIS). In some embodiments, the BSI CSI has a semiconductor substrate with a front-side and a back-side. A plurality of photodetectors are located within the front-side of the semiconductor substrate. An implantation region is located within the semiconductor substrate at a position separated from the plurality of photodetectors. The implantation region is disposed below the plurality of photodetectors and has a non-uniform doping concentration along a lateral plane parallel to the back-side of the semiconductor substrate. The non-uniform doping concentration allows for the BSI CSI to achieve a small total thickness variation (TTV) between one or more photodetectors and a back-side of a thinned semiconductor substrate that provides for good device performance.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: February 9, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: En-Ting Lee, Kun-El Chen, Yu-Sheng Wang, Chien-Chung Chen, Huai-Tei Yang
  • Publication number: 20160025414
    Abstract: A dispatch control method for a furnace process including the following steps is provided. Before a plurality of lots of wafers is loaded into a furnace, the characteristic variation value of each of the plurality of lots of wafers is calculated. The plurality of lots of wafers is ordered according to the size of the characteristic variation values. The plurality of lots of wafers is placed in the furnace in a descending order of the characteristic variation values corresponding to a plurality of locations in the furnace causing the characteristic variation values to change from smaller to larger.
    Type: Application
    Filed: October 9, 2014
    Publication date: January 28, 2016
    Inventors: Jyun-Da Wu, Shih-Tsung Hsiao, Chien-Chung Chen
  • Patent number: 9209339
    Abstract: Embodiments of mechanisms of a backside illuminated image sensor structure are provided. The backside illuminated image sensor structure includes a device substrate having a frontside and a backside and pixels formed at the frontside of the substrate. The backside illuminated image sensor structure further includes a metal element formed in a dielectric layer over the backside of the substrate and a color filter layer formed over the dielectric layer. In addition, the metal element is configured to form a light blocking area in the device substrate and is made of copper.
    Type: Grant
    Filed: December 6, 2013
    Date of Patent: December 8, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hung-Chang Chang, Chun-Yuan Hsu, Chien-Chung Chen, Yung-Hsieh Lin
  • Publication number: 20150342719
    Abstract: The invention provides a highly aligned and closely packed hollow fiber assembly, wherein the assemblies of fibrous membrane has a width-to-fiber diameter ratio (W/d) larger than 10 and the orientation of the fibers is no larger than +/?10°. Also provided is an electrospinning process for the preparation of the fiber assembly of the invention and its applications.
    Type: Application
    Filed: August 12, 2015
    Publication date: December 3, 2015
    Inventors: CHIEN-CHUNG CHEN, JEN-CHANG YANG, JEN-CHIEH LU, SHENG-YANG LEE
  • Patent number: 9202862
    Abstract: A semiconductor structure and a manufacturing method of the same are provided. The semiconductor structure includes a substrate, a first well, a first heavily doping region, a field oxide, a first dielectric layer, and a conductive layer. The first well is disposed on the substrate, and the first heavily doping region is disposed in the first well. The field oxide is disposed on the first well and adjacent to the first heavily doping region. The first dielectric layer is disposed on the field oxide and covering the field oxide. The conductive layer is disposed on the first dielectric layer. The first well and the first heavily doping region have a first type doping.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: December 1, 2015
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Ming-Tung Lee, Cheng-Chi Lin, Chih-Chia Hsu, Chien-Chung Chen, Shih-Chin Lien, Shyi-Yuan Wu
  • Patent number: 9139935
    Abstract: The invention provides a highly aligned and closely packed hollow fiber assembly, wherein the assemblies of fibrous membrane has a width-to-fiber diameter ratio (W/d) larger than 10 and the orientation of the fibers is no larger than +/?10°. Also provided is an electrospinning process for the preparation of the fiber assembly of the invention and its applications.
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: September 22, 2015
    Assignee: TAIPEI MEDICAL UNIVERSITY
    Inventors: Chien-Chung Chen, Jen-Chang Yang, Jen-Chieh Lu, Sheng-Yang Lee
  • Publication number: 20150263085
    Abstract: A semiconductor structure and a manufacturing method of the same are provided. The semiconductor structure includes a substrate, a first well, a first heavily doping region, a field oxide, a first dielectric layer, and a conductive layer. The first well is disposed on the substrate, and the first heavily doping region is disposed in the first well. The field oxide is disposed on the first well and adjacent to the first heavily doping region. The first dielectric layer is disposed on the field oxide and covering the field oxide. The conductive layer is disposed on the first dielectric layer. The first well and the first heavily doping region have a first type doping.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 17, 2015
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Ming-Tung Lee, Cheng-Chi Lin, Chih-Chia Hsu, Chien-Chung Chen, Shih-Chin Lien, Shyi-Yuan Wu
  • Patent number: 9091007
    Abstract: The invention provides an electrospinning apparatus, which comprises one or more spinneret, a rotating collector disposed from the spinneret and configured to collect the fibers, and a sideway motion device disposed on or connected to the spinneret or the rotating collector and configured to propel or move the spinneret or the rotating collector, wherein the sideway motion device is controlled by a controlling unit for providing an angular speed (?) of the sideway motion with a formula: ?=tan?1 x/H wherein x is a parallel motion speed of the device and H is a vertical height between the spinneret and the rotating collector and wherein the angular speed (?) is in a range of about 1.0×10?4 to about 1.0 (°/sec). Also provided is the 2-D or 3-D membranes produced therefrom and a method of using the apparatus of the invention.
    Type: Grant
    Filed: December 10, 2012
    Date of Patent: July 28, 2015
    Assignee: TAIPEI MEDICAL UNIVERSITY
    Inventors: Chien-Chung Chen, Jen-Chang Yang, Keng-Liang Ou, Chen-Yu Liu, Cherng-You Ke
  • Publication number: 20150202816
    Abstract: An apparatus is provided to fabricate a water-repellent fabric. At first, a water-repellent agent is evenly dispersed into masterbatches. Then, the masterbatches is added into fibers to make yarn. At last, the fabric is made with the yarn. Thus, the water-repellent fabric obtains good washing fastness and avoids contaminating the spinning device.
    Type: Application
    Filed: January 12, 2015
    Publication date: July 23, 2015
    Inventors: Shui-Ching Lin, Kai Yan, Chun-Tiao Hsu, Tang-Chun Chang, Chien-Chung Chen
  • Publication number: 20150162398
    Abstract: A metal-insulator-metal (MIM) capacitor includes a semiconductor substrate and a capacitor device. The capacitor device includes a first conductor upright on the semiconductor substrate, a second conductor upright on the semiconductor substrate, and an insulator disposed used for insulating the first conductor from the second conductor. In a method for fabricating the capacitor device, a mask including a test line pattern and a capacitor pattern with a first trench pattern and a second trench pattern is used to form a test line and the first conductor and the second conductor of the capacitor device, thereby decreasing the cost of for fabricating the MIM capacitor.
    Type: Application
    Filed: December 11, 2013
    Publication date: June 11, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yan-Jhih HUANG, Chun-Yuan HSU, Chien-Chung CHEN, Yung-Hsieh LIN
  • Publication number: 20150162365
    Abstract: Embodiments of mechanisms of a backside illuminated image sensor structure are provided. The backside illuminated image sensor structure includes a device substrate having a frontside and a backside and pixels formed at the frontside of the substrate. The backside illuminated image sensor structure further includes a metal element formed in a dielectric layer over the backside of the substrate and a color filter layer formed over the dielectric layer. In addition, the metal element is configured to form a light blocking area in the device substrate and is made of copper.
    Type: Application
    Filed: December 6, 2013
    Publication date: June 11, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Hung-Chang CHANG, Chun-Yuan HSU, Chien-Chung CHEN, Yung-Hsieh LIN
  • Patent number: 9048429
    Abstract: The present invention provides a method for enhancing optoelectronic properties of polymers that contain conjugated moieties in their molecular structures (hereby denoted as “conjugated polymers”), to be used in lighting, photovoltaics, other various optoelectronic devices and applications. The method of the present invention includes preparing a conjugated polymer layer or multiple conjugated polymer layers and imprinting the conjugated polymer layer or layers through the application of a mold or multiple molds.
    Type: Grant
    Filed: March 12, 2012
    Date of Patent: June 2, 2015
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Arnold Chang-Mou Yang, Chien-Chung Chen, Po-Tsun Chen
  • Patent number: 8940609
    Abstract: A semiconductor device and method of forming the semiconductor device are disclosed, where the semiconductor device includes additional implant regions in the source and drain areas of the device for improving Ron-sp and BVD characteristics of the device. The device includes a gate electrode formed over a channel region that separates first and second implant regions in the device substrate. The first implant region has a first conductivity type, and the second implant region has a second conductivity type. A source diffusion region is formed in the first implant region, and a drain diffusion region is formed in the second implant region.
    Type: Grant
    Filed: June 18, 2014
    Date of Patent: January 27, 2015
    Assignee: Macronix International Co., Ltd.
    Inventors: Chien-Chung Chen, Ming-Tung Lee, Shih-Chin Lien, Shyi-Yuan Wu
  • Publication number: 20150022739
    Abstract: The present invention provides a touch panel. The touch panel includes a substrate, a touch sensing device, and an optical matching layer. The touch sensing device is disposed on one side of the substrate, and includes an electrode pattern. The electrode pattern includes silver or silver alloy. At least one side of the substrate has the optical matching layer disposed thereon.
    Type: Application
    Filed: July 17, 2014
    Publication date: January 22, 2015
    Inventors: Chien-Chung Chen, Yung-Lin Chen, Hen-Ta Kang
  • Publication number: 20150009427
    Abstract: A touch panel includes a substrate, a plurality of first touch-sensing units, and a plurality of first optical mesh patterns. The first touch-sensing units electrically insulated from each other or one another are located on the substrate. Each of the first touch-sensing units includes a plurality of first mesh patterns connected together. The first optical mesh patterns are located on the substrate. Besides, the first optical mesh patterns are overlapped with the first mesh patterns and located on a surface of the first mesh patterns adjacent to a user.
    Type: Application
    Filed: July 4, 2014
    Publication date: January 8, 2015
    Applicant: WINTEK CORPORATION
    Inventors: Chien-Chung Chen, Yi-Shu Chen, Hen-Ta Kang, Chong-Wei Li