Abstract: A semiconductor device includes a first transistor and a protection structure. The first transistor includes a gate electrode, a gate dielectric disposed on the gate electrode, and a channel layer disposed on the gate dielectric. The protection structure is laterally surrounding the gate electrode, the gate dielectric and the channel layer of the first transistor. The protection structure includes a first capping layer and a dielectric portion. The first capping layer is laterally surrounding and contacting the gate electrode, the gate dielectric and the channel layer of the first transistor. The dielectric portion is disposed on the first capping layer and laterally surrounding the first transistor.

Abstract: An electronic module includes first and second shells respectively having first and second edge surfaces with respective first and second joint units jointed together by ultrasonic welding. The first joint unit has first and second projection portions on the first edge surface, a first indentation portion between the first and second projection portions, and a bump on the second projection portion. The second joint unit complementarily engages the first joint unit. First and second bonding layers are respectively formed between the first indentation portion and the second joint unit and between the second projection portion and the second joint unit. Waterproof cable assemblies are mounted to the shells.

Abstract: A method for configuring host memory buffer, a memory storage apparatus and a memory control circuit unit are provided. The method includes: loading an initial program stored in an option ROM of a memory storage apparatus to a buffer memory of a host system; executing the initial program to configure continuous physical addresses in the buffer memory as a host memory buffer of the memory storage apparatus and setting a signature at the continuous physical addresses and storing the signature. The method further includes: re-establishing a link with the continuous physical addresses when receiving a reset command corresponding to a suspend-to-RAM mode and determining whether a signature set at the continuous physical addresses is the same as the stored signature; and resuming to use the continuous physical addresses as the host memory buffer of the memory storage apparatus if the signature is the same as the stored signature.

Abstract: A housing includes a first surrounding wall connected around a base wall. The first surrounding wall has a first joint portion opposite to the base wall, a first outer surface and a first inner surface. The first outer and inner surfaces extend from the first joint portion toward the base wall. The first joint portion is stepped and has a first projecting portion adjoining the first outer surface, and a first shoulder portion indented from the first projecting portion and proximal to the first inner surface. The first shoulder portion has a plurality of parallel spaced-apart ribs protruding therefrom in a same direction as the first projecting portion. Each of the ribs has a tip that does not extend beyond a top end of the first projecting portion.

Abstract: A sleep mode enabling method for a memory storage apparatus is provided. The method includes: setting a sleep pin connecting flag as a first value if a potential signal on a device sleep signal pin is at a second logic level opposite to an initial first logic level; setting a device sleep function flag as the first value in response to a device sleep function enabling command received from a host system; and enabling a device sleep function of the memory storage apparatus if the device sleep function enabling command is received and the device sleep function flag is set as the first value.

Abstract: An electronic module includes first and second shells respectively having first and second edge surfaces with respective first and second joint units jointed together by ultrasonic welding. The first joint unit has first and second projection portions on the first edge surface, a first indentation portion between the first and second projection portions, and a bump on the second projection portion. The second joint unit complementarily engages the first joint unit. First and second bonding layers are respectively formed between the first indentation portion and the second joint unit and between the second projection portion and the second joint unit. Waterproof cable assemblies are mounted to the shells.

Abstract: A memory management method, a memory storage device and a memory control circuit unit are provided. The method includes: receiving a first write command from a host system and writing a first data indicated by the first write command to a physical erasing unit which is currently served as a receiving physical erasing unit; and copying valid data from a first physical erasing unit and writing the valid data to a physical erasing unit which is currently served as a recycling physical erasing unit in a garbage collection operation, where the physical erasing unit currently served as the receiving physical erasing unit and the physical erasing unit currently served as the recycling physical erasing unit are two physical erasing units independent from each other.

Abstract: A memory management method, a memory control circuit unit and a memory storage device are provided. The method includes: configuring a plurality of first type super physical units, and each of the first type super physical units includes at least two good physical erasing units which may be programmed simultaneously. The method also includes: configuring at least one second type super physical unit, and the at least one second type super physical unit includes at least two good physical erasing units which may not be programmed simultaneously.

Abstract: A housing includes a first surrounding wall connected around a base wall. The first surrounding wall has a first joint portion opposite to the base wall, a first outer surface and a first inner surface. The first outer and inner surfaces extend from the first joint portion toward the base wall. The first joint portion is stepped and has a first projecting portion adjoining the first outer surface, and a first shoulder portion indented from the first projecting portion and proximal to the first inner surface. The first shoulder portion has a plurality of parallel spaced-apart ribs protruding therefrom in a same direction as the first projecting portion. Each of the ribs has a tip that does not extend beyond a top end of the first projecting portion.

Abstract: A data protection method for a memory storage apparatus is provided. The method includes obtaining a current system time from a host system as a boot time, if the memory storage apparatus is powered on, and a basic input/output system of the host system loads and executes instruction programs in the expansion ROM of the memory storage apparatus for transmitting the current system time to the memory storage apparatus. The method also includes obtaining a shutdown time corresponding to the memory storage apparatus; calculating an off time from the shutdown time to the boot time and performing a refresh operation on physical erasing units of a rewritable non-volatile memory in the memory storage apparatus if the off time is longer than an off time threshold.

Abstract: A method of detecting a rewritable non-volatile memory module is provided. The method includes setting an output voltage of a write protect pin of a memory interface as a first logic level, giving a read status command and receiving a first status message. The method further includes determining whether a corresponding bit data in the first status message conforms to a status corresponding to the first logic level; and if yes, identifying that the rewritable non-volatile memory module has connected to the memory interface.

Abstract: A memory management method, a memory control circuit unit and a memory storage device are provided. The method includes: configuring a plurality of first type super physical units, and each of the first type super physical units includes at least two good physical erasing units which may be programmed simultaneously. The method also includes: configuring at least one second type super physical unit, and the at least one second type super physical unit includes at least two good physical erasing units which may not be programmed simultaneously.

Abstract: A data protection method for a memory storage apparatus is provided. The method includes obtaining a current system time from a host system as a boot time, if the memory storage apparatus is powered on, and a basic input/output system of the host system loads and executes instruction programs in the expansion ROM of the memory storage apparatus for transmitting the current system time to the memory storage apparatus. The method also includes obtaining a shutdown time corresponding to the memory storage apparatus; calculating an off time from the shutdown time to the boot time and performing a refresh operation on physical erasing units of a rewritable non-volatile memory in the memory storage apparatus if the off time is longer than an off time threshold.

Abstract: A sleep mode enabling method for a memory storage apparatus is provided. The method includes: setting a sleep pin connecting flag as a first value if a potential signal on a device sleep signal pin is at a second logic level opposite to an initial first logic level; setting a device sleep function flag as the first value in response to a device sleep function enabling command received from a host system; and enabling a device sleep function of the memory storage apparatus if the device sleep function enabling command is received and the device sleep function flag is set as the first value.

Abstract: A data transmitting method for a memory storage apparatus is provided. The method includes: initially setting a first threshold and a first accumulated value; and updating the first threshold by using the first threshold plus the first accumulated value at intervals of a first predetermined time. The method also includes when a detected temperature of the memory storage apparatus is greater than or equal to a temperature threshold, determining whether a size of received writing data is greater than or equal to the first threshold; and if no, writing the writing data into a rewritable non-volatile memory module and then updating the first threshold by using the first threshold minus the size of the writing data; and if yes, not writing the writing data into the rewritable non-volatile memory module. Accordingly, the method can effectively prevent overheat of system during operations of the memory storage apparatus.

Abstract: A temperature management method suitable for a memory storage device having a rewritable non-volatile memory module and a memory controller used for controlling the rewritable non-volatile memory module are provided. The temperature management method includes detecting and determining whether the hot-spot temperature of the memory storage device is higher than a predetermined temperature; and when affirmative, making the memory controller execute a cooling process, so as to reduce the hot-spot temperature of the memory storage device. Accordingly, the problem of heat buildup of the (rewritable non-volatile) memory storage device can be mitigated, as well as the problems of data loss and device aging of the (rewritable non-volatile) memory storage device.

Abstract: A memory management method, a memory control circuit unit using the method, and a memory storage apparatus using the method are provided. The memory management method includes determining whether a use count of the rewritable non-volatile memory module is greater than a use count threshold; based on a result of the determination, sorting each physical erasing unit in a spare area in an ascending manner according to an erasing count of each physical erasing unit in the spare area or according to the number of maximum bit errors of the physical erasing units in the spare area, so as to form a plurality of sorted physical erasing units; and selecting the foremost physical erasing unit from the spare area to write data according to the sorted physical erasing units. By applying the memory management method, the lifespan of the rewritable non-volatile memory module may be effectively prolonged.

Abstract: A data processing method for a re-writable non-volatile memory module is provided. The method includes receiving a write data stream associating to a logical access address of a logical programming unit; selecting a physical programming unit; and determining whether the write data stream associates with a kind of pattern. The method includes, if the write data stream associates with the kind of pattern, setting identification information corresponding to the logical access address as an identification value corresponding to the pattern, and storing the identification information corresponding to the logical access address into a predetermined area, wherein the write data stream is not programmed into the selected physical programming unit. The method further includes mapping the logical programming unit to the physical programming unit. Accordingly, the method can effectively shorten the time for writing data into the re-writable non-volatile memory module.

Abstract: A data accessing method, and a storage system and a controller using the same are provided. The data accessing method is suitable for a flash memory storage system having a data perturbation module. The data accessing method includes receiving a read command from a host and obtaining a logical block to be read and a page to be read from the read command. The data accessing method also includes determining whether a physical block in a data area corresponding to the logical block to be read is a new block and transmitting a predetermined data to the host when the physical block corresponding to the logical block to be read is a new block. Thereby, the host is prevented from reading garbled code from the flash memory storage system having the data perturbation module.

Abstract: A memory management method, a memory storage device and a memory control circuit unit are provided. The method includes: receiving a write command to write first data into a first spare physical erasing unit; selecting a first physical erasing unit, wherein the first physical erasing unit does not include the first spare physical erasing unit and stores a plurality of data in which at least two data belong to different logical erasing units; copying and writing a valid data among the plurality of data into a second spare physical erasing unit, wherein the second spare physical erasing unit is different from the first spare physical erasing unit.