Patents by Inventor Chien-Hua Chu

Chien-Hua Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130304964
    Abstract: A data processing method for a re-writable non-volatile memory module is provided. The method includes receiving a write data stream associating to a logical access address of a logical programming unit; selecting a physical programming unit; and determining whether the write data stream associates with a kind of pattern. The method includes, if the write data stream associates with the kind of pattern, setting identification information corresponding to the logical access address as an identification value corresponding to the pattern, and storing the identification information corresponding to the logical access address into a predetermined area, wherein the write data stream is not programmed into the selected physical programming unit. The method further includes mapping the logical programming unit to the physical programming unit. Accordingly, the method can effectively shorten the time for writing data into the re-writable non-volatile memory module.
    Type: Application
    Filed: July 23, 2012
    Publication date: November 14, 2013
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Chien-Hua Chu
  • Patent number: 8583860
    Abstract: A block management method for managing a mapping relationship between a plurality of logical blocks and a plurality of physical blocks of a flash memory is provided. The block management method includes: grouping the logical blocks into a plurality of logical zones; recording the mapping relationship between each logical block in each logical zone and all the data physical blocks among the physical blocks in a corresponding logical zone table in unit of the logical zones; and recording all the no-data physical blocks among the physical blocks with a single no-data physical block table. Thereby, the logical blocks can be mapped to all the physical blocks so that frequent access to specific physical blocks can be avoided when a user writes data into a specific logical zone frequently, and accordingly the lifespan of the flash memory can be prolonged.
    Type: Grant
    Filed: February 19, 2013
    Date of Patent: November 12, 2013
    Assignee: Phison Electronics Corp.
    Inventor: Chien-Hua Chu
  • Publication number: 20130282959
    Abstract: A system operation method for controlling a rewritable non-volatile memory module is provided. The rewritable non-volatile memory module includes a plurality of physical blocks. The system operation method includes following steps. A first signal is received from a host system through a host interface. Whether a system setting of the host interface is to be modified is determined. If the system setting is to be modified, a system parameter is read from the physical blocks, and the system setting is modified according to the system parameter. A second signal is transmitted to the host system to establish a connection recognition between the rewritable non-volatile memory module and the host system. Thereby, the settings of transmission between the host system and the rewritable non-volatile memory module are made more flexible.
    Type: Application
    Filed: May 24, 2012
    Publication date: October 24, 2013
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Chien-Hua Chu
  • Publication number: 20130275654
    Abstract: A memory storage apparatus having a rewritable non-volatile memory module, a first circuit, a memory controller and a power management circuit is provided. The first circuit outputs a state signal and keeps the state signal in a first state when the first circuit is enabled, and then the first circuit keeps the state signal in a second state after a predetermined condition is satisfied. When the memory controller receives a first signal, the power management circuit stops supplying an output voltage to the rewritable non-volatile memory module and the memory controller. Additionally, when the memory controller is enabled, the memory controller determines whether the state signal is in the first state. If true, the memory controller performs a first procedure; and if not, the memory controller performs a second procedure.
    Type: Application
    Filed: July 12, 2012
    Publication date: October 17, 2013
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Chien-Hua Chu
  • Publication number: 20130262755
    Abstract: A data accessing method, and a storage system and a controller using the same are provided. The data accessing method is suitable for a flash memory storage system having a data perturbation module. The data accessing method includes receiving a read command from a host and obtaining a logical block to be read and a page to be read from the read command. The data accessing method also includes determining whether a physical block in a data area corresponding to the logical block to be read is a new block and transmitting a predetermined data to the host when the physical block corresponding to the logical block to be read is a new block. Thereby, the host is prevented from reading garbled code from the flash memory storage system having the data perturbation module.
    Type: Application
    Filed: May 24, 2013
    Publication date: October 3, 2013
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Chien-Hua Chu, Chih-Kang Yeh
  • Publication number: 20130237073
    Abstract: A rotatable plug includes a casing unit having a first casing part and a second casing part with a pair of receiving spaces, a pair of conductive terminals respectively having conductive sections, and a rotatable unit including a pivot shaft, a pair of conductive prongs connected transversely to the pivot shaft, and a pair of conductive protrusions protruding out from the pivot shaft. The rotatable unit is rotatable relative to the casing unit between non-use and use positions, where the conductive prongs are accommodated in and extend out of the receiving spaces, respectively. Each conductive protrusion has at least two points of contact with the conductive section of a respective conductive terminal.
    Type: Application
    Filed: July 24, 2012
    Publication date: September 12, 2013
    Applicants: LITE-ON TECHNOLOGY CORP., SILITEK ELECTRONIC (GUANGZHOU) CO., LTD.
    Inventors: CHIA-TSANG HSU, CHIEN-HUA CHU
  • Patent number: 8478949
    Abstract: A data accessing method, and a storage system and a controller using the same are provided. The data accessing method is suitable for a flash memory storage system having a data perturbation module. The data accessing method includes receiving a read command from a host and obtaining a logical block to be read and a page to be read from the read command. The data accessing method also includes determining whether a physical block in a data area corresponding to the logical block to be read is a new block and transmitting a predetermined data to the host when the physical block corresponding to the logical block to be read is a new block. Thereby, the host is prevented from reading garbled code from the flash memory storage system having the data perturbation module.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: July 2, 2013
    Assignee: Phison Electronics Corp.
    Inventors: Chien-Hua Chu, Chih-Kang Yeh
  • Publication number: 20130166934
    Abstract: A controlling method for a memory storage device is provided. The method includes: disposing a rewriteable non-volatile memory module which is operated at a first working voltage in the memory storage device; and detecting whether the first working voltage is lower than a first voltage threshold. The method also includes: detecting whether a circuit component working voltage is lower than a circuit component voltage threshold; when the first working voltage is lower than the first voltage threshold, setting the memory storage device to stop executing commands from a host system and to stop giving commands to the rewriteable non-volatile memory module; and, when the circuit component working voltage is lower than the circuit component voltage threshold, enabling a reset signal to stop receiving and executing commands from the host system. Therefore, the method can effectively improve the stability of the memory storage device.
    Type: Application
    Filed: March 21, 2012
    Publication date: June 27, 2013
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Chien-Hua Chu
  • Publication number: 20130111301
    Abstract: A block management method for managing physical blocks of a rewritable non-volatile memory module, and a memory controller and a memory storage device using the same are provided. The method includes maintaining an error information table for recording one or more error correctable physical blocks among the physical blocks and an error bit number corresponding to the one or more error correctable physical blocks. The method further includes selecting a physical block for writing data according to the one or more error correctable physical blocks and the error bit number thereof recorded in the error information table. Accordingly, the data stability of the memory storage device can be improved.
    Type: Application
    Filed: February 3, 2012
    Publication date: May 2, 2013
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Chien-Hua Chu
  • Publication number: 20130080680
    Abstract: A temperature management method suitable for a memory storage device having a rewritable non-volatile memory module and a memory controller used for controlling the rewritable non-volatile memory module are provided. The temperature management method includes detecting and determining whether the hot-spot temperature of the memory storage device is higher than a predetermined temperature; and when affirmative, making the memory controller execute a cooling process, so as to reduce the hot-spot temperature of the memory storage device. Accordingly, the problem of heat buildup of the (rewritable non-volatile) memory storage device can be mitigated, as well as the problems of data loss and device aging of the (rewritable non-volatile) memory storage device.
    Type: Application
    Filed: November 16, 2011
    Publication date: March 28, 2013
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Chien-Hua Chu
  • Patent number: 8407397
    Abstract: A block management method for managing a mapping relationship between a plurality of logical blocks and a plurality of physical blocks of a flash memory is provided. The block management method includes: grouping the logical blocks into a plurality of logical zones; recording the mapping relationship between each logical block in each logical zone and all the data physical blocks among the physical blocks in a corresponding logical zone table in unit of the logical zones; and recording all the no-data physical blocks among the physical blocks with a single no-data physical block table. Thereby, the logical blocks can be mapped to all the physical blocks so that frequent access to specific physical blocks can be avoided when a user writes data into a specific logical zone frequently, and accordingly the lifespan of the flash memory can be prolonged.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: March 26, 2013
    Assignee: Phison Electronics Corp.
    Inventor: Chien-Hua Chu
  • Patent number: 8392797
    Abstract: An error correcting controller for connecting an old host controller having an old error correcting function with a new flash memory which requires a new error correcting function is provided. When the old host controller needs to write data into the new flash memory, the error correcting controller generates a new error correcting code according to the new error correcting function for the data. Then, when the old host controller needs to read the data from the new flash memory, the error correcting controller performs an error correcting procedure according to the new error correcting code and transmits information to the old host controller according to the result of the error correcting procedure and the old error correcting function. Accordingly, it is possible to allow the old host controller to access the new flash memory without changing the architecture of the old host controller.
    Type: Grant
    Filed: January 23, 2009
    Date of Patent: March 5, 2013
    Assignee: Phison Electronics Corp.
    Inventors: Kuo-Yi Cheng, Li-Chun Liang, Chien-Hua Chu
  • Patent number: 8386905
    Abstract: An error correcting method for a memory chip is provided. The memory chip has a plurality of physical blocks, each of the physical blocks has a plurality of physical pages, and the physical pages belonging to the same physical block are individually written and simultaneously erased. The error correcting method includes sequentially writing a plurality of data into the physical pages of a first physical block and generating a parity information according to the data. The error correcting method further includes writing the parity information into one of the physical pages of the first physical block following the data and correcting the data in the first physical block according to the parity information. Accordingly, the parity information can be used for correcting error bits in the data when an error checking and correcting circuit can not correct the error bits. Thereby, the error correcting ability is enhanced.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: February 26, 2013
    Assignee: Phison Electronics Corp.
    Inventor: Chien-Hua Chu
  • Patent number: 8352673
    Abstract: A data writing method for writing data from a host system into a flash memory chip having a plurality of physical blocks is provided. The method includes configuring a plurality of logical access addresses and recording address centers and address radiuses for the physical blocks. The method also includes receiving data to be written in logical access addresses, determining opened physical blocks among the physical blocks, and writing the data into the flash memory chip based on the logical access addresses, and the address centers and the address radiuses of the opened physical blocks. Accordingly, the method can effectively reduce the degree of data dispersion of each of the physical blocks, reduce the time for organizing valid data, and increase the speed for writing data.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: January 8, 2013
    Assignee: Phison Electronics Corp.
    Inventor: Chien-Hua Chu
  • Patent number: 8332576
    Abstract: A data reading method suitable for a flash memory storage system having a flash memory is provided, wherein the flash memory is substantially divided into a plurality of blocks and these blocks are grouped into at least a data area and a spare area. The data reading method includes: respectively determining whether the blocks in the data area are frequently read blocks; allocating a buffer storage area corresponding to the frequently read block and copying data stored in the frequently read block to the buffer storage area; and reading the data from the buffer storage area corresponding to the frequently read block when the data stored in the frequently read block is to be read. As described above, data loss caused by read disturb can be effectively prevented.
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: December 11, 2012
    Assignee: Phison Electronics Corp.
    Inventors: Chien-Hua Chu, Wei-Chen Teo
  • Patent number: 8301981
    Abstract: A data access method for accessing data in a flash memory is provided, wherein the data has a plurality of sub-data. The data access method includes generating an error correction code (ECC) for the data and writing the data and the ECC into the flash memory. The data access method also includes generating a corresponding bit checking code for each of the sub-data and writing the bit checking codes into the flash memory. When the sub-data subsequently is read from the flash memory, whether the sub-data contains any error is determined only according to the bit checking code corresponding to the sub-data. Thereby, the data access efficiency is improved.
    Type: Grant
    Filed: June 17, 2009
    Date of Patent: October 30, 2012
    Assignee: Phison Electronics Corp.
    Inventors: Chien-Hua Chu, Kuo-Yi Cheng
  • Patent number: 8296504
    Abstract: A data management method for a flash memory storage system having a cache memory is provided. The data management method includes writing data into a flash memory when a write command is executed, and determining currently a state of all the writing data which is temporarily stored in the cache memory. Wherein, if the state indicates that a time for writing all the writing data temporarily stored in the cache memory into a flash memory may exceed an upper limit processing time, a portion of the writing data temporarily stored in the cache memory is first written into the flash memory. Accordingly, the data management method may effectively avoid a delay caused by a flush command issued from the host for flushing the cache memory.
    Type: Grant
    Filed: June 8, 2009
    Date of Patent: October 23, 2012
    Assignee: Phison Electronics Corp.
    Inventors: Chien-Hua Chu, Chih-Kang Yeh
  • Publication number: 20120265905
    Abstract: A data writing method for writing data from a host system into a plurality of memory dies of a rewritable non-volatile memory storage apparatus is provided. The data writing method includes determining whether the data transmission interface of the host system complies with a first interface standard or a second interface standard. The data writing method also includes using a general mode to write the data into the memory dies when the data transmission interface of the host system complies with the first interface standard and using a power saving mode to write the data into the memory dies when the data transmission interface of the host system complies with the second interface standard. Accordingly, the data writing method can effectively prevent the stability of the rewritable non-volatile memory storage apparatus from reducing due to insufficient power supplied by the data transmission interface.
    Type: Application
    Filed: June 27, 2012
    Publication date: October 18, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Chien-Hua Chu, Hong-Lipp Ko
  • Publication number: 20120233388
    Abstract: A data writing method for writing data from a host system into a plurality of memory dies of a rewritable non-volatile memory storage apparatus is provided. The data writing method includes determining whether the data transmission interface of the host system complies with a first interface standard or a second interface standard. The data writing method also includes using a general mode to write the data into the memory dies when the data transmission interface of the host system complies with the first interface standard and using a power saving mode to write the data into the memory dies when the data transmission interface of the host system complies with the second interface standard. Accordingly, the data writing method can effectively prevent the stability of the rewritable non-volatile memory storage apparatus from reducing due to insufficient power supplied by the data transmission interface.
    Type: Application
    Filed: May 22, 2012
    Publication date: September 13, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Chien-Hua Chu, Hong-Lipp Ko
  • Patent number: 8266334
    Abstract: A data writing method for writing data from a host system into a plurality of memory dies of a rewritable non-volatile memory storage apparatus is provided. The data writing method includes determining whether the data transmission interface of the host system complies with a first interface standard or a second interface standard. The data writing method also includes using a general mode to write the data into the memory dies when the data transmission interface of the host system complies with the first interface standard and using a power saving mode to write the data into the memory dies when the data transmission interface of the host system complies with the second interface standard. Accordingly, the data writing method can effectively prevent the stability of the rewritable non-volatile memory storage apparatus from reducing due to insufficient power supplied by the data transmission interface.
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: September 11, 2012
    Assignee: Phison Electronics Corp.
    Inventors: Chien-Hua Chu, Hong-Lipp Ko