Patents by Inventor Chien-Hung Liu

Chien-Hung Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10840333
    Abstract: A method of forming a semiconductor arrangement includes forming a gate dielectric layer over a semiconductor layer. A gate electrode layer is formed over the gate dielectric layer. A first gate mask is formed over the gate electrode layer. The gate electrode layer is etched using the first gate mask as an etch template to form a first gate electrode. A first dopant is implanted into the semiconductor layer using the first gate mask and the first gate electrode as an implantation template to form a first doped region in the semiconductor layer.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: November 17, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Yun-Chi Wu, Tsung-Yu Yang, Cheng-Bo Shu, Chien Hung Liu
  • Patent number: 10823849
    Abstract: A tracking-distance-measuring system capable of tracking a torso object is provided. The tracking-distance-measuring system includes: an image sensor, a controller, a distance-measuring device, and an actuator device. The image sensor is configured to capture an input image. The controller is configured to analyze the input image to recognize a torso object from the input image, and calculate an offset distance between a center of the torso object and a central axis of the input image. The actuator device is configured to carry the distance-measuring device. The controller controls the actuator device to calibrate an offset angle between the distance-measuring device and the recognized torso object according to the offset distance. In response to calibrating the offset angle, the distance-measuring device emits energy and receives reflected energy to detect an object distance of the torso object.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: November 3, 2020
    Assignee: QUANTA COMPUTER INC.
    Inventor: Chien-Hung Liu
  • Patent number: 10775242
    Abstract: A tracking and ranging system includes a thermal sensor device, a controller, a ranging device and a transmission device. The thermal sensor device is configured to capture a thermal image. The controller analyzes the thermal image to identify the main heat source from among the heat sources displayed in the thermal image, and obtain an offset distance between the center points of the main heat source and the thermal image. The ranging device is coupled to the controller. The transmission device loads the ranging device and is coupled to the controller. The controller controls the motion of the transmission device in accordance with the offset distance to correct the offset angle between the ranging device and the object corresponding to the main heat source. After correcting the offset angle, the ranging device detects a first distance to the object by transmitting energy and receiving reflected energy.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: September 15, 2020
    Assignee: QUANTA COMPUTER INC.
    Inventors: Ming-Hong Ni, Chien-Hung Liu
  • Patent number: 10755873
    Abstract: A membrane circuit board includes a first flexible circuit board, a second flexible circuit board and a nanomaterial layer. The nanomaterial layer includes plural polymeric structures. The nanomaterial layer is formed on the first flexible circuit board, the second flexible circuit board and/or a junction region between the edge of the first flexible circuit board and the second flexible circuit board to prevent at least one of the upper metallic conductor line and the lower metallic conductor line from contacting with a specified chemical element. Consequently, the conductive impedance of the upper metallic conductor line and the lower metallic conductor line is not affected by the specified chemical element. Moreover, the present invention also provides a keyboard device with the membrane circuit board.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: August 25, 2020
    Assignee: PRIMAX ELECTRONICS LTD.
    Inventors: Bo-An Chen, Chien-Hung Liu, Lei-Lung Tsai, Chin-Sung Pan
  • Patent number: 10755878
    Abstract: A keyboard device includes keyboard device includes a membrane circuit board, a base plate and a key structure. The key structure includes a keycap, a connecting element, an elastic element and a buffering structure. The connecting element is arranged between the base plate and the keycap. The elastic element is arranged between the keycap and the membrane circuit board. The buffering structure is disposed on a bottom surface of the keycap. While the keycap is depressed, the buffering structure collides with the elastic element or the connecting element. Consequently, the buffering structure provides a buffering effect.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: August 25, 2020
    Assignee: PRIMAX ELECTRONICS LTD.
    Inventor: Chien-Hung Liu
  • Publication number: 20200266012
    Abstract: A keyboard device includes keyboard device includes a membrane circuit board, a base plate and a key structure. The key structure includes a keycap, a connecting element, an elastic element and a buffering structure. The connecting element is arranged between the base plate and the keycap. The elastic element is arranged between the keycap and the membrane circuit board. The buffering structure is disposed on a bottom surface of the keycap. While the keycap is depressed, the buffering structure collides with the elastic element or the connecting element. Consequently, the buffering structure provides a buffering effect.
    Type: Application
    Filed: June 21, 2019
    Publication date: August 20, 2020
    Inventor: Chien-Hung Liu
  • Publication number: 20200243277
    Abstract: A membrane circuit board includes a first flexible circuit board, a second flexible circuit board and a nanomaterial layer. The nanomaterial layer includes plural polymeric structures. The nanomaterial layer is formed on the first flexible circuit board, the second flexible circuit board and/or a junction region between the edge of the first flexible circuit board and the second flexible circuit board to prevent at least one of the upper metallic conductor line and the lower metallic conductor line from contacting with a specified chemical element. Consequently, the conductive impedance of the upper metallic conductor line and the lower metallic conductor line is not affected by the specified chemical element. Moreover, the present invention also provides a keyboard device with the membrane circuit board.
    Type: Application
    Filed: April 25, 2019
    Publication date: July 30, 2020
    Inventors: Bo-An Chen, Chien-Hung Liu, Lei-Lung Tsai, Chin-Sung Pan
  • Patent number: 10694292
    Abstract: A sound control method includes following steps. Firstly, a controller commands a first ultrasonic transmitter to emit a first ultrasonic wave. Then, in a first time interval, the controller records a first received signal waveform received by an ultrasonic receiver. Then, the controller commands a second ultrasonic transmitter to emit a second ultrasonic wave. Then, in a second time interval, the controller records a second received signal waveform received by the ultrasonic receiver. Then, a playing mode of at least one speaker is controlled according to the first received signal waveform and the second received signal waveform.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: June 23, 2020
    Assignee: QUANTA COMPUTER INC.
    Inventor: Chien-Hung Liu
  • Patent number: 10672783
    Abstract: Various embodiments of the present application are directed to an integrated circuit (IC) comprising a memory cell with a large operation window and a high erase speed. In some embodiments, the IC comprises a semiconductor substrate and a memory cell. The memory cell comprises a control gate electrode, a select gate electrode, a charge trapping layer, and a common source/drain region. The common source/drain is defined by the semiconductor substrate and is n-type. The control gate electrode and the select gate electrode overlie the semiconductor substrate and are respectively on opposite sides of the common source/drain. Further, the control gate electrode overlies the charge trapping layer and comprises a metal with a p-type work function. In some embodiments, the select gate electrode comprises a metal with an n-type work function.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: June 2, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yun-Chi Wu, Cheng-Bo Shu, Chien Hung Liu
  • Publication number: 20200169811
    Abstract: A sound control method includes following steps. Firstly, a controller commands a first ultrasonic transmitter to emit a first ultrasonic wave. Then, in a first time interval, the controller records a first received signal waveform received by an ultrasonic receiver. Then, the controller commands a second ultrasonic transmitter to emit a second ultrasonic wave. Then, in a second time interval, the controller records a second received signal waveform received by the ultrasonic receiver. Then, a playing mode of at least one speaker is controlled according to the first received signal waveform and the second received signal waveform.
    Type: Application
    Filed: January 31, 2019
    Publication date: May 28, 2020
    Inventor: Chien-Hung LIU
  • Publication number: 20200158866
    Abstract: An environment detection method includes the following steps is provided. Firstly, an ultrasonic wave is emitted to a first reflecting cone by an ultrasonic transmitter, wherein the ultrasonic wave is reflected to the environment by the first reflecting cone in a full circumferential direction. Then, the ultrasonic waves reflected back from a second reflecting cone is received by an ultrasonic receiver. Then, a received signal waveform received by the ultrasonic receiver is recorded by a controller.
    Type: Application
    Filed: January 31, 2019
    Publication date: May 21, 2020
    Inventor: Chien-Hung LIU
  • Patent number: 10651211
    Abstract: A thin film transistor and a preparation method thereof, an array substrate and a display apparatus are provided. The preparation method includes an operation of forming a low temperature poly silicon active layer; a substrate has a first region and a second region; and the step includes: forming a buffer layer on the first region and the second region of the substrate, the buffer layer having a thickness at a portion corresponding to the first region greater than that at a portion corresponding to the second region; or, forming the buffer layer on the first region of the substrate; forming an amorphous silicon layer on the buffer layer; performing laser crystallization processing on the amorphous silicon layer so as to convert the amorphous silicon layer into a poly silicon layer; and removing the poly silicon layer on the second region, and forming the low temperature poly silicon active layer on the first region.
    Type: Grant
    Filed: April 8, 2016
    Date of Patent: May 12, 2020
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zuqiang Wang, Chien Hung Liu
  • Publication number: 20200135857
    Abstract: A method of forming a semiconductor arrangement includes forming a gate dielectric layer over a semiconductor layer. A gate electrode layer is formed over the gate dielectric layer. A first gate mask is formed over the gate electrode layer. The gate electrode layer is etched using the first gate mask as an etch template to form a first gate electrode. A first dopant is implanted into the semiconductor layer using the first gate mask and the first gate electrode as an implantation template to form a first doped region in the semiconductor layer.
    Type: Application
    Filed: April 1, 2019
    Publication date: April 30, 2020
    Inventors: Yun-Chi WU, Tsung-Yu YANG, Cheng-Bo SHU, Chien Hung LIU
  • Publication number: 20200125122
    Abstract: An unmanned ground vehicle (UGV) includes one or more motors configured to drive one or more wheels of the UGV, a memory storing instructions, and a processor coupled to the one or more motors and the memory. The processor is configured to execute the instructions to cause the UGV to determine location information of a movable target; calculate a direction and a speed for the unmanned ground vehicle based on the determined location information; and drive the one or more motors to move the unmanned ground vehicle in the calculated direction at the calculated speed to follow the movable target when the movable target moves.
    Type: Application
    Filed: October 17, 2019
    Publication date: April 23, 2020
    Inventors: Hsin-Yuan CHEN, Chien-Hung LIU, Wei-Hao WANG, Yi-Bin LIN, Yi-Chiang YANG
  • Publication number: 20200122711
    Abstract: An unmanned ground vehicle (UGV) includes one or more motors configured to drive one or more wheels of the UGV, an obstacle sensor, a memory storing instructions, and a processor coupled to the one or more motors, the obstacle sensor, and the memory. The processor is configured to execute the instructions to cause the UGV to obtain location information of multiple navigation points; calculate a navigation path based on the obtained location information; drive the one or more motors to navigate the UGV along the navigation path; detect, by the obstacle sensor, whether one or more obstacles exist while navigating the UGV, and if detected, determine location information of the one or more obstacles; and if the one or more obstacles are detected by the obstacle sensor, update the navigation path based on determined location information of the one or more obstacles.
    Type: Application
    Filed: October 17, 2019
    Publication date: April 23, 2020
    Inventors: Hsin-Yuan CHEN, Chien-Hung Liu, Wei-Hao Wang, Yi-Bin Lin, Yi-Chiang Yang
  • Publication number: 20200083233
    Abstract: Various embodiments of the present application are directed to an integrated circuit (IC) comprising a memory cell with a large operation window and a high erase speed. In some embodiments, the IC comprises a semiconductor substrate and a memory cell. The memory cell comprises a control gate electrode, a select gate electrode, a charge trapping layer, and a common source/drain region. The common source/drain is defined by the semiconductor substrate and is n-type. The control gate electrode and the select gate electrode overlie the semiconductor substrate and are respectively on opposite sides of the common source/drain. Further, the control gate electrode overlies the charge trapping layer and comprises a metal with a p-type work function. In some embodiments, the select gate electrode comprises a metal with an n-type work function.
    Type: Application
    Filed: November 14, 2019
    Publication date: March 12, 2020
    Inventors: Yun-Chi Wu, Cheng-Bo Shu, Chien Hung Liu
  • Publication number: 20200072972
    Abstract: A tracking-distance-measuring system capable of tracking a torso object is provided. The tracking-distance-measuring system includes: an image sensor, a controller, a distance-measuring device, and an actuator device. The image sensor is configured to capture an input image. The controller is configured to analyze the input image to recognize a torso object from the input image, and calculate an offset distance between a center of the torso object and a central axis of the input image. The actuator device is configured to carry the distance-measuring device. The controller controls the actuator device to calibrate an offset angle between the distance-measuring device and the recognized torso object according to the offset distance. In response to calibrating the offset angle, the distance-measuring device emits energy and receives reflected energy to detect an object distance of the torso object.
    Type: Application
    Filed: October 25, 2018
    Publication date: March 5, 2020
    Inventor: Chien-Hung LIU
  • Publication number: 20200020492
    Abstract: A keyboard device includes a membrane circuit board, a key frame, a position-limiting frame and a key structure. The key frame is located over the membrane circuit board. The position-limiting frame is located over the key frame. The key frame includes a first frame body and a first receiving hole. The first receiving hole runs through the first frame body along a vertical direction. The position-limiting frame includes a second frame body and a second receiving hole. The second receiving hole runs through the second frame body along the vertical direction. The second receiving hole is in communication with the first receiving hole. The key structure includes a keycap and a protrusion part. The keycap is movable within the first receiving hole and the second receiving hole. A portion of the protrusion part is located under the second frame body.
    Type: Application
    Filed: September 27, 2018
    Publication date: January 16, 2020
    Inventors: Che-Wei Yang, Yi-Chen Wang, Chien-Hung Liu, Ming-Han Wu, Bo-An Chen, Yi-Wei Chen, Huang-Ming Chang, Chen-Hsuan Hsu
  • Publication number: 20200003624
    Abstract: A tracking and ranging system includes a thermal sensor device, a controller, a ranging device and a transmission device. The thermal sensor device is configured to capture a thermal image. The controller analyzes the thermal image to identify the main heat source from among the heat sources displayed in the thermal image, and obtain an offset distance between the center points of the main heat source and the thermal image. The ranging device is coupled to the controller. The transmission device loads the ranging device and is coupled to the controller. The controller controls the motion of the transmission device in accordance with the offset distance to correct the offset angle between the ranging device and the object corresponding to the main heat source. After correcting the offset angle, the ranging device detects a first distance to the object by transmitting energy and receiving reflected energy.
    Type: Application
    Filed: January 24, 2019
    Publication date: January 2, 2020
    Inventors: Ming-Hong NI, Chien-Hung LIU
  • Publication number: 20200006369
    Abstract: An integrated circuit (IC) includes a semiconductor-on-insulator (SOI) substrate comprising a handle substrate, an insulator layer over the handle substrate, and a semiconductor device layer over the insulator layer. A logic device includes a logic gate arranged over the semiconductor device layer. The logic gate is arranged within a high ? dielectric layer. A memory cell includes a control gate and a select gate laterally adjacent to one another and arranged over the semiconductor device layer. A charge-trapping layer underlies the control gate.
    Type: Application
    Filed: September 4, 2019
    Publication date: January 2, 2020
    Inventors: Chien Hung Liu, Chih-Wei Hung