Abstract: An ESD (Electrostatic Discharge, ESD) protection circuit includes a voltage-divider generating circuit, a decision circuit, and a switching circuit. The voltage-divider generating circuit outputs a first voltage and a second voltage according to an input voltage. The decision circuit is coupled to the voltage-divider generating circuit and receives the first voltage and the second voltage. The decision circuit outputs an output voltage according to the first voltage and the second voltage. The switching circuit is coupled to the decision circuit and is either turned on or turned off according to the output voltage. The transient voltages of the first and the second voltage are different.

Abstract: A chip structure having a history recording unit is provided. The chip structure includes a core circuit unit in addition to the history recording unit. The history recording unit includes a sensing unit, a record unit, and a deliver unit. The sensing unit detects the status of the core circuit unit and generates history information accordingly. The history information is saved into the record unit and can be further output by the deliver unit. Thus, the history information of the chip structure can be recorded and effectively used to eliminate the reliability problem of the chip structure.

Abstract: A system for transferring electric power and signals via a power line by time-division multiplexing includes a power line, electronic-circuit units, and controllers. The power line includes a first transmission line and a second transmission line. The first transmission line is connected with a first switch in series and is therefore divided into a source end and a loading end. The electronic-circuit units are connected in series between the loading end and the second transmission line. The controllers are electrically connected with and are configured for synchronously controlling the first switch and the electronic-circuit units. When the first switch is closed, electric power is transferred from an electric power source to the loading end, and when the first switch is opened, the electronic-circuit units transfer signals via the loading end. The system features simple circuitry and effectively reduces noise in signal transmission.

Abstract: A transceiving circuit resistance calibrating method, which is applied to a transceiving circuit. The method includes: inputting a first current to a transmitter to generate a first output voltage, wherein the first current is generated according to a ratio between a predetermined voltage and an inner resistor of a chip; inputting a second current to a transmitter to generate a second output voltage, wherein the first current is generated according to a ratio between the predetermined voltage and a predetermined resistor; and adjusting a first adjustable resistance module according to a difference between the first output voltage and the second output voltage.

Abstract: This disclosure discloses a light-emitting device. The light-emitting device comprises a substrate; a first photovoltaic cell disposed over the substrate comprising a base layer having a first conductivity type; an emitter layer having a second conductivity type; a window layer having the second conductivity type; an intermediate structure between the emitter layer and the window layer having the second conductivity type, and comprising a first portion adjacent to the emitter layer and a second portion on the first portion. The first portion comprises a bandgap energy higher than that of the emitter layer and the intermediate structure is substantially lattice matched with the emitter layer.

Abstract: The present invention provides a method for manufacturing a modularized integrated circuit (IC). The method includes the following steps: providing a base; and coupling an input/output module with the base. The base includes a lead-frame and a first package. The first package covers the lead-frame but exposes first contact points. The input/output module includes a first substrate, a plurality of first conducting columns, and a plurality of third contact points. A portion of each of the third contact points is electrically connected to a corresponding one of the first contact points. The method enhances the flexibility of IC design, and reduces the time and costs of developing new process techniques.

Abstract: A method and an apparatus for automatic noise compensation used with audio reproduction equipment are provided. The method comprises: (a) collecting a plurality of mixed audio signals, each mixed audio signal including equipment sound output by the audio reproduction equipment, and background noise; (b) removing the equipment sound from the mixed audio signals to obtain the background noise therein; (c) determining whether or not a plurality of mixed audio signals under inspection include a significant sound; and (d) adjusting the volume of the audio reproduction equipment according to whether or not a significant sound has been generated in the surrounding area and the magnitude of the background noise in the mixed audio signals under inspection to satisfy a plurality of predetermined compensation conditions.

Abstract: An electrostatic discharge (ESD) protection circuit is for protecting an internal circuit electrically coupled to an input/output (I/O) pad. The ESD protection circuit comprises an ESD protection unit, to be electrically coupled to the I/O pad, for enabling release of an electrostatic charge at the I/O pad to a ground terminal. The ESD protection circuit also comprises a voltage detecting unit, electrically coupled to the ESD protection unit and to be electrically coupled to the I/O pad, for detecting the presence of an ESD voltage at the I/O pad and for controlling the ESD protection unit to establish a conduction path between the I/O pad and the ground terminal when the ESD voltage is detected.

Abstract: A three-dimensional SoC structure formed by stacking multiple chip modules is provided. The three-dimensional SoC structure includes at least two vertical SoC modules and at least one connector module, wherein each connector module electrically connects two vertical SoC modules. Each vertical SoC module is constructed by stacking at least two chip modules vertically. Each chip module includes a module circuit board and at least one preset element. A recess is formed in each module circuit board and provided with a first connecting interface for electrically connecting with the corresponding at least one preset element. The at least two vertical SoC modules are connected by the connector module to form a three-dimensional SoC structure with multiple functions. Besides, the recesses formed in the module circuit boards provide effective heat dissipation paths for the preset elements.

Abstract: The present invention provides an integrated circuit having a better ESD protection capability and capable of reducing a circuit layout area. The integrated circuit comprises: an internal circuit, a first pad, and at least a first impedance matching unit. The first impedance matching unit is coupled between the internal circuit and the first pad, and the first impedance matching unit comprises: a first switch unit and a first resistance unit. The first switch unit is coupled to the internal circuit, and the first resistance unit is coupled between the first switch unit and the first pad, wherein the first resistance unit has a first terminal and a second terminal. The first terminal is directly electrically connected to the first pad and the second terminal is coupled to the first switch unit.

Abstract: A transceiving circuit resistance calibrating method, which is applied to a transceiving circuit. The method includes: inputting a first current to a transmitter to generate a first output voltage, wherein the first current is generated according to a ratio between a predetermined voltage and an inner resistor of a chip; inputting a second current to a transmitter to generate a second output voltage, wherein the first current is generated according to a ratio between the predetermined voltage and a predetermined resistor; and adjusting a first adjustable resistance module according to a difference between the first output voltage and the second output voltage.

Abstract: A method for arranging memories of a low-complexity low-density parity-check (LDPC) decoder and a low-complexity LDPC decoder using the same method are provided. The main idea of the method for arranging memories of a low-complexity LDPC decoder is to merge at least one or two small-capacity memory blocks into one memory group, so that the memory area can be reduced and the power consumption in reading or writing data is lowered. Besides, as the merged memory group shares the same address line in reading or writing data, at least one delay unit is used to adjust the reading or writing order and thereby ensure data validity. A low-complexity LDPC decoder using the disclosed method can meet the demands of high processing rate and low power consumption.

Abstract: A multi-layer system-on-chip (SoC) module structure is provided. The multi-layer SoC module structure includes at least two circuit board module layers and at least one connector module layer. Each connector module layer is sandwiched between and thus electrically connects two circuit board module layers such that the SoC module structure is formed by stacking. Each circuit board module layer is composed of at least one circuit board module while each connector module layer is composed of at least one connector module. Hence, the SoC module structure can be manufactured as a three-dimensional structure, thus allowing highly flexible connections within the SoC module structure.

Abstract: A hand-off monitoring method is provided for monitoring a space divided into several monitoring regions. Each of the monitoring regions is monitored by a surveillance camera. The hand-off monitoring method comprises receiving a warning signal from a location and identifying a first surveillance camera related to the location according to the warning signal. Then, an object triggering the warning signal is identified according to a video signal provided by the first surveillance camera. A moving path of the object is predicted according to a non-linear movement prediction model. Then, a control operation is performed, according to the moving path, to control the surveillance cameras in the monitoring regions where the moving path passes so as to hand-off monitor the object.

Abstract: The invention discloses a network communication processing apparatus capable of processing the cable discharge event. The network communication processing apparatus comprises an electrostatic protection circuit coupled between two signal pins used for transmitting/receiving the network signal on a cable. When the cable discharge event occurred on the cable, the electrostatic protection circuit will be turned on so that the two signal pins are short together to discharge back the electrostatic signal to the cable.

Abstract: A socket structure stack and a socket structure thereof are provided. The socket structure stack includes at least two socket structures, and each socket structure includes a main body, a plurality of conductive elements, and a plurality of connecting elements. The main body includes an inner plate and an outer plate, wherein the inner plate has a receiving portion and an embedded portion. The conductive elements are embedded in the embedded portion, and the connecting elements are mounted on the outer plate so as to connect adjacent socket structures together. The socket structures are so configured that ICs, processors, and printed circuit boards connected to the socket structures or the socket structures themselves can be recycled. Moreover, the printed circuit boards can be easily assembled to the socket structures, and the socket structures can be stacked up and securely connected to form a 3D structure which is otherwise difficult to put together by soldering.

Abstract: The present invention discloses a virtualized peripheral hardware platform system. The virtualized peripheral hardware platform system includes a first hardware platform and a software platform, which is executed in a second hardware platform. The first hardware platform is in signal communication with the second hardware platform. The software platform not only simulates the operation of the peripheral device of the first hardware platform but also simulates input signals of virtual peripheral devices and then transmits the input signals to the first hardware platform to conduct further calculations. Furthermore, the input/output (I/O) interface of the second hardware platform can be simulated as the I/O interface of the first hardware platform, so as to decrease the number of the I/O interface which the first hardware platform needed and downsize the first hardware platform.

Abstract: An ESD (Electrostatic Discharge, ESD) protection circuit includes a voltage-divider generating circuit, a decision circuit, and a switching circuit. The voltage-divider generating circuit outputs a first voltage and a second voltage according to an input voltage. The decision circuit is coupled to the voltage-divider generating circuit and receives the first voltage and the second voltage. The decision circuit outputs an output voltage according to the first voltage and the second voltage. The switching circuit is coupled to the decision circuit and is either turned on or turned off according to the output voltage. The transient voltages of the first and the second voltage are different.